UM-TM59PA80_E
9tenx technology, inc.
Rev 1.2, 2007/03/06
Pin Name I/O Pin Description Shared Function
VDD, VSS P Power input pins for internal power block -
XIN, XOUT −Main oscillator pins for main clock -
XTIN, XTOUT −Sub oscillator pins for sub clock -
nTEST −Chip test input pin. Hold VDD when the device is operating -
nRESET −Reset signal input pin. Schmitt trigger input with internal pull-
up resistor. -
PA.0—PA.5 I/O
Schmitt trigger input, Push-pull Output, Open-Drain Output,
External Interrupt 0-3, Timer 0 Output, Timer 0 external
clock input, Clock Output, Buzzer Out, ADC4-5
INT0-3, ADC4-5,
T0CLK, T0OUT,
Buzzer, CLO
PB.0—PB.3 I/O
Schmitt trigger input, Push-pull Output, Open-Drain Output,
ADC0-3, External Interrupt 4-7 ADC0-3, INT4-7
PC.0—PC.3 I/O
Schmitt trigger input, Push-pull output, Open-Drain output,
SEG0-1, SCLK, SO, SI, PWM0
SCLK, SO,
SEG0-1, SI,
PWM0
PD.0, PD.1 I/O Schmitt trigger input, Push-pull output, Open-Drain output,
External Interrupt 8-9, SEG2-3 INT8-9, SEG2-3
PE.0—PE.7 I/O
Schmitt trigger Input, Push-pull output, Open-Drain output,
SEG4-11, Input mode with pull-up SEG4-11
PF.0—PF.7 I/O
Schmitt trigger Input, Push-pull output, Open-Drain output,
SEG12-19, COM4-7, Input mode with pull-up
SEG12-19,
COM4-7
PG.0—PG.3 I/O
Schmitt trigger Input, Push-pull output, Open-Drain output,
COM0-3, Input mode with pull-up COM0-3
CLO O System clock output port PA.2
INT0-INT9 I External interrupt input port PA.0-3, PB.0-3,
PD.0-1
PWM0 O 8-Bit high speed PWM output PC.3
T0OUT O Timer0 match output PA.0
ADC0-ADC5 I A/D converter input PB.0-3, PA.4-5
<Table 1-1. PIN Description> < I: Input; O: Output; I/O: Bi-direction; P: Power >
