SONIX SN8P2308 User manual

SN8P2318 Series
C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 1 Version 1.5
SN8P2318 Series
USER’S MANUAL
Version 1.5
SN8P2317
SN8P2318
S
SO ON Ni iX X 8 8- -B Bi it t M Mi ic cr ro o- -C Co on nt tr ro ol ll le er r
SONIX reserves the right to make change without further notice to any products herein to improve reliability, function or design. SONIX does not
assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent
rights nor the rights of others. SONIX products are not designed, intended, or authorized for us as components in systems intended, for surgical
implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SONIX product
could create a situation where personal injury or death may occur. Should Buyer purchase or use SONIX products for any such unintended or
unauthorized application. Buyer shall indemnify and hold SONIX and its officers, employees, subsidiaries, affiliates and distributors harmless against
all claims, cost, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use even if such claim alleges that SONIX was negligent regarding the design or manufacture of
the part.

SN8P2318 Series
C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 2 Version 1.5
AMENDENT HISTORY
Version
Date
Description
VER 0.1
Mar. 2010
First issue.
VER 0.2
July. 2010
Add SN8P2317 48 pin item.
VER 1.0
May. 2011
1. Modify XIN Pin Description : In PLL_16M mode, XIN connects a decouple 0.1uF
capacitor to VDD.
2. Add High_Clk = PLL_16M limited.
3. SN8P2318 support to industry -40~+85℃temperature range.
4. Modify “DEVELOPMENT TOOL” description.
5. Modify “Chapter 9.4 RFCM REGISTER”RFCH[2:1] >> RFCH[2:0].
6. Modify “Chapter 9.5 RFC OPERATION EXAMPLE” T1 rate = Fcpu/256 >>
Fcpu/128.
7. Modify “CHARACTERISTIC GRAPHS” Chapter
VER 1.1
May. 2011
1. Modify “Chapter 6.10 T1 INTERRUPT OPERATION “description :
Example: T1 interrupt service routine (T1CL read first.).
2. Modify “Chapter 13.2 “ description : It is necessary to connect 16MHz crystal in ICE
for IHRC_16M mode emulation >> It is necessary to connect 16MHz crystal in ICE
for PLL_16M mode emulation.
3. Modify “Chapter 2.5 CODE OPTION“ description about High_Clk / Low_Clk code
option.
VER 1.2
Oct. 2011
Modify “4*32 LCD DRIVER”chapter description about VLVD.
VER 1.3
Dec. 2011
Modify misspelted words from “EXPLAME”to “EXAMPLE”.
VER 1.4
Sep. 2012
Modify “ELECTRICAL CHARACTERICS” chapter operating temperature from 0~70℃to
-20~85℃and others.
VER 1.5
Jun. 2013
1. Modify PROGRAMMING PIN MAPPING content.
2. VLCD and VDD pin have to short together.

SN8P2318 Series
C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 3 Version 1.5
Table of Content
AMENDENT HISTORY................................................................................................................................ 2
1
1
1PRODUCT OVERVIEW......................................................................................................................... 7
1.1 FEATURES........................................................................................................................................ 7
1.2 SYSTEM BLOCK DIAGRAM.......................................................................................................... 8
1.3 PIN ASSIGNMENT........................................................................................................................... 8
1.4 PIN DESCRIPTIONS....................................................................................................................... 10
1.5 PIN CIRCUIT DIAGRAMS............................................................................................................. 11
2
2
2CENTRAL PROCESSOR UNIT (CPU) .............................................................................................. 13
2.1 PROGRAM MEMORY (ROM)....................................................................................................... 13
2.1.1 RESET VECTOR (0000H) ...................................................................................................... 14
2.1.2 INTERRUPT VECTOR (0008H)............................................................................................. 15
2.1.3 LOOK-UP TABLE DESCRIPTION........................................................................................ 17
2.1.4 JUMP TABLE DESCRIPTION............................................................................................... 19
2.1.5 CHECKSUM CALCULATION............................................................................................... 21
2.2 DATA MEMORY (RAM)................................................................................................................ 22
2.2.1 SYSTEM REGISTER .............................................................................................................. 22
2.2.1.1 SYSTEM REGISTER TABLE ............................................................................................ 22
2.2.1.2 SYSTEM REGISTER DESCRIPTION ............................................................................... 22
2.2.1.3 BIT DEFINITION of SYSTEM REGISTER....................................................................... 23
2.2.2 ACCUMULATOR ................................................................................................................... 25
2.2.3 PROGRAM FLAG................................................................................................................... 26
2.2.4 PROGRAM COUNTER........................................................................................................... 27
2.2.5 H, L REGISTERS..................................................................................................................... 30
2.2.6 Y, Z REGISTERS..................................................................................................................... 31
2.2.7 R REGISTER ........................................................................................................................... 31
2.3 ADDRESSING MODE .................................................................................................................... 32
2.3.1 IMMEDIATE ADDRESSING MODE .................................................................................... 32
2.3.2 DIRECTLY ADDRESSING MODE ....................................................................................... 32
2.3.3 INDIRECTLY ADDRESSING MODE................................................................................... 32
2.4 STACK OPERATION...................................................................................................................... 33
2.4.1 OVERVIEW............................................................................................................................. 33
2.4.2 STACK REGISTERS............................................................................................................... 34
2.4.3 STACK OPERATION EXAMPLE.......................................................................................... 35
2.5 CODE OPTION TABLE.................................................................................................................. 36
2.5.1 High_Clk code option............................................................................................................... 36
2.5.2 Low_Clk code option ............................................................................................................... 36
2.5.3 Fcpu code option ...................................................................................................................... 36
2.5.4 Reset_Pin code option .............................................................................................................. 37
2.5.5 Security code option................................................................................................................. 37
2.5.6 Noise Filter code option ........................................................................................................... 37
3
3
3RESET..................................................................................................................................................... 38
3.1 OVERVIEW..................................................................................................................................... 38
3.2 POWER ON RESET......................................................................................................................... 39
3.3 WATCHDOG RESET...................................................................................................................... 39
3.4 BROWN OUT RESET ..................................................................................................................... 39
3.5 THE SYSTEM OPERATING VOLTAGE....................................................................................... 40
3.6 LOW VOLTAGE DETECTOR (LVD)............................................................................................ 40
3.7 BROWN OUT RESET IMPROVEMENT....................................................................................... 42

SN8P2318 Series
C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 4 Version 1.5
3.8 EXTERNAL RESET........................................................................................................................ 43
3.9 EXTERNAL RESET CIRCUIT ....................................................................................................... 43
3.9.1 Simply RC Reset Circuit .......................................................................................................... 43
3.9.2 Diode & RC Reset Circuit........................................................................................................ 44
3.9.3 Zener Diode Reset Circuit........................................................................................................ 44
3.9.4 Voltage Bias Reset Circuit ....................................................................................................... 45
3.9.5 External Reset IC...................................................................................................................... 45
4
4
4SYSTEM CLOCK.................................................................................................................................. 46
4.1 OVERVIEW..................................................................................................................................... 46
4.2 FCPU (INSTRUCTION CYCLE)...................................................................................................... 46
4.3 SYSTEM HIGH-SPEED CLOCK.................................................................................................... 46
4.3.1 HIGH_CLK CODE OPTION................................................................................................... 47
4.3.2 INTERNAL HIGH-SPEED OSCILLATOR............................................................................ 47
4.3.3 EXTERNAL HIGH-SPEED OSCILLATOR........................................................................... 47
4.4 SYSTEM LOW-SPEED CLOCK..................................................................................................... 48
4.5 OSCM REGISTER........................................................................................................................... 49
4.6 SYSTEM CLOCK MEASUREMENT............................................................................................. 49
4.7 SYSTEM CLOCK TIMING............................................................................................................. 50
5
5
5SYSTEM OPERATION MODE........................................................................................................... 53
5.1 OVERVIEW..................................................................................................................................... 53
5.2 NORMAL MODE ............................................................................................................................ 54
5.3 SLOW MODE .................................................................................................................................. 54
5.4 POWER DOWN MDOE .................................................................................................................. 54
5.5 GREEN MODE ................................................................................................................................ 55
5.6 OPERATING MODE CONTROL MACRO.................................................................................... 56
5.7 WAKEUP......................................................................................................................................... 57
5.7.1 OVERVIEW............................................................................................................................. 57
5.7.2 WAKEUP TIME ...................................................................................................................... 57
5.7.3 P1W WAKEUP CONTROL REGISTER................................................................................ 59
6
6
6INTERRUPT........................................................................................................................................... 60
6.1 OVERVIEW..................................................................................................................................... 60
6.2 INTEN INTERRUPT ENABLE REGISTER................................................................................... 61
6.3 INTRQ INTERRUPT REQUEST REGISTER ................................................................................ 62
6.4 GIE GLOBAL INTERRUPT OPERATION .................................................................................... 63
6.5 PUSH, POP ROUTINE..................................................................................................................... 64
6.6 EXTERNAL INTERRUPT OPERATION (INT0)........................................................................... 65
6.7 INT1 (P0.1) INTERRUPT OPERATION......................................................................................... 66
6.8 T0 INTERRUPT OPERATION........................................................................................................ 67
6.9 TC0 INTERRUPT OPERATION..................................................................................................... 68
6.10 T1 INTERRUPT OPERATION........................................................................................................ 69
6.11 MULTI-INTERRUPT OPERATION............................................................................................... 70
7
7
7I/O PORT ................................................................................................................................................ 71
7.1 OVERVIEW..................................................................................................................................... 71
7.2 I/O PORT MODE ............................................................................................................................. 72
7.3 I/O PULL UP REGISTER ................................................................................................................ 74
7.4 I/O PORT DATA REGISTER.......................................................................................................... 75
8
8
8TIMERS .................................................................................................................................................. 76
8.1 WATCHDOG TIMER...................................................................................................................... 76
8.2 T0 8-BIT BASIC TIMER........................................................................................................................ 78
8.2.1 OVERVIEW............................................................................................................................. 78
8.2.2 T0 Timer Operation.................................................................................................................. 79
8.2.3 T0M MODE REGISTER ......................................................................................................... 80

SN8P2318 Series
C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 5 Version 1.5
8.2.4 T0C COUNTING REGISTER................................................................................................. 80
8.2.5 T0 TIMER OPERATION EXAMPLE..................................................................................... 81
8.3 TC0 8-BIT TIMER/COUNTER ....................................................................................................... 82
8.3.1 OVERVIEW............................................................................................................................. 82
8.3.2 TC0 TIMER OPERATION...................................................................................................... 83
8.3.3 TC0M MODE REGISTER....................................................................................................... 84
8.3.4 TC0C COUNTING REGISTER .............................................................................................. 84
8.3.5 TC0R AUTO-RELOAD REGISTER....................................................................................... 85
8.3.6 TC0D PWM DUTY REGISTER ............................................................................................. 85
8.3.7 TC0 EVENT COUNTER......................................................................................................... 86
8.3.8 PULSE WIDTH MODULATION (PWM) .............................................................................. 86
8.3.9 TC0 TIMER OPERATION EXAMPLE.................................................................................. 87
8.4 T1 16-BIT TIMER WITH CAPTURE TIMER FUNCTION .......................................................................... 89
8.4.1 OVERVIEW............................................................................................................................. 89
8.4.2 T1 TIMER OPERATION......................................................................................................... 90
8.4.3 T1M MODE REGISTER ......................................................................................................... 91
8.4.4 T1CH, T1CL 16-bit COUNTING REGISTERS...................................................................... 92
8.4.5 T1 CPATURE TIMER OPERATION ..................................................................................... 93
8.4.6 CAPTURE TIMER CONTROL REGISTERS ........................................................................ 94
8.4.7 10-bit Event Counter Function................................................................................................. 94
8.4.8 T1VCH, T1VCL 10-bit EVENT COUNTER REGISTERS.................................................... 95
8.4.9 T1 TIMER OPERATION EXAMPLE..................................................................................... 96
9
9
9RESISTANCE TO FREQURNCY CONVERTER (RFC)................................................................. 98
9.1 OVERVIEW..................................................................................................................................... 98
9.2 RFC APPLICATION CIRCUIT....................................................................................................... 99
9.3 RFC OPERATION........................................................................................................................... 99
9.4 RFCM REGISTER......................................................................................................................... 100
9.5 RFC OPERATION EXAMPLE ..................................................................................................... 101
1
1
10
0
04X32 LCD DRIVER......................................................................................................................... 102
10.1 OVERVIEW................................................................................................................................... 102
10.2 LCD REGISTERS.......................................................................................................................... 102
10.3 C-TYPE LCD MODE..................................................................................................................... 103
10.4 R-TYPE LCDMODE..................................................................................................................... 104
10.5 LCD RAM MAP............................................................................................................................. 105
10.6 LCD WAVEFORM........................................................................................................................ 106
1
1
11
1
1INSTRUCTION TABLE ................................................................................................................. 107
1
1
12
2
2ELECTRICAL CHARACTERISTIC............................................................................................ 108
12.1 ABSOLUTE MAXIMUM RATING.............................................................................................. 108
12.2 ELECTRICAL CHARACTERISTIC............................................................................................. 108
12.3 CHARACTERISTIC GRAPHS ..................................................................................................... 109
1
1
13
3
3DEVELOPMENT TOOL ................................................................................................................ 110
13.1 SN8P2318 EV-KIT .......................................................................................................................... 110
13.2 ICE AND EV-KIT APPLICATION NOTIC.................................................................................... 111
1
1
14
4
4OTP PROGRAMMING PIN........................................................................................................... 112
14.1 WRITER TRANSITION BOARD SOCKET PIN ASSIGNMENT............................................... 112
14.2 SN8P2317 /SN8P2318 OTP PROGRAMMING TOOL ........................................................................ 113
14.3 PROGRAMMING PIN MAPPING:............................................................................................... 114
1
1
15
5
5MARKING DEFINITION............................................................................................................... 115
15.1 INTRODUCTION.......................................................................................................................... 115
15.2 MARKING INDETIFICATION SYSTEM.................................................................................... 115
15.3 MARKING EXAMPLE ................................................................................................................. 115
15.4 DATECODE SYSTEM.................................................................................................................. 116

SN8P2318 Series
C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 6 Version 1.5
1
1
16
6
6PACKAGE INFORMATION ......................................................................................................... 117
16.1 LQFP 64 PIN .................................................................................................................................. 117
16.2 LQFP 48 PIN .................................................................................................................................. 118

SN8P2318 Series
C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 7 Version 1.5
1
1
1 PRODUCT OVERVIEW
1.1 FEATURES
Features Selection Table
CHIP
ROM
RAM
Stack
Timer
PWM
RFC
Ext.
Int
I/O
LCD Driver
Package
T0
TC0
T1
Dot
C-type
R-type
SN8P2308
4K*16
128*8
8
V
V
1
1
2-ch
1
25
4*32
V
V
LQFP64
SN8P2318
4K*16
128*8
8
V
V
1
1
5-ch
2
29
4*32
V
V
LQFP64
SN8P2317
4K*16
128*8
8
V
V
1
1
5-ch
2
25
4*21
V
V
LQFP48

Memory configuration

Fcpu (Instruction cycle)
ROM size: 4K * 16 bits.
Fcpu = Fosc/1, Fpsc/2, Fosc/4, Fosc/8, Fosc/16.
RAM size: 128 * 8 bits.

One 8-bit basic timer. (T0).

8 levels stack buffer.

One 8-bit timer/counter (TC0) with duty/cycle

5 interrupt sources
programmable PWM and IR carry signal.
3 internal interrupts: T0, TC0, T1

One 16-bit timer/counter (T1) with auto-reload/
2 external interrupt: INT0, INT1
counter/capture timer supports for RFC function.

5-Channel RFC (Resistor to Frequency Converter)

I/O pin configuration

4*32 LCD Driver (128 dots) supports internal C type
Bi-directional: P0, P1, P5.
and external R type bias.
Bi-directional and shared with SEG pins: P2, P3.

On chip watchdog timer and clock source is
Input only shared with reset pin: P0.3.
Internal low clock RC type (16KHz @3V, 32KHz
Wakeup: P0, P1 level change.
@5V).
Pull-up resisters: P0, P1, P2, P3, P5.
External interrupt pin:

4 system clocks
P0.0 trigger edge controlled by PEDGE.
External high clock: RC type up to 10 MHz
P0.1 level change trigger.
External high clock: Crystal type up to 16 MHz
Event counter input:
Internal high clock: PLL 16MHz from 32K X’tal.
TC0 event counter input pin: P0.0
Internal low clock: RC type 16KHz(3V), 32KHz(5V)
T1 event counter input pin: P0.2
RFC channel pins: P1.0~P1.4.

4 operating modes
Normal mode: Both high and low clock active

3-Level LVD: 2.0V/2.4V/3.6V
Slow mode: Low clock only.

Powerful instructions
Sleep mode: Both high and low clock stop
Instruction’s length is one word.
Green mode: Periodical wakeup by timer
Most of instructions are one cycle only.
All ROM area JMP/CALL instruction.

Package (Chip form support)
All ROM area lookup table function (MOVC).
LQFP 48 pin
LQFP 64 pin

SN8P2318 Series
C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 8 Version 1.5
1.2 SYSTEM BLOCK DIAGRAM
INTERRUPT
CONTROL
EXTERNAL
HIGH OSC.
ACC
INTERNAL
LOW RC
TIMING GENERATOR
RAM
SYSTEM REGISTERS
3-Level LVD
(Low Voltage Detector)
WATCHDOG TIMER
TIMER & COUNTER
P0 P1
RFC
ALU
PC
FLAGS
IR OTP
ROM
P2
INTERNAL PLL
16MHz
C-TYPE BIAS
RFCO
4*32 LCD DRIVER
RFC0~RFC4
PWM PWM0
COM0~COM3,
SEG0~SEG31
P3 P5
1.3 PIN ASSIGNMENT
SN8P2318F (LQFP 64 pin)
VDD
LXOUT/FLO
LXIN
XOUT/FCPUO/P0.4
XIN
VSS
V1
C+
C-
V2
VLCD
COM0
COM1
COM2
COM3
SEG0
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
P0.2/T1IN
1
O
48
SEG1
P0.1/INT1
2
47
SEG2
P0.0/INT0
3
46
SEG3
P1.0/RFC0
4
45
SEG4
P1.1/RFC1
5
44
SEG5
P1.2/RFC2
6
43
SEG6
P1.3/RFC3
7
42
SEG7
P1.4/RFC4
8
SN8P2318F
41
SEG8
P1.5
9
40
SEG9
P1.6/RFCOUT
10
39
SEG10
NC
11
38
SEG11
NC
12
37
SEG12
NC
13
36
SEG13
NC
14
35
SEG14
NC
15
34
SEG15
P5.4/PWM0
16
33
SEG16/P3.7
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
P0.3/RST/VPP
SEG31/P2.0
SEG30/P2.1
SEG29/P2.2
SEG28/P2.3
SEG27/P2.4
SEG26/P2.5
SEG25/P2.6
SEG24/P2.7
SEG23/P3.0
SEG22/P3.1
SEG21/P3.2
SEG20/P3.3
SEG19/P3.4
SEG18/P3.5
SEG17/P3.6

SN8P2318 Series
C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 9 Version 1.5
SN8P2317F (LQFP 48 pin)
LXOUT/FLO
LXIN
XOUT/FCPUO/P0.4
XIN
VSS
V1
C+
C-
V2
VLCD
COM0
COM1
48
47
46
45
44
43
42
41
40
39
38
37
VDD
1
O
36
COM2
P0.2/T1IN
2
35
COM3
P0.1/INT1
3
34
SEG7
P0.0/INT0
4
33
SEG8
P1.0/RFC0
5
32
SEG9
P1.1/RFC1
6
SN8P2317F
31
SEG10
P1.2/RFC2
7
30
SEG11
P1.3/RFC3
8
29
SEG12
P1.4/RFC4
9
28
SEG13
P1.5
10
27
SEG14
P1.6/RFCOUT
11
26
SEG15
P5.4/PWM0
12
25
SEG20/P3.3
13
14
15
16
17
18
19
20
21
22
23
24
P0.3/RST/VPP
SEG31/P2.0
SEG30/P2.1
SEG29/P2.2
SEG28/P2.3
SEG27/P2.4
SEG26/P2.5
SEG25/P2.6
SEG24/P2.7
SEG23/P3.0
SEG22/P3.1
SEG21/P3.2

SN8P2318 Series
C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 10 Version 1.5
1.4 PIN DESCRIPTIONS
PIN NAME
TYPE
DESCRIPTION
VDD, VSS
P
Power supply input pins for digital and analog circuit (VLCD and VDD pin have to short
together).
VLCD
P
LCD power source (VLCD and VDD pin have to short together).
C+, C-
P
LCD C-type charge pump output pins.
LCD C-type: Connected a 0.1uF capacitor.
LCD R-type: Low status.
V1, V2
P
LCD bias voltage. 1/2 bias: V1 = V2. 1/3 bias: V1 = 1/3*Vdd, V2 = 2/3*Vdd.
LCD R-type: Connect external resistors to decide bias voltage and current.
P0.3/RST/VPP
I, P
RST: System external reset input pin. Schmitt trigger structure, active “low”, normal stay to “high”.
VPP: OTP 12.3V power input pin in programming mode.
P0.3: Input only pin with Schmitt trigger structure and no pull-up resistor. Level change wake-up.
XIN
I/O
XIN: Oscillator input pin while external oscillator enable (crystal and RC).
In PLL_16M mode, XIN connects a decouple 0.1uF capacitor to VDD.
XOUT/P0.4/FCPUO
I/O
XOUT: Oscillator output pin while external crystal enable.
P0.4: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level
change wake-up.
FCPUO: Fcpu clock signal output pin as High_Clk code option=RC.
LXIN
I
LXIN: Low-speed oscillator input pin.
LXOUT/FLO
O
LXOUT: Low-speed oscillator output pin.
FLO: Low-speed RC type oscillator Flosc freq output pin as Low_Clk code option=RC.
P0.0/INT0
I/O
P0.0: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level
change wake-up.
INT0: External interrupt 0 input pin.
TC0 event counter input pin.
P0.1/INT1
I/O
P0.1: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level
change wake-up.
INT1: External interrupt 1 input pin.
P0.2/T1IN
I/O
P0.2: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level
change wake-up.
T1 event counter input pin.
P1.0/RFC0
I/O
P1.0: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level
change wake-up.
RFC0: RFC channel 0.
P1.1/RFC1
I/O
P1.1: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level
change wake-up.
RFC1: RFC channel 1.
P1.2/RFC2
I/O
P1.2: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level
change wake-up.
RFC2: RFC channel 2.
P1.3/RFC3
I/O
P1.3: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level
change wake-up.
RFC3: RFC channel 3.
P1.4/RFC4
I/O
P1.4: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level
change wake-up.
RFC4: RFC channel 4.
P1.5
I/O
P1.5: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level
change wake-up.
P1.6/RFCOUT
I/O
P1.6: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters. Level
change wake-up.
RFCOUT: RFC oscillating signal output pin.
P5.4/ PWM0
I/O
P5.4: Bi-direction pin. Schmitt trigger structure as input mode. Built-in pull-up resisters.
PWM0: Programmable PWM output pin from TC0.
P2[7:0]/
SEG[31:24]
I/O
P2[7:0]: Bi-direction pin. No Schmitt trigger structure. Built-in pull-up resisters.
SEG[31:24]: LCD segment output pins.
P3[7:0]/
SEG[23:16]
I/O
P3[7:0]: Bi-direction pin. No Schmitt trigger structure. Built-in pull-up resisters.
SEG[23:16]: LCD segment output pins.
SEG[15:0]
O
SEG[15:0]: LCD segment output pins.
COM[3:0]
O
COM[3:0]: LCD common 0~3 output pins.

SN8P2318 Series
C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 11 Version 1.5
1.5 PIN CIRCUIT DIAGRAMS
Reset shared pin structure:
Pin
Ext. Reset
Code Option
I/O Input Bus
Reset
GPIO pin structure:
Pull-Up
Resistor
Output
Latch
Pin
PnUR
PnM
I/O Input Bus
I/O Output Bus
PnM
Specific Output Function (e.g. PWM, RFC…) shared pin structure:
Pull-Up
Resistor
Output
Latch
Pin
PnUR
PnM
Output Bus
PnM
IO Input Bus
Specific Output
Function Control Bit
Specific Output
Bus
*. Specific Output
Function Control Bit
LCD SEG shared pin structure:
Pull-Up
Resistor
Output
Latch
Pin
PnUR
PnM
Output Bus
PnM
IO Input Bus
LCD SEG Control
Register
LCD Segment
Signal
LCD Segment Signal Generator

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C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 12 Version 1.5
Oscillator shared pin structure:
XIN:
Pin Name
Oscillator Code Option
Description
XIN
RC, 4M X’tal, 12M X’tal,
PLL_16M
Oscillator input pin.
Pull-Up
Resistor
Output
Latch
Pin
PnUR
PnM
I/O Input Bus
I/O Output
Bus
PnM
High_Clk
Code Option
High Speed
Oscillator Driver
XOUT/FCPUO/P0.4:
Pin Name
Oscillator Code Option
Description
XOUT
4M X’tal, 12M X’tal
Oscillator output pin.
FCPUO
RC
Fcpu signal output pin to measure RC frequency for adjusting RC parameters.
P0.4
PLL_16M
GPIO mode.
Pull-Up
Resistor
Output
Latch
Pin
PnUR
PnM
PnM
High_Clk
Code Option
High Speed
Oscillator Driver
Fcpu
Signal
I/O Input Bus
I/O Output
Bus
LXIN:
Pin Name
Oscillator Code Option
Description
LXIN
RC, 32K X’tal
Oscillator input pin.
Pin
Low_Clk
Code Option
32K X’tal Driver
RC Driver
LXOUT/FLO:
Pin Name
Oscillator Code Option
Description
LXOUT
32K X’tal
Oscillator output pin.
FLO
RC
Flosc signal output pin to measure RC frequency for adjusting RC parameters.
Pin
Low_Clk
Code Option
32K X’tal Driver
Flosc signal

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C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 13 Version 1.5
2
2
2 CENTRAL PROCESSOR UNIT (CPU)
2.1 PROGRAM MEMORY (ROM)
4K words ROM
ROM
0000H
Reset vector
User reset vector
Jump to user start address
0001H
General purpose area
.
.
0007H
0008H
Interrupt vector
User interrupt vector
0009H
General purpose area
User program
.
.
000FH
0010H
0011H
.
.
.
.
.
0FFCH
End of user program
0FFDH
Reserved
0FFEH
0FFFH
The ROM includes Reset vector, Interrupt vector, General purpose area and Reserved area. The Reset vector is
program beginning address. The Interrupt vector is the head of interrupt service routine when any interrupt occurring.
The General purpose area is main program area including main loop, sub-routines and data table.

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C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 14 Version 1.5
2.1.1 RESET VECTOR (0000H)
A one-word vector address area is used to execute system reset.
Power On Reset (NT0=1, NPD=0).
Watchdog Reset (NT0=0, NPD=0).
External Reset (NT0=1, NPD=1).
After power on reset, external reset or watchdog timer overflow reset, then the chip will restart the program from
address 0000h and all system registers will be set as default values. It is easy to know reset status from NT0, NPD
flags of PFLAG register. The following example shows the way to define the reset vector in the program memory.
Example: Defining Reset Vector
ORG
0
; 0000H
JMP
START
; Jump to user program address.
…
ORG
10H
START:
; 0010H, The head of user program.
…
; User program
…
ENDP
; End of program

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C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 15 Version 1.5
2.1.2 INTERRUPT VECTOR (0008H)
A 1-word vector address area is used to execute interrupt request. If any interrupt service executes, the program
counter (PC) value is stored in stack buffer and jump to 0008h of program memory to execute the vectored interrupt.
Users have to define the interrupt vector. The following example shows the way to define the interrupt vector in the
program memory.
Note: ”PUSH”, “POP”instructions save and load ACC/PFLAG without (NT0, NPD). PUSH/POP buffer is a
unique buffer and only one level.
Example: Defining Interrupt Vector. The interrupt service routine is following ORG 8.
.CODE
ORG
0
; 0000H
JMP
START
; Jump to user program address.
…
ORG
8
; Interrupt vector.
PUSH
; Save ACC and PFLAG register to buffers.
…
…
POP
; Load ACC and PFLAG register from buffers.
RETI
; End of interrupt service routine
…
START:
; The head of user program.
…
; User program
…
JMP
START
; End of user program
…
ENDP
; End of program

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C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 16 Version 1.5
Example: Defining Interrupt Vector. The interrupt service routine is following user program.
.CODE
ORG
0
; 0000H
JMP
START
; Jump to user program address.
…
ORG
8
; Interrupt vector.
JMP
MY_IRQ
; 0008H, Jump to interrupt service routine address.
ORG
10H
START:
; 0010H, The head of user program.
…
; User program.
…
…
JMP
START
; End of user program.
…
MY_IRQ:
;The head of interrupt service routine.
PUSH
; Save ACC and PFLAG register to buffers.
…
…
POP
; Load ACC and PFLAG register from buffers.
RETI
; End of interrupt service routine.
…
ENDP
; End of program.
Note: It is easy to understand the rules of SONIX program from demo programs given above. These
points are as following:
1. The address 0000H is a “JMP”instruction to make the program starts from the beginning.
2. The address 0008H is interrupt vector.
3. User’s program is a loop routine for main purpose application.

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C-type LCD, RFC 8-Bit Micro-Controller
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2.1.3 LOOK-UP TABLE DESCRIPTION
In the ROM’s data lookup function, Y register is pointed to middle byte address (bit 8~bit 15) and Z register is pointed
to low byte address (bit 0~bit 7) of ROM. After MOVC instruction executed, the low-byte data will be stored in ACC and
high-byte data stored in R register.
Example: To look up the ROM data located “TABLE1”.
B0MOV
Y, #TABLE1$M
; To set lookup table1’s middle address
B0MOV
Z, #TABLE1$L
; To set lookup table1’s low address.
MOVC
; To lookup data, R = 00H, ACC = 35H
; Increment the index address for next address.
INCMS
Z
; Z+1
JMP
@F
; Z is not overflow.
INCMS
Y
; Z overflow (FFH 00), Y=Y+1
NOP
;
;
@@:
MOVC
; To lookup data, R = 51H, ACC = 05H.
…
;
TABLE1:
DW
0035H
; To define a word (16 bits) data.
DW
5105H
DW
2012H
…
Note: The Y register will not increase automatically when Z register crosses boundary from 0xFF to
0x00. Therefore, user must be take care such situation to avoid look-up table errors. If Z register is
overflow, Y register must be added one. The following INC_YZ macro shows a simple method to process
Y and Z registers automatically.
Example: INC_YZ macro.
INC_YZ
MACRO
INCMS
Z
; Z+1
JMP
@F
; Not overflow
INCMS
Y
; Y+1
NOP
; Not overflow
@@:
ENDM

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C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 18 Version 1.5
Example: Modify above example by “INC_YZ”macro.
B0MOV
Y, #TABLE1$M
; To set lookup table1’s middle address
B0MOV
Z, #TABLE1$L
; To set lookup table1’s low address.
MOVC
; To lookup data, R = 00H, ACC = 35H
INC_YZ
; Increment the index address for next address.
;
@@:
MOVC
; To lookup data, R = 51H, ACC = 05H.
…
;
TABLE1:
DW
0035H
; To define a word (16 bits) data.
DW
5105H
DW
2012H
…
The other example of look-up table is to add Y or Z index register by accumulator. Please be careful if “carry” happen.
Example: Increase Y and Z register by B0ADD/ADD instruction.
B0MOV
Y, #TABLE1$M
; To set lookup table’s middle address.
B0MOV
Z, #TABLE1$L
; To set lookup table’s low address.
B0MOV
A, BUF
; Z = Z + BUF.
B0ADD
Z, A
B0BTS1
FC
; Check the carry flag.
JMP
GETDATA
; FC = 0
INCMS
Y
; FC = 1. Y+1.
NOP
GETDATA:
;
MOVC
; To lookup data. If BUF = 0, data is 0x0035
; If BUF = 1, data is 0x5105
; If BUF = 2, data is 0x2012
…
TABLE1:
DW
0035H
; To define a word (16 bits) data.
DW
5105H
DW
2012H
…

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C-type LCD, RFC 8-Bit Micro-Controller
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2.1.4 JUMP TABLE DESCRIPTION
The jump table operation is one of multi-address jumping function. Add low-byte program counter (PCL) and ACC
value to get one new PCL. If PCL is overflow after PCL+ACC, PCH adds one automatically. The new program counter
(PC) points to a series jump instructions as a listing table. It is easy to make a multi-jump program depends on the
value of the accumulator (A).
Note: PCH only support PC up counting result and doesn’t support PC down counting. When PCL is
carry after PCL+ACC, PCH adds one automatically. If PCL borrow after PCL–ACC, PCH keeps value and
not change.
Example: Jump table.
ORG
0X0100
; The jump table is from the head of the ROM boundary
B0ADD
PCL, A
; PCL = PCL + ACC, PCH + 1 when PCL overflow occurs.
JMP
A0POINT
; ACC = 0, jump to A0POINT
JMP
A1POINT
; ACC = 1, jump to A1POINT
JMP
A2POINT
; ACC = 2, jump to A2POINT
JMP
A3POINT
; ACC = 3, jump to A3POINT
SONIX provides a macro for safe jump table function. This macro will check the ROM boundary and move the jump
table to the right position automatically. The side effect of this macro maybe wastes some ROM size.
Example: If “jump table” crosses over ROM boundary will cause errors.
@JMP_A
MACRO
VAL
IF
(($+1) !& 0XFF00) !!= (($+(VAL)) !& 0XFF00)
JMP
($ | 0XFF)
ORG
($ | 0XFF)
ENDIF
B0ADD
PCL, A
ENDM
Note: “VAL”is the number of the jump table listing number.
Example: “@JMP_A”application in SONIX macro file called “MACRO3.H”.
B0MOV
A, BUF0
; “BUF0”is from 0 to 4.
@JMP_A
5
; The number of the jump table listing is five.
JMP
A0POINT
; ACC = 0, jump to A0POINT
JMP
A1POINT
; ACC = 1, jump to A1POINT
JMP
A2POINT
; ACC = 2, jump to A2POINT
JMP
A3POINT
; ACC = 3, jump to A3POINT
JMP
A4POINT
; ACC = 4, jump to A4POINT

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C-type LCD, RFC 8-Bit Micro-Controller
SONiX TECHNOLOGY CO., LTD Page 20 Version 1.5
If the jump table position is across a ROM boundary (0x00FF~0x0100), the “@JMP_A”macro will adjust the jump table
routine begin from next RAM boundary (0x0100).
Example: “@JMP_A”operation.
; Before compiling program.
ROM address
B0MOV
A, BUF0
; “BUF0”is from 0 to 4.
@JMP_A
5
; The number of the jump table listing is five.
0X00FD
JMP
A0POINT
; ACC = 0, jump to A0POINT
0X00FE
JMP
A1POINT
; ACC = 1, jump to A1POINT
0X00FF
JMP
A2POINT
; ACC = 2, jump to A2POINT
0X0100
JMP
A3POINT
; ACC = 3, jump to A3POINT
0X0101
JMP
A4POINT
; ACC = 4, jump to A4POINT
; After compiling program.
ROM address
B0MOV
A, BUF0
; “BUF0”is from 0 to 4.
@JMP_A
5
; The number of the jump table listing is five.
0X0100
JMP
A0POINT
; ACC = 0, jump to A0POINT
0X0101
JMP
A1POINT
; ACC = 1, jump to A1POINT
0X0102
JMP
A2POINT
; ACC = 2, jump to A2POINT
0X0103
JMP
A3POINT
; ACC = 3, jump to A3POINT
0X0104
JMP
A4POINT
; ACC = 4, jump to A4POINT