TVME200 User Manual Issue 1.1.0 Page 5 of 26
Table of Figures
FIGURE 1-1 : BLOCK DIAGRAM......................................................................................................................6
FIGURE 2-1 : TECHNICAL SPECIFICATION...................................................................................................7
FIGURE 3-1 : ROTARY SWITCH S1 – S6........................................................................................................8
FIGURE 3-2 : CONFIGURATION STEPS.........................................................................................................8
FIGURE 3-3 : VME A16 BASE ADDRESS .......................................................................................................9
FIGURE 3-4 : VME A16 ADDRESS MAP (S3 = “0” TO “7”) ...........................................................................10
FIGURE 3-5 : VME A16 ADDRESS MAP (S3 = “8” TO “F”)...........................................................................10
FIGURE 3-6 : INTERRUPT MAPPING ...........................................................................................................11
FIGURE 3-7 : VME INTERRUPT MAPPING BY S3 .......................................................................................11
FIGURE 3-8 : VME A24/A32 MEMORY ENABLE AND SIZE.........................................................................12
FIGURE 3-9 : VME MEMORY SIZE BY S4 ....................................................................................................12
FIGURE 3-10: VME A24/A32 BASE ADDRESS.............................................................................................13
FIGURE 3-11: VME A24/A32 ADDRESS MAP...............................................................................................14
FIGURE 4-1 : IP IRQ CONFIGURATION REGISTERS (IP A / IP B)..............................................................15
FIGURE 4-2 : IP IRQ CONFIGURATION REGISTERS (IP C / IP D).............................................................16
FIGURE 4-3 : IP CONTROL REGISTERS (IP A / IP B)..................................................................................17
FIGURE 4-4 : IP CONTROL REGISTERS (IP C / IP D).................................................................................18
FIGURE 5-1 : IP STROBE SIGNAL................................................................................................................19
FIGURE 6-1 : FRONT PANEL.........................................................................................................................20
FIGURE 7-1 : IP ACK LED..............................................................................................................................21
FIGURE 7-2 : IP POWER LED........................................................................................................................21
FIGURE 8-1 : J3 PIN ASSIGNMENT..............................................................................................................22
FIGURE 8-2 : J4 AND J5 PIN ASSIGNMENT.................................................................................................22
FIGURE 9-1 : IP J1 LOGIC INTERFACE PIN ASSIGNMENT........................................................................23
FIGURE 9-2 : VMEBUS P1 CONNECTOR.....................................................................................................24
FIGURE 9-3 : VMEBUS P2 CONNECTOR TVME200-10 ..............................................................................25
FIGURE 9-4 : VMEBUS P2 CONNECTOR TVME200-20 ..............................................................................26
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
