Texas Instruments TPA3120D2 User manual

User's GuideSLOU189A – March 2007 – Revised April 2007
TPA3120D2 Audio Power Amplifier EVM
Contents1 Introduction .......................................................................................... 22 Operation ............................................................................................ 33 TPA3120D2 EVM Schematic ..................................................................... 44 TPA3120D2 EVM PCB Layers ................................................................... 55 TPA3120D2 Evaluation Module Parts List ...................................................... 7
List of Figures
1 TPA3120D2 Audio Power Amplifier EVM ....................................................... 22 TPA3120D2 EVM Schematic ..................................................................... 43 Top Side Layout .................................................................................... 54 Bottom Side Layout ................................................................................ 6
List of Tables
1 TPA3120D2 EVM Specifications ................................................................. 22 Gain Settings ........................................................................................ 33 TPA3120D2 EVM Bill of Materials................................................................ 7
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1 Introduction
Introduction
The TPA3120D2 evaluation module consists of a single 25-W, class-D, stereo audio power amplifiercomplete with a small number of external components mounted on a circuit board that can be used todirectly drive speakers with an external analog audio source as the input.
Table 1. TPA3120D2 EVM Specifications
VALUE UNIT
V
CC
Supply voltage range 10 to 30 VI
CC
Supply current, maximum 2 AP
O
Continuous output power, P
O
: 4 Ω, V
CC
= 27 V, THD+N = 10% 24 WZ
L
Minimum load impedance 3.2 Ω
Figure 1. TPA3120D2 Audio Power Amplifier EVM
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2 Operation
2.1 Quick Start List for Stand-Alone Operation
2.1.1 Power Supply
2.1.2 Evaluation Module Preparations
Operation
Follow these steps to use the TPA3120D2EVM stand-alone or when connecting it into existing circuits orequipment. Connections to the EVM module can be made by inserting stripped wire, or using bananaplugs for the power supply and output connections. The inputs accept standard RCA plugs.
1. Ensure that all external power sources are set to OFF.2. Connect an external regulated power supply adjusted from 10 V to 30 V to the module VCC (J7) andGND (J8) banana jacks taking care to observe marked polarity.
Inputs and Outputs:1. Connect an audio source to the input jacks, J9 and J10.2. Connect a speaker across GND (J5) and +ROUT (J6). Connect another speaker across LOUT (J3)and GND (J4)3. Install both gain jumpers GAIN0 (J1) and GAIN1 (J2). This sets the gain of the amplifier to the lowestlevel, 20 dB.
Control Inputs:1. SHUTDOWN: This terminal is active LOW. A LOW on the device terminal (<0.8 V) shuts down theamplifier; a HIGH (>2 V) on the device terminal places the amplifier in the active state. Holding downswitch SW1 places the amplifier in the SHUTDOWN state. Releasing SW1 returns the amplifier to theactive state. This terminal is V
CC
compliant.2. MUTE: This terminal is active HIGH. A HIGH (>2 V) on this terminal will immediately terminate audioplayback through the speakers; a LOW (<0.8 V) enables the device. The outputs remain switching withfifty percent duty cycle. SW2 on the EVM controls the state of the MUTE terminal. Holding down switchSW2 places the amplifier in the MUTE state. Releasing SW2 returns the amplifier to the active state.This terminal is V
CC
compliant.3. GAIN0/GAIN1: Together, these terminals determine the gain of the amplifier. See Table 2 . Installing ajumper in J1 or J2 sets the respective terminal to GND. Removing the jumper sets the respectiveterminals to VCC. Removing jumpers increases the gain while installing jumpers decreases the gain.Logic levels are TTL compatible. These terminals are V
CC
compliant.4. Power-off Depop Circuit: Additional circuitry to quiet power-off pop has been provided on the EVM.This circuit consists of shunt regulator D1, bipolar transistor Q4, and the surrounding components. Thiscircuit is activated by installing the jumper J11 which connects Vcc to the network. The depop circuithas two different modes of operation. When R13 is installed, this circuit slowly pulls down the voltageon the Bypass pin when power is removed resulting in a controlled reduction of the Class D outputduty cycle. If R17 is installed, the network reduces the pop by pulling down the shutdown pin atpower-off. This approach can be used if the power supply operates in such a way that there is asignificant time delay between removal of power and the point where Vcc falls below the chip UVLOlevel, which is approximately 8 volts.
Table 2. Gain Settings
GAIN0 (J1) GAIN1 (J2) Amplifier Gain (dB)
ON ON 20ON OFF 26OFF ON 32OFF OFF 36
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2.1.3 Power Up
3 TPA3120D2 EVM Schematic
RIGHT_OUT
LEFT_IN
RIGHT_IN
LEFT_OUT
VCC
VCC
VCC
VCC
VCC
VCC
C9 open
C16 open
Circuit inside dotted line is
for power down de-pop
improvement.
R3
10K
R3
10K
J4
-LOUT
J4
-LOUT
TP4TP4
SW1
SHUTDOWN
SW1
SHUTDOWN
U1
TPA3120
U1
TPA3120
PVCCL
1
SD
2
PVCCL
3
MUTE
4
LIN
5
RIN
6
BYPASS
7
AGND
8
AGND
9
PVCCR
10
VCLAMP
11
PVCCR
12 PGNDR 13
PGNDR 14
ROUT 15
BSR 16
GAIN1 17
GAIN0 18
AVCC 19
AVCC 20
BSL 21
LOUT 22
PGNDL 23
PGNDL 24
THERMAL
25
C14
0.1uF C14 0.1uF
TP5TP5
R6
4.75K
R6
4.75K
L2
22uH
L2
22uH
J7
VCC
J7
VCC
R12
10K
R12
10K
C6
1.0uF C6 1.0uF
R9
0
R9
0
D2
Dl4148
R4
10K
R4
10K
C18
0.01uF
C18
0.01uF
R17 open
10
R17 open
10
TP12
RGND
TP12
RGND
SW2
MUTE
SW2
MUTE
TP3TP3
C12 0.22uFC12 0.22uF C9
1.0uF
C9
1.0uF
R16
20K
R16
20K
R7
4.75K
R7
4.75K
+
C8
470uF
+
C8
470uF
1
2
J8
GND
J8
GND
TP2TP2
J10
RIN
J10
RIN
2
3
1
R8
4.75K
R8
4.75K
J9
LIN
J9
LIN
2
3
1
R18 10K R18 10K
+
C10
470uF
+
C10
470uF
1 2
J11J11
1
2
TP10
GND
TP10
GND
C16
1.0uF
C16
1.0uF
R1
10K
R1
10K
C15 0.22uFC15 0.22uF
R13
150K
R13
150K
TP7
RIGHT_OUT
TP7
RIGHT_OUT
J5
-ROUT
J5
-ROUT
J1
GAIN0
J1
GAIN0
1
2
+
C17
470uF
+
C17
470uF
1 2
C3
1.0uF
C3
1.0uF
R15 open
1M
R15 open
1M
J3
+LOUT
J3
+LOUT
TP11
LGND
TP11
LGND
TP1
LEFT_IN
TP1
LEFT_IN
C19
0.68uF
C19
0.68uF
R2
10K
R2
10K
C
E
B
Q4
MMBT3904
C
E
B
Q4
MMBT3904
1
23
+
C2
470uF
+
C2
470uF
1
2
J6
+ROUT
J6
+ROUT
R10
0
R10
0
C11 open
10pF
C11 open
10pF
10pF
C21 open
10pF
C13
10uF C13 10uF
C4
1.0uF
C4
1.0uF
J2
GAIN1
J2
GAIN1
1
2
C7 0.1uFC7 0.1uF
C20
0.68uF
C20
0.68uF
TP6
LEFT_OUT
TP6
LEFT_OUT
R11
2.49K
R11
2.49K
10K
R19
10K
D1
TLV431ACDBZR
D1
TLV431ACDBZR
32
1
C1 0.1uFC1 0.1uF
TP9
INPUT_GND
TP9
INPUT_GND
TP8
RIGHT_IN
TP8
RIGHT_IN
L1
22uH
L1
22uH
C5
1.0uF C5 1.0uF
TPA3120D2 EVM Schematic
1. Verify correct voltage and input polarity, and turn the external power supplies ON.
The EVM should begin operation.1. Adjust the input signal.2. Adjust the control inputs to the desired settings.3. Adjust the amplifier gain by installing/removing the gain jumpers, J1 and J2.
Figure 2. TPA3120D2 EVM Schematic
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4 TPA3120D2 EVM PCB Layers
TPA3120D2 EVM PCB Layers
The following illustrations depict the TPA3120D2 EVM PCB layers.
Figure 3. Top Side Layout
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TPA3120D2 EVM PCB Layers
Figure 4. Bottom Side Layout
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5 TPA3120D2 Evaluation Module Parts List
TPA3120D2 Evaluation Module Parts List
Table 3. TPA3120D2 EVM Bill of MaterialsReference Description Size Qty Status Manufacturer Part
Number
Capacitor, ceramic, 0.1uF, +/-10%, X7R,C1, C7, C14 0603 3 TDK C1608X7R1H104KT50V
C2, C8, C10,
Capacitor, Electrolytic, 470uF, 35 V Radial 4 Nichicon UHE1V471MH06C17
C3, C4, C5, Capacitor, ceramic, 1.0uF, +/-10%, X7R,
0603 4 Taiyo Yuden EMK107BJ105KA-TRC6 16V
Capacitor, ceramic, 1.0uF, +/-10%, X7R,C9, C16 0805 2 open TDK C3216X7R1H105K50V
Capacitor, ceramic, 0.22uF, +/-10%, X7R,C12, C15 0603 2 TDK C1608X7R1C224KT16V
Capacitor, ceramic, 10uF, +80%/–20%,C13 1210 1 Murata GRM32DF51H106ZA01LY5V, 50V
C19, C20 Capacitor, metal poly, 0.68uF, 63V Radial 2 EPCOS, inc. B32529C684J
Inductor, 22uH, radial lead, ferriteL1-L2 Radial 2 Toko A7503AY-220Mmaterial, shielded
R1-R4 Resistor, chip, 10 kohm, 1/16 W, 5% 0603 4 Panasonic ERA-V15J103V
R6, R7 Resistor, chip, 4.7 kohm, 1/10 W, 5% 0603 2 Panasonic ERJ-3GEYJ472V
R9, R10 Resistor, chip, zero ohm, 1/10 W, 5% 0603 2 Panasonic ERJ-3GEY0R00V
J1-J2 Phono Jack, PC mount, switched 2 Switchcraft PJRAN1X1U03
Banana Jack w/knurled Thumbnut (nickelJ3-J8 6 Johnson 111-2223-001plate)
J9-J10 Header, 2 position, Male 2mm 2 Norcomp 2163-36-01-P2
JP9-JP10
SHUNT, 2MM 2mm 2 Specialty 2JM-G(shunts)
SWITCH, MOMENTARY, SMD, LOWSW1, SW2 2 Panasonic EVQ-PPBA25PROFILE
Standoffs, 5/8" length, 4-40 thread 4 Keystone 1808
Screws, 4-40, .375 4
24 pinU1 TPA3120D2PWP 1 TI TPA3120D2PWPTSSOP
The following parts comprise the power-off depop circuit which is enabled by installing J11.
Capacitor, ceramic, 10 pf, +/-10%, C0G,C11, C21 0603 2 open Murata GRM1885C2A100RA01D100V
Capacitor, ceramic, 0.01 uF, +/-10%, X7R,C18 0603 1 TDK C1608X7R1H103K50V
D1 Shunt Regulator, Adjustable SOT-23-3 1 Texas Instruments TLV431ACDBZR
D2 Rectifier, Silicon, 0.15 A, 75V mini MELF 1 Micro Commercial DL4148-TP
Q4 Transistor, NPN, AMP SOT-23 1 Fairchild Semiconductor MMBT3904
R8 Resistor, chip, 4.7 kohm, 1/10 W, 5% 0603 1 Panasonic ERJ-3GEYJ472V
R11 Resisitor, chip, 2.49 kohm, 1/10 W, 1% 0603 1 Vishay CRCW06032K49FKEA
R12, R18, R19 Resistor, chip, 10 kohm, 1/16 W, 5% 0603 3 Panasonic ERA-V15J103V
R13 Resistor, chip, 150 kohm, 1/10 W, 1% 0603 1 Vishay CRCW0603150KJNEA
R15 Resistor, chip, 1 Megohm, 1/10 W, 1% 0603 1 open Vishay CRCW06031M00FKEA
R16 Resistor, chip, 20 kohm, 1/10 W, 1% 0603 1 Vishay CRCW060320K0FKEA
R17 Resistor, chip, 10 ohm, 1/16 W, 1% 0603 1 open Vishay CRCW060310R0FKEA
J11 Header, 2 position, Male 2mm 1 open Norcomp 2163-36-01-P2
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EVALUATION BOARD/KIT IMPORTANT NOTICE
Texas Instruments (TI) provides the enclosed product(s) under the following conditions:This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATIONPURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling theproduct(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided arenot intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations,including product safety and environmental measures typically found in end products that incorporate such semiconductorcomponents or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regardingelectromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet thetechnical requirements of these directives or other related directives.Should this evaluation board/kit not meet the specifications indicated in the User’s Guide, the board/kit may be returned within 30days from the date of delivery for a full refund. THE FOREGOING WARRANTY IS THE EXCLUSIVE WARRANTY MADE BYSELLER TO BUYER AND IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED, IMPLIED, OR STATUTORY, INCLUDINGANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR ANY PARTICULAR PURPOSE.The user assumes all responsibility and liability for proper and safe handling of the goods. Further, the user indemnifies TI from allclaims arising from the handling or use of the goods. Due to the open construction of the product, it is the user’s responsibility totake any and all appropriate precautions with regard to electrostatic discharge.EXCEPT TO THE EXTENT OF THE INDEMNITY SET FORTH ABOVE, NEITHER PARTY SHALL BE LIABLE TO THE OTHERFOR ANY INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES.TI currently deals with a variety of customers for products, and therefore our arrangement with the user is not exclusive.
TI assumes no liability for applications assistance, customer product design, software performance, or infringement ofpatents or services described herein.
Please read the User’s Guide and, specifically, the Warnings and Restrictions notice in the User’s Guide prior to handling theproduct. This notice contains important safety information about temperatures and voltages. For additional information on TI’senvironmental and/or safety programs, please contact the TI application engineer or visit www.ti.com/esh .No license is granted under any patent right or other intellectual property right of TI covering or relating to any machine, process, orcombination in which such TI products or services might be or are used.
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This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATIONPURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. It generates, uses, andcan radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of thisequipment in other environments may cause interference with radio communications, in which case the user at his own expensewill be required to take whatever measures may be required to correct this interference.
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EVM WARNINGS AND RESTRICTIONS
It is important to operate this EVM within the input voltage range of 10 V to 30 V and the output voltage range of 0 V to 30 V.Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there arequestions concerning the input range, please contact a TI field representative prior to connecting the input power.Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to theEVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the loadspecification, please contact a TI field representative.During normal operation, some circuit components may have case temperatures greater than 85 °C. The EVM is designed tooperate properly with certain components above 85 °C as long as the input and output ranges are maintained. These componentsinclude but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types ofdevices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes nearthese devices during operation, please be aware that these devices may be very warm to the touch.
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