Texas Instruments GTLP User manual

June 2001 Standard Linear & Logic
GTLP Evaluation Module
(EVM)
User’s Guide

Printed in U.S.A.
0601 SCEA023

GTLP Evaluation Module (EVM)
User’s Guide
SCEA023
June 2001
Printed on Recycled Paper

IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products
ortodiscontinueanyproductorservicewithoutnotice,andadvisecustomerstoobtainthelatest
version of relevant information to verify, before placing orders, that information being relied on
iscurrentandcomplete.Allproductsaresoldsubjecttothetermsandconditionsofsalesupplied
atthetimeoforderacknowledgment,includingthosepertainingtowarranty,patentinfringement,
and limitation of liability.
TI warrants performance of its products to the specifications applicable at the time of sale in
accordancewithTI’sstandardwarranty.Testing andother qualitycontroltechniquesareutilized
to the extent TI deems necessary to support this warranty. Specific testing of all parameters of
eachdeviceisnotnecessarilyperformed,exceptthosemandatedbygovernmentrequirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customer’s applications, adequate design and
operating safeguards must be provided by the customer to minimize inherent or procedural
hazards.
TI assumes no liability for applications assistance or customer product design. TI does not
warrantorrepresentthatanylicense,eitherexpressorimplied,isgrantedunderanypatentright,
copyright, mask work right, or other intellectual property right of TI covering or relating to any
combination,machine, or process in which such products or services might be or are used. TI’s
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Reproduction of information in TI data books or data sheets is permissible only if reproduction
iswithoutalterationandisaccompaniedbyallassociatedwarranties,conditions,limitationsand
notices. Representation or reproduction of this information with alteration voids all warranties
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and TI is not responsible nor liable for any such use.
Resale of TI’s products or services with statements different from or beyond the parameters
stated by TI for that product or service voids all express and any implied warranties for the
associated TI product or service, is an unfair and deceptive business practice, and TI is not
responsible nor liable for any such use.
Also see: Standard Terms and Conditions of Sale for Semiconductor Products.
www.ti.com/sc/docs/stdterms.htm
Mailing Address:
Texas Instruments
Post Office Box 655303
Dallas, Texas 75265
Copyright 2001, Texas Instruments Incorporated

iii
Preface
Read This First
About This Manual
Use this manual to set up and use the GTLP evaluation module (EVM) for the
SN74GTLPH1655 and other GTLP devices.
How to Use This Manual
This document contains the following chapters:
-
Chapter 1 –Introduction
-
Chapter 2 –GTLP EVM Board Typical Test and Setup Configuration
-
Chapter 3 –Oscilloscope Operation
-
Chapter 4 –Waveform Measurement and Interpretation
-
Chapter 5 –Troubleshooting
-
Appendix A –Bill of Materials, Schematics, Board Layouts, and
Suggested Specifications

Information About Cautions and Warnings
iv
Information About Cautions and Warnings
This book may contain cautions and warnings.
This is an example of a caution statement.
A caution statement describes a situation that could potentially
damage your software or equipment.
This is an example of a warning statement.
A warning statement describes a situation that could potentially
cause harm to you.
The information in a caution or a warning is provided for your protection.
Please read each caution and warning carefully.
FCC Warning
This equipment is intended for use in a laboratory test environment only. It
generates, uses, and can radiate radio frequency energy and has not been
testedfor compliancewith thelimits ofcomputing devicespursuant tosubpart
Jofpart15ofFCCrules,which aredesignedtoprovidereasonableprotection
against radio frequency interference. Operation of this equipment in other
environments may cause interference with radio communications, in which
case,users,at theirown expense,willbe requiredto take whatevermeasures
may be required to correct this interference.
Trademarks
TI-OPC is a trademark of Texas Instruments.
Trademarks are the property of their respective owners.

Contents
vContents
Contents
1 Introduction 1-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.1 GTLP EVM Overview 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 GTLP EVM Kit Contents 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 GTLP EVM Kit Availability 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2 GTLP EVM Board Typical Test and Setup Configuration 2-1. . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.1 GTLP EVM Case 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Top Tray 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Backplane Board 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4 Connectors 2-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.5 Power Supply 2-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.6 Clock Crystals 2-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.7 Termination Cards 2-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.8 Bottom Compartment 2-17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.9 Measurement Equipment 2-18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.10 Clock Cards 2-19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.11 Driver Cards 2-21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.11.1 Single-Bit Selection 2-23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.11.2 Edge-Rate Control 2-24. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.11.3 Source-Synchronous Clock/System-Clock Selection 2-25. . . . . . . . . . . . . . . . . . . .
2.12 Receiver Cards 2-26. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.13 Backplane Setup 2-29. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.13.1 Insertion of Clock Cards 2-29. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.13.2 Insertion of Clock Crystals 2-31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.13.3 Insertion of Termination Cards 2-32. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.13.4 Insertion of Driver and Receiver Cards 2-33. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3 Oscilloscope Operation 3-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1 Oscilloscope Setup 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Measurements 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Contents
vi
4 Waveform Measurement and Interpretation 4-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.1 Timing Relationship of Driver Card (D1) Data Pattern (Ch1) and
Driver Card (D1) Latch Clock (Ch2) 4-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 Timing Relationship of Driver Card (D1) Data Pattern (Ch1) and
Driver Card (D1) Group 1 GTLP Data Out (Ch2) 4-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.3 Timing Relationship of Driver Card (D1) Data Pattern (Ch1) and
Receiver Card (R2) Group 1 GTLP Data In (Ch2) 4-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4 Timing Relationship of Driver Card (D1) Data Pattern (Ch1) and
Receiver Card (R2) Group 1 LVTTL Data Out (Ch2) 4-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.5 Timing Relationship of Receiver Card (R2) Group 1 GTLP Data In (Ch1) and
Receiver Card (R20) Group 1 GTLP Data In (Ch2) 4-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.6 Monitored Waveforms 4-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5 Troubleshooting 5-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.1 Spare Parts 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 Replacing 5-A Fuse F2 5-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.3 Replacing 2.5-A Fuse F1 5-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.4 Damage to the Daughter Cards 5-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A Bill of Materials, Schematics, Board Layouts, and Suggested Specifications A-1. . . . . . . . .
A.1 GTLP EVM Bill of Materials A-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A.2 Board Layouts and Schematics A-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Figures
viiContents
Figures
2–1 GTLP EVM Case 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–2 GTLP EVM Top Tray 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–3 GTLP EVM Backplane Board 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–4 GTLP EVM Backplane Block Diagram 2-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–5 AMP Z-PACK2-mm, 110-Pin, Hard-Metric (HM) Male Connector 2-8. . . . . . . . . . . . . . . . . .
2–6 AMP Pin Lengths 2-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–7 AMP Single-Line-Model Data Sheet 2-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–8 Power Supply (Left) and Backplane Connection (Right) 2-11. . . . . . . . . . . . . . . . . . . . . . . . . . .
2–9 1.5-V VTT Linear Regulator 2-12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–10 Power-Supply LED Indicators 2-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–11 Clock Crystal on Card (Left) and Stored in Tube (Right) 2-14. . . . . . . . . . . . . . . . . . . . . . . . . . .
2–12 Clock Crystal With Leads in Position for Storage 2-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–13 Termination Card Location (Left) and Close-Up View (Right) 2-15. . . . . . . . . . . . . . . . . . . . . . .
2–14 Termination-Card Storage 2-16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–15 Oscilloscope and Backplane Daughter-Card Storage Area 2-17. . . . . . . . . . . . . . . . . . . . . . . .
2–16 Tektronix THS730A O-Scope 2-18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–17 GTLP EVM Clock Card 2-19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–18 GTLP EVM Driver Daughter Card 2-22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–19 Bit Selection for Normal Data Pattern (Left), Signal Held Low (Center), or
Signal Held High (Right) 2-23. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–20 ERC Bit-Selection Jumper Set for Slow (Left) or Fast (Right) Rate 2-24. . . . . . . . . . . . . . . . . .
2–21 JB2 Set to Source-Synchronous Clock (Left) or System-Clock (Right) Operation 2-25. . . . .
2–22 GTLP EVM Monitored Receiver Card 2-28. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–23 AMP Z-PACK, 2-mm, 55-Pin, HM Male (Left) and
Female (Right) Clock-Card Connectors 2-29. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–24 Connector Premate (Left), Mating (Center), and Mated (Right) 2-30. . . . . . . . . . . . . . . . . . . . .
2–25 Clock Card Properly (Left) and Improperly (Right) Inserted 2-30. . . . . . . . . . . . . . . . . . . . . . . .
2–26 Clock Crystal Removal (Left) and Insertion (Right) 2-31. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–27 Termination-Card Keying 2-32. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–28 Slot 1 (Left) and Slot 20 (Right) Termination Cards on the Backplane 2-32. . . . . . . . . . . . . . .
2–29 Driver and Receiver Connector Keying 2-33. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–30 Close-up View of Connector Keying 2-34. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–31 Proper Connector Mating Sequence (Left to Right) 2-34. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–32 Connectors Properly Mated 2-35. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Figures
viii
3–1 Tektronix O-Scope Front (Left) and Top (Right) 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–2 O-Scope Probe Monitor-Point Adapters 3-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–3 Simple Test-Measurement 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–4 Turn on O-Scope (Left) and Select Channel (Right) 3-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–5 O-Scope Display 3-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–6 Timing Adjustment 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–7 Voltage Adjustment 3-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3–8 Trigger Adjustment 3-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4–1 Case 1: D1 Data Pattern (Ch1) and D1 Latch Clock (Ch2) 4-2. . . . . . . . . . . . . . . . . . . . . . . . . .
4–2 Case 2: D1 Data Pattern (Ch1) and D1 Group 1 GTLP Data Out (Ch2) 4-3. . . . . . . . . . . . . . .
4–3 Case 3: D1 Data Pattern (Ch1) and R2 Group 1 GTLP Data In (Ch2) 4-4. . . . . . . . . . . . . . . .
4–4 Case 4: D1 Data Pattern (Ch1) and R2 Group 1 LVTTL Data Out (Ch2) 4-5. . . . . . . . . . . . . .
4–5 Case 5: R2 Group 1 GTLP Data In (Ch1) and R20 Group 1 GTLP Data In (Ch2) 4-6. . . . . .
4–6 GTLP Backplane Waveforms at 23-MHz Clock Frequency 4-7. . . . . . . . . . . . . . . . . . . . . . . . . .
4–7 GTLP Monitor Test-Point Waveforms at 23-MHz Clock Frequency 4-7. . . . . . . . . . . . . . . . . . .
5–1 Spare Fuses and Jumpers 5-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5–2 Fuse F2 (Left) and Removal Procedure (Right) 5-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5–3 Fuse F1 5-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–1 Backplane Layout, Front Side A-5. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–2 Backplane Layout, Back Side A-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–3 Driver-Card and Receiver-Card Connector Pinout A-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–4 Backplane Schematic A-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–5 Driver-Card Layout A-9. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–6 Driver-Card Schematic A-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–7 Unmonitored-Receiver Card Layout A-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–8 Monitored-Receiver Card Layout A-12. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–9 Receiver-Card Schematic A-13. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–10 Clock-Card Layout A-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–11 Clock-Card Schematic A-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–12 Resistor-Termination-Card Layout A-16. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A–13 Standard-Termination-Card Schematic A-17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Tables
ixContents
Tables
2–1 GTLP EVM Group Assignment 2-6. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–2 GTLP EVM Backplane Eight-Layer Stackup 2-7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–3 GTLP EVM Group 1, Bits 1 Through 8 Trace Impedance 2-8. . . . . . . . . . . . . . . . . . . . . . . . . . .
2–4 Termination-Card Stackup 2-17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–5 Clock-Card Stackup 2-21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–6 Driver-Card Stackup 2-22. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2–7 Receiver-Card Stackup 2-27. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Tables
x

1-1
Introduction
The Texas Instruments (TI) GTLP evaluation module (EVM) board is used to
evaluatetheSN74GTLPH1655inmultipointdata-transmissionapplicationsin
a heavily loaded backplane.
The GTLP EVM is a 17.9-in., 20-slot, 0.94-in.-pitch, 8-layer PC backplane
board that provides a total of 48 parallel data lines divided into 6 groups of 8
bitsstaggered into various lengths. The EVM also includes a 1-bit clock along
thelength of the backplaneshowing source-synchronous transfer mode. This
board allows the designer to connect 50-Ωunloaded parallel buses to the
transmitter and receiver connectors in a backplane configuration.
New-design backplane-driver selection criteria are based on drive capability,
live-insertion capability, data throughput, noise margin, backward
compatibility, and bus configuration. The purpose of the GTLP EVM is to
demonstrate the performance of the TI GTLP product portfolio in a
best-in-class high-performance backplane. The backplane enables users to
observetheeffectsofdifferentkindsofterminations,changingloadconditions
duetodifferentspacingandcountofdaughtercards,andvariousfrequencies,
as well as the benefit of source-synchronous clock over system-synchronous
clockoperations. The backplane also can be used toobserve the advantages
of edge-rate control and TI-OPCovershoot-protection circuitry, and show
the performance of TI GTLP devices vs alternate-source devices under
different loading conditions.
Topic Page
1.1 GTLP EVM Overview 1-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 GTLP EVM Kit Contents 1-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 GTLP EVM Kit Availability 1-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 1

GTLP EVM Overview
1-2
1.1 GTLP EVM Overview
The EVM can be used to evaluate device parameters, while acting as a guide
for high-speed board layout. Because GTLP operates over a wide range of
frequencies, designers must optimize their designs for the frequency of
interest.Additionally,designerscanuseburiedtransmissionlinesandprovide
additional noise attenuation and EMI suppression to optimize their
end product.
The board layout is designed and optimized to support high-speed operation
upto100MHz.Thus,understandingimpedancecontrolandtransmission-line
effects are crucial when designing high-speed boards.
Some of the advanced features offered by this board include:
-
The backplane printed circuit board (PCB) is designed for high-speed
signal integrity, while the daughter card is designed with integral
measurement points for easily measuring signal integrity.
-
Subminiature A connectors (SMA) as specified by MIL-C-39012 coaxial
connector specification and parallel fixtures easily are connected to test
equipment.
-
The first bit of each group of input/output signals is accessible for rapid
prototyping.

GTLP EVM Kit Contents
1-3Introduction
1.2 GTLP EVM Kit Contents
This EVM kit comprises the following major parts, components of which are
listed in Appendix A.1, GTLP EVM Bill of Materials:
-
GTLP EVM kit documentation (this document, SCEA023)
-
Backplane
-
Clock driver card
-
Termination card
-
Monitored receiver card
-
Monitored driver card
-
Unmonitored receiver card

GTLP EVM Kit Availability
1-4
1.3 GTLP EVM Kit Availability
The GTLP EVM kit is not available for resale, but can be obtained and used
There are six locations worldwide where GTLP EVMs can be obtained:
Europe, China, Korea, Japan, and the Americas (2).

2-1
GTLP EVM Board
Typical Test and Setup Configuration
This chapter describes the GTLP EVM setup and the configurations used to
evaluatetheSN74GTLPH1655transceiver.Theseconfigurationscanbeused
to evaluate different transceivers that will be available in the future.
Topic Page
2.1 GTLP EVM Case 2-2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Top Tray 2-3. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Backplane Board 2-4. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4 Connectors 2-8. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.5 Power Supply 2-11. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.6 Clock Crystals 2-14. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.7 Termination Cards 2-15. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.8 Bottom Compartment 2-17. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.9 Measurement Equipment 2-18. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.10 Clock Cards 2-19. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.11 Driver Cards 2-21. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.12 Receiver Cards 2-26. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.13 Backplane Setup 2-29. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Chapter 2

GTLP EVM Case
2-2
2.1 GTLP EVM Case
The EVM is stored and transported in a sturdy plastic case with rollers and
extensible handle (see Figure 2–1). The handle locks in position and can be
extended or retracted by pressing the release on the underside of the handle.
Figure 2–1. GTLP EVM Case
The case is suitable for air transportation and has the combination lock set at
394. To lock the case, rotate one or more of the dials from the opening
combination.

Top Tray
2-3GTLP EVM Board Typical Test and Setup Configuration
2.2 Top Tray
The top tray fits snuggly in the GTLP EVM case (see Figure 2–2) and holds
thebackplaneboard,powersupply,extraclockcrystals,andextratermination
cards in place. The tray is electrostatic protective foam that holds the
backplane board during demonstrations.
Figure 2–2. GTLP EVM Top Tray

Backplane Board
2-4
2.3 Backplane Board
The backplane board (see Figure 2–3) is typical of backplanes used in
commercial applications, and consists of 20 slots with 0.94-in. pitch and
48 data bits, and 1 clock bit on stripline transmission lines.
Figure 2–3. GTLP EVM Backplane Board
This backplane board is constructed uniquely of six groups of eight data bits
each to study the effect of different backplane lengths and driver/receiver
placements. Group 1 consists of all 20 slots, but subsequent groups move to
the left (see Figure 2–4) and have a reduced number of slots, as listed in
Table 2–1.
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