Texas Instruments ADS8339EVM-PDK User manual

User's Guide
SBAU233A–October 2014–Revised November 2015
ADS8339EVM-PDK
ADS8339EVM-PDK
This user's guide describes the operation and use of the ADS8339 evaluation module (EVM). The
ADS8339 is a 16-bit, pseudo-differential, unipolar, successive approximation register (SAR), analog-to-
digital converter (ADC) with a maximum throughput of 250-KSPS. The device is a very low-power ADC
with excellent noise and distortion performance for ac or dc signals. The performance demonstration kit
(PDK) eases EVM evaluation with additional hardware and software for computer connectivity through a
universal serial bus (USB). The ADS8339EVM-PDK includes the ADS8339EVM as a daughter card,
MMB0 motherboard, and an A-to-B USB cable. This user's guide covers circuit description, schematic
diagram, and bill of materials for the ADS8339EVM daughter card. Throughout this document, the
abbreviation EVM and the term evaluation module are synonymous with the ADS8339EVM-PDK.
The following related documents are available through the Texas Instruments web site at www.ti.com.
Related Documentation
Device Literature Number
ADS8339 SBAS677
OPA333 SBOS351
OPA376 SBOS406
OPA836 SLOS712
REF5045 SBOS410
THS4281 SLOS432
ADCPro is a trademark of Texas Instruments.
Windows is a registered trademark of Microsoft Corporation.
SPI is a trademark of Motorola, Inc.
Samtec is a trademark of Samtec, Inc.
All other trademarks are the property of their respective owners.
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Contents
1 ADS8339EVM-PDK Overview ............................................................................................. 3
2 EVM Analog Interface....................................................................................................... 4
3 EVM Digital Interface........................................................................................................ 6
4 EVM Power-Supply Inputs.................................................................................................. 7
5 EVM Digital Configuration .................................................................................................. 8
6 PDK Kit Setup................................................................................................................ 9
7 PDK Kit Operation.......................................................................................................... 12
8 Bill of Materials, Layout, and Schematic ................................................................................ 15
List of Figures
1 Bipolar-Input Signal Configuration......................................................................................... 4
2 Unipolar-Input Signal Configuration ....................................................................................... 4
3 THS4281 Reference Driver with Complementary OPA333 for Drift and Offset Correction ....................... 5
4 Serial 3-Wire Configuration................................................................................................. 8
5 Serial 4-Wire Configuration................................................................................................. 8
6 MMB0 Driver Installer ....................................................................................................... 9
7 Plug-In Installer............................................................................................................. 10
8 MMB0 Motherboard Jumper Configuration ............................................................................. 11
9 ADS8339EVM Jumper Configuration.................................................................................... 11
10 Loading EVM Plug-In ...................................................................................................... 12
11 ADS8339EVM Plug-In: Device-Configuration Tab..................................................................... 13
12 ADCPro Test Plug-ins ..................................................................................................... 14
13 ADS8339EVM PCB: Top Layer .......................................................................................... 16
14 ADS8339EVM PCB: Ground Layer...................................................................................... 16
15 ADS8339EVM PCB: Power Layer ....................................................................................... 17
16 ADS8339EVM PCB: Bottom Layer ...................................................................................... 17
17 Schematic ................................................................................................................... 18
List of Tables
1 Analog Inputs................................................................................................................. 4
2 J2: Serial Interface Header................................................................................................. 6
3 J3: Power-Supply Interface Header ....................................................................................... 7
4 ADS8339EVM Bill of Materials .......................................................................................... 15
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www.ti.com ADS8339EVM-PDK Overview
1 ADS8339EVM-PDK Overview
The ADS8339EVM is an evaluation module built to TI's modular EVM specifications; for more information,
see SLAA185,Designing Modular EVMs for Data Acquisition Products. The EVM by itself has no
microprocessor and cannot run software. The EVM is available as part of the ADS8339EVM-PDK kit that
combines the ADS8339EVM as a daughterboard with the digital signal processor (DSP) based MMB0
motherboard using ADCPro™ software as a graphical user interface (GUI).
ADCPro software collects, records, and analyzes data from ADC evaluation boards. ADCPro also runs
different plug-in programs to easily expand testing and data collection capabilities. In combination with the
ADS8339EVM plug-in program, ADCPro offers a comprehensive evaluation environment for the
ADS8339. For more details on ADCPro, see SBAU128,ADCPro Analog-to-Digital Converter Evaluation
Software User's Guide , available for download from www.ti.com.
1.1 ADS8339EVM Daughterboard Features
• Includes support circuitry as a design example to match ADC performance
• 3.3-V slave serial peripheral interface (SPI™)
• Serial interface header for easy connection to TI DSP-based communication systems
• Compatible with the TI Modular EVM system
• Designed for 5-V analog supply
• Onboard 4.5-V voltage reference
• Bipolar (–2.15 V to +2.15 V) or unipolar (0.1 V to 4.4 V) input range
1.2 ADS8339EVM-PDK Kit Additional Features
• USB port for computer interfacing
• Regulated 5-V and 3.3-V supplies for powering EVM daughterboard
• Easy-to-use evaluation software for Windows®operating system
• Data collection to text files
• Built-in analysis tools including scope, FFT, and histogram displays
• Easily expandable with new analysis plug-in tools from Texas Instruments
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AINP
AINN
4.7 
+
1 k
OPA836
+2.25 V
0.1 V
4.4 V
2.25 V
JP4 (OPEN)
Transfer Function:
AINP = 4.5 V ±A0(±)
4.7 
1 k
A0 (±)0.1V
4.4 V
2.25 V
5 V
±
AINP
AINN
4.7 
+
1 k
OPA836
+1.125 V
±2.15 V
+2.15 V
0 V
JP4 (CLOSED)
Transfer Function:
AINP = 2.25V ±A0(±)
4.7 
1 k
A0 (±)0.1 V
4.4 V
2.25 V
5 V
10 nF
±
EVM Analog Interface www.ti.com
2 EVM Analog Interface
The ADS8339EVM is designed to easily interface to multiple analog sources. SMA connectors allow the
EVM to have input signals connected through coaxial cables. In addition, the Samtec™ connector
provides a convenient 10-pin, dual-row, header and socket combination at J1. Consult Samtec at
www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating connector options. The analog inputs
are buffered by an OPA836 high-speed operational amplifier in order to properly drive the ADS8339 ADC
input.
Use appropriate caution when handling these pins. Table 1 summarizes the pinout for analog interface J1.
Table 1. Analog Inputs
Pin
Connector Number Signal Description
Samtec 10 × 2 J1.10 A0(–) CH0 inverted EVM input
SMA J4 A0(–) CH0 inverted EVM input
2.1 Bipolar-Input Signal Configuration
With JP4 closed, the OPA836 positive input is biased with 1.125 V, created by diving the 4.5-V onboard
reference by four. This bias becomes a 2.25-V offset at the output of the OPA836 that allows input signals
with a 0-V common mode voltage. To keep the OPA836 distortion as low as possible, limit the input signal
swing from –2.15 V to +2.15 V, as shown in Figure 1.
Figure 1. Bipolar-Input Signal Configuration
2.2 Unipolar-Input Signal Configuration
With JP4 open, the OPA836 positive input is biased with +2.25 V, created by diving the 4.5-V onboard
reference by two. This bias becomes a 4.5-V offset at the output of the OPA836 that allows input signals
with a 2.25-V common mode voltage. To keep the OPA836 distortion as low as possible, limit the input
signal swing from +0.1 V to +4.4 V, as shown in Figure 2.
Figure 2. Unipolar-Input Signal Configuration
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REF5045 4.5 V
OPA333 +
-
THS4281
REF
1 F
1 k+
±
1 F
20 k
1 k
1 F
5 V
0.22 
10 F
5 V
www.ti.com EVM Analog Interface
2.3 Voltage Reference
Because the EVM is powered by a 5-V analog supply, make sure to use a value below 5 V for the
reference. This EVM uses a 4.5-V reference, created by the onboard REF5045, as shown in Figure 3. The
REF5045 output is filtered by an RC filter with a 160-Hz cutoff frequency to minimize noise contribution.
The EVM is buffered by the THS4281, which drives the 10 μF capacitor required at the ADC reference
input. The OPA333 with additional feedback is optional, but does complement the THS4281, and
minimizes offset and drift.
Figure 3. THS4281 Reference Driver with Complementary OPA333 for Drift and Offset Correction
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EVM Digital Interface www.ti.com
3 EVM Digital Interface
Samtec part numbers SSW-110-22-F-D-VS-K and TSM-110-01-L-DV-P provide convenient 10-pin, dual-
row, header and socket combinations at P1. The header and socket provide access to the ADC digital
control pins. Consult Samtec at www.samtec.com or call 1-800-SAMTEC-9 for a variety of mating
connector options.
Table 2 summarizes the pinouts for digital interface J2.
Table 2. J2: Serial Interface Header
Pin Number Signal Description
Chip-select input that can be used as a convert
J2.1 CS or CONVST start
J2.3 SCLK Serial clock input
Input used as convert start by the MMB0
J2.7 CS or CONVST motherboard
J2:13 SDO or MISO SDO or MISO output
Interrupt output for detecting end of conversion with
J2.15 INT BUSY bit
Direct connection to the convert start pin if JP3 is
J2.17 CONVST installed
J2.4, J2.10, and J2.18 GND Grounded pins
I2C bus; used only to program the U4 EEPROM on
J2.16, J2.20 I2C bus the EVM board
J2.2, J2.5-6, J2.8-9,
J2.11-12, J2.14, and Unused Unused
J2:19
3.1 Serial Interface (SPI)
The ADS8339 ADC uses SPI serial communication to send conversion results to the MMB0 motherboard,
and subsequently, to a computer using universal serial bus (USB). The serial clock signal (SCLK) is
created by the MMB0 motherboard as the SPI host, with a frequency that is programmable up 25-MHz to
obtain the maximum sampling rate of 250-kSPS.
3.2 I2C Bus for Onboard EEPROM
The ADS8339EVM has an I2C bus used by the MMB0 motherboard to communicate with the onboard
EEPROM. The bus is not used in any form by the ADS8339 converter.
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4 EVM Power-Supply Inputs
J3 is the power-supply input connector. Table 3 lists the configuration details for J3.
Table 3. J3: Power-Supply Interface Header
Pin Number Pin Name Function Required
J3.3 +5VA 5-V analog supply Yes
J3.5 GND Analog and digital ground Yes
(single ground board)
J3.6 GND Analog and digital ground Yes
(single ground board)
J3.7 + 1.8VD 1.8-V digital supply No
J3.9 +3.3VD 3.3-V digital supply Yes
J3.10 +5VD 5-V digital supply Optional
P3.1-2, P3.4, and P3.7-8 Unused Unused No
4.1 Analog Power Options
The ADS8339EVM board functions with a 5-V supply provided at J3.3 by the MMB0 motherboard,
powering the onboard reference, op amps, and the analog supply of the ADS8339.
4.2 Digital Power Options
The ADS8339EVM connects the digital power supply of the ADS8339 to +3.3VD (J3.10) to match the 3.3-
V logic level of the MMB0 motherboard.
4.3 Analog and Digital Grounds
The EVM only has one ground plane for all analog and digital supplies; pins J3.5 and J3.6 are tied
together to this ground plane. Therefore, connect both supply grounds to pins J3.5 and J3.6 so they share
the same ground.
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SDI
SCLK
SDO
CONVST
JP2
1
2
3
JP3 (CLOSED)
DVDD
10 k
CONVST (J2:17)CONVST
CS
CS ( J2:1 or J2:7 )
SDI
SCLK
SDO
CONVST
JP2
2
3
JP3 (OPEN)
DVDD
10 k
J2:17
CS ( J2:1 or J2:7 )
CS
EVM Digital Configuration www.ti.com
5 EVM Digital Configuration
The EVM offers two jumpers (JP2 and JP3) to configure the EVM in either 3-wire SPI mode or 4-wire SPI
mode.
5.1 SPI 3-Wire Mode (JP2:2–3 and JP3:OPEN)
This mode is used to communicate with the MMB0 motherboard. Use the chip-select signal to bring the
ADS8339 digital output out of tri-state mode and initialize conversions. The rising edge of the chip-select
signal starts a conversion, and after the conversion time, the falling edge of the chip-select signal brings
the digital output out of tri-state mode. Figure 4 shows the serial configuration for this mode.
Figure 4. Serial 3-Wire Configuration
5.2 SPI 4-Wire Mode (JP2:1–2 and JP3:CLOSED)
The chip-select signal is used to bring the ADS8339 digital output out of tri-state. However, conversion is
initialized from J3:17 as an independent signal. The rising edge of J3:17 (CONVST) starts a conversion,
and after the conversion time, the falling edge of the chip-select signal brings the digital output out of tri-
state. Figure 5 shows the serial configuration for this mode.
Figure 5. Serial 4-Wire Configuration
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6 PDK Kit Setup
NOTE: Do not connect the ADS8339EVM-PDK to a PC before completing Section 6. Failure to
observe this caution may cause Microsoft Windows to disregard the ADS8339EVM-PDK as a
connected device.
This section presents the steps required to setup the ADS8339EVM-PDK kit before operation. Section 7
explains how to operate the kit to acquire and analyze data.
The steps to setup the kit are as follows and must be completed before attempting to capture data:
Step 1. Download and install the ADCPro software (if not already installed) on a PC.
Step 2. Download and install MMB0 motherboard drivers.
Step 3. Download and install the ADS8339EVM-PDK EVM plug-in software.
Step 4. Configure the ADS8339EVM-PDK hardware.
Step 5. Power up the ADS8339EVM-PDK.
Each task is described in the subsequent sections of this document.
6.1 Install ADCPro Software
ADCPro is the primary program used to evaluate the ADS8339. ADCPro is available at
www.ti.com/tool/adcpro. Refer to SBAU128,ADCPro User's Guide , for detailed installation instructions.
6.2 Install MMB0 Motherboard Drivers
NOTE: The user must have administrator privileges before attempting to install the MMB0
motherboard drivers.
The driver installer is located at TI's FTP site:
ftp://ftp.ti.com/pub/data_acquisition/ADCPro2/misc/drivers/64bit/mmb0_driver_install_x64-v1.0.0.0.msi.
Download and double-click the file, and then follow the instructions.
Figure 6 shows the initial and completed installer screen shots.
Figure 6. MMB0 Driver Installer
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6.3 Install ADS8339EVM-PDK Plug-In Software
NOTE: Install ADCPro before installing the ADS8339EVM-PDK plug-in software.
The installation file link for the PDK plug-in is in the ADS8339EVM-PDK product folder at
www.ti.com/tool/ADS8339evm-pdk. In the software section, look for a link with a file named ads8339evm-
adcproplugin-<version #>.exe, where <version #> refers to the installation file version number, and
increments with software version releases. Download and double-click the file, and then follow the
instructions.
Figure 7 shows the initial and completed installer screen shots.
Figure 7. Plug-In Installer
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