Texas Instruments INA851EVM User manual

User’s Guide
INA851 Evaluation Module
ABSTRACT
This user's guide contains information and support documentation for the INA851 evaluation module (EVM).
Included are the circuit description, jumper settings, required connections, printed circuit board (PCB) layout,
schematic, and bill of materials of the INA851EVM. Throughout this document, the terms evaluation board,
evaluation module, and EVM are synonymous with the INA851EVM.
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Table of Contents
1 Overview..................................................................................................................................................................................3
1.1 Related Documentation......................................................................................................................................................3
1.2 Electrostatic Discharge Caution......................................................................................................................................... 3
1.3 Hot Surface Warning..........................................................................................................................................................3
2 EVM Circuit Description.........................................................................................................................................................4
3 Jumper Settings......................................................................................................................................................................5
4 Power-Supply Connections................................................................................................................................................... 6
5 Input and Output Connections.............................................................................................................................................. 7
6 Modifications...........................................................................................................................................................................9
7 Schematic, PCB Layout, and Bill of Materials......................................................................................................................9
7.1 Schematic.......................................................................................................................................................................... 9
7.2 PCB Layout........................................................................................................................................................................ 9
7.3 Bill of Materials.................................................................................................................................................................15
8 Revision History................................................................................................................................................................... 16
List of Figures
Figure 2-1. INA851EVM Simplified Schematic............................................................................................................................ 4
Figure 3-1. INA851EVM Default Jumper Settings....................................................................................................................... 5
Figure 4-1. INA851EVM Voltage Supply Connections.................................................................................................................6
Figure 5-1. INA851EVM Input and Output Connections..............................................................................................................7
Figure 7-1. INA851EVM Schematic.............................................................................................................................................9
Figure 7-2. Top Overlay PCB Layout.........................................................................................................................................10
Figure 7-3. Top Layer PCB Layout.............................................................................................................................................11
Figure 7-4. Ground Layer PCB Layout...................................................................................................................................... 12
Figure 7-5. Power Layer PCB Layout........................................................................................................................................ 13
Figure 7-6. Bottom Layer PCB Layout.......................................................................................................................................14
List of Tables
Table 1-1. Related Documentation.............................................................................................................................................. 3
Table 3-1. Default Jumper Configuration..................................................................................................................................... 5
Table 4-1. INA851EVM Supply-Range Specifications................................................................................................................. 6
Table 5-1. INA851EVM Input and Output Connections............................................................................................................... 8
Table 7-1. INA851EVM Bill of Materials.....................................................................................................................................15
Trademarks
All trademarks are the property of their respective owners.
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1 Overview
The INA851 is a high-precision instrumentation amplifier with differential outputs that is optimized to drive
high-performance analog-to-digital converters (ADCs) with fully differential inputs. A single external resistor sets
any gain from 0.2 V/V to 10,000 V/V. The device features super-beta input transistors from Texas Instruments,
which provide ultra-low input offset voltage, offset drift, input bias current, input voltage noise, and current noise.
For a full list of electrical characteristics for the INA851, see the INA851 Precision, Fully Differential Output,
Instrumentation Amplifier data sheet.
1.1 Related Documentation
The following document provides information regarding Texas Instruments integrated circuits used in the
assembly of the INA851EVM. This user's guide is available from the TI website under literature number
SBOU273. Any letter appended to the literature number corresponds to the document revision that is current at
the time of the writing of this document. Newer revisions are available from the TI website at https://www.ti.com/,
or call the Texas Instruments Literature Response Center at [phone] or the Product Information Center at
[phone]. When ordering, identify the document by both title and literature number.
Table 1-1. Related Documentation
Device Literature Number
INA851 SBOS999
1.2 Electrostatic Discharge Caution
CAUTION
Many of the components on the INA851EVM are susceptible to damage by electrostatic discharge
(ESD). Customers are advised to observe proper ESD handling precautions when unpacking and
handling the EVM, including the use of a grounded wrist strap at an approved ESD workstation.
1.3 Hot Surface Warning
WARNING
Device can become hot under high-current conditions. Take care when handling the EVM.
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2 EVM Circuit Description
This EVM provides access to the features and measures the performance of the INA851. By default, the
INA851EVM instrumentation amplifier is configured to a gain of 1 V/V. The evaluation board provides optional
footprints for gain resistors RG1 and RG2 to modify the input-stage instrumentation-amplifier gain. Optional
footprints R5 and R9 can be populated with 0-Ω jumpers to set the output stage gain to 0.2 V/V.
The INA851 incorporates features that simplify interfacing to a fully-differential ADC. The VOCM connector
sets the output common-mode voltage. If the VOCM connector is not driven, the output common-mode voltage
defaults to the INA851 midsupply value. Clamp pins are provided to limit the INA851 output voltage level,
which can be applied to the ADC inputs. The output clamp pins, VCLAMP+ and VCLAMP–, are accessible
using connector J9. Selectable jumpers J11 and J12 set the output clamp voltage level to the INA851 supplies
(default), or to external voltages using connector J9.
Revision A of the INA851EVM allows access to the FDA_IN– and FDA_IN+ pins with optional capacitors C7
and C18. These capacitors are in parallel with the INA851 output stage internal feedback resistors to implement
noise filtering. A simplified block diagram of the INA851EVM is displayed in Figure 2-1. For a full schematic of
the INA851EVM, see Figure 7-1.
U1 INA851RGT
+
3 k

+
–
3 k

+
–+
5 k

5 k

5 k

1.25 k

5 k

1.25 k

Output
Clamp
D1
36 V
SMA
Connector
J6
J3
SMA
Connector
IN–
RG–
IN+
RG+
VS+
VS– VCLAMP–
VCLAMP+
G02+
G02–
OUT+
OUT–
FDA_IN–
FDA_IN+
VCC
VEE
IN+
IN–
R11 100

R2 100

C12
C9
C15
100 pF
10pF
10pF
R5
R10 100

C13
100 pF
RG1 DNP
J5.4
J5.1
J5.3
J5.2
Output
Connector
OUT+
OUT–
DNP
R9 DNP
DNP
DNP
C7
C18
VCC C17
100 nF
VEE
VCLAMP+
VCLAMP–
100 nF
Vclamp+_ext 1
2
3
100 nF
Vclamp-_ext
J9.1
J9.2
J9.4
J9.3
VCC
VCLAMP+
J11
1
2
3
VEE
VCLAMP–
J12
C6
100 nF
C19
C20
VOCM
VCCVEE
VCC
VEE
Vclamp
Connector
J10.1
J10.2
VCC
VEE
R1
VOCM
Connector
Output
Clamp
D2
D3
1
2
3
J7
1
2
3
J4
C5
100 nF
R4 100

J1.1
J1.2
J1.3
Power Supply
Connector
VCC
VEE
C1
10 µF
C3
10 µF
C2
100 nF
C4
100 nF
–
–
100

R18
10 k

R19
10 k

FDA_IN–
FDA_IN–
FDA_IN+
FDA_IN+
Figure 2-1. INA851EVM Simplified Schematic
EVM Circuit Description www.ti.com
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3 Jumper Settings
Figure 3-1 details the default jumper settings of the INA851EVM. Table 3-1 explains the configuration for these
jumpers.
Figure 3-1. INA851EVM Default Jumper Settings
Table 3-1. Default Jumper Configuration
Jumper Function Default Position Description
J4 Positive (noninverting) input, IN+ Shunt 2-3 Shunt 2-3: Input signal to SMA connector J3
Shunt 1-2 connects IN+ to GND
J7 Negative (inverting) input, IN– Shunt 2-3 Shunt 2-3: Input signal to SMA connector J6
Shunt 1-2 connects IN– to GND
J11 VCLAMP+ connection Shunt 1-2 Shunt 1-2: Sets level of output VCLAMP+ to +VCC supply
Shunt 2-3 connects VCLAMP+ to external connector J9 pin 3
J12 VCLAMP– connection Shunt 1-2 Shunt 1-2: Sets level of output VCLAMP-to-VEE supply
Shunt 2-3 connects VCLAMP– to external connector J9 pin 1
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4 Power-Supply Connections
The power-supply connections for the INA851EVM are provided through connector J1 at the top of the EVM.
The positive power-supply connection is labeled +VCC, the negative power-supply connection is labeled –VEE,
and the ground connection is labeled GND. To connect power to the INA851EVM, insert wires into each terminal
of J1 and then tighten the screws to make the connection. Table 4-1 summarizes the pin definition for supply
connector J1 and the allowed voltage range for each supply connection.
Table 4-1. INA851EVM Supply-Range Specifications
Pin Number Supply Connection Voltage Range
J1.3 Positive supply (+VCC) Single supply, VS = (+VCC): 8 V to 36 V
Dual supply, VS = (+VCC) – (–VEE): 4 V to 18 V
J1.2 Ground 0 V
J1.1 Negative supply (–VEE) Single supply, VS = (+VCC): 0 V (GND)
Dual supply, VS = (+VCC) – (–VEE): –4 V to –18 V
Figure 4-1 shows the INA851EVM voltage supply connections.
1
3
J1
Power-Supply
Connector C1
10 µF D1
36 V
C2
100 nF
2
TP1
VCC
VCC
TP3
GND
C3
10 µF
C4
100 nF
VEE
TP2
VEE
U1 INA851RGT
+
3 k

+
–
3 k

+
–+
5 k

5 k

5 k

1.25 k

5 k

1.25 k

Output
Clamp
IN–
RG–
IN+
RG+
VS+
VS– VCLAMP–
VCLAMP+
G02+
G02–
OUT+
OUT–
FDA_IN–
VCC C17
100 nF
C6
100 nF
VOCM
Output
Clamp
–
–
VEE
FDA_IN+
Figure 4-1. INA851EVM Voltage Supply Connections
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5 Input and Output Connections
The instrumentation amplifier input signal connections for the INA851EVM are provided through the use of SMA
connectors J3, J6, and test points TP5, TP7, located at the left of the EVM. The VOCM input is provided through
screw-terminal connector J10, located on the left of the board.
By default, the output clamp voltage levels, VCLAMP+ and VCLAMP–, are set to the INA851 positive (+VCC)
and negative (–VEE) supplies, respectively. The VCLAMP+ pin is connected to +VCC through jumper J11 1-2,
and the VCLAMP– pin is connected to –VEE through J12 1-2. Screw terminal connector J9 provides access to
the output clamp pins. To set the voltage level of the clamps with an external supply, shunt jumper J11 2-3 to
access the VCLAMP+ using connector J9.1. In a similar fashion, shunt jumper J12 2-3 to access the VCLAMP–
pin using connector J9.3.
The differential output amplifier connections are provided through screw-terminal connector J5, SMA connectors
J2 and J8, and test points TP6 and TP8, located at the right side of the EVM. A simplified diagram of the
INA851EVM input and output connections is displayed in Figure 5-1.
U1 INA851RGT
+
–
3 k

+
–
3 k

+
–+
–
5 k

5 k

5 k

1.25 k

Output
Clamp
SMA
Connector
J6
J3
SMA
Connector
IN–
RG–
IN+
RG+
VS+
VS– VCLAMP–
VCLAMP+
G02+
G02–
OUT+
OUT–
IN+
IN–
C12
100 pF
R5
R9
C13
100pF
RG1 DNP
J5.4
J5.1
J5.3
J5.2
Output
Connector
OUT+
OUT–
DNP
DNP
VCC
C17
100 nF
VEE
VCLAMP+
VCLAMP–
100 nF
Vclamp+_ext 1
2
3
100 nF
Vclamp– _ext
J9.1
J9.2
J9.4
J9.3
VCC
VCLAMP+
J11
C6
100 nF
C19
C20
VOCM
VCCVEE
VCC
VEE
Vclamp
Connector
J10.1
J10.2
VCC
VEE
100 nF
R1
VOCM
Connector
Output
Clamp
TP7
TP5
J2
SMA
Output
Connector
TP6
J8
SMA
Output
Connector
TP8
OUT+
OUT–
TP11
1
2
3
VEE
VCLAMP–
J12
VCLAMP+
TP12
VCLAMP–
TP4
GND
TP9
GND
TP13
TP10
C5
D2
D3
R2
100 Ω
R11
100 Ω
1.25 kΩ
5 kΩ
R4 100 Ω
R10 100 Ω
R19
10 kΩ
R18
10 kΩ
100 Ω
DNP
C7
FDA_IN–
DNP
C18
FDA_IN+
FDA_IN+
FDA_IN–
FDA_IN–
FDA_IN+
C9
10pF
C15
10pF
Figure 5-1. INA851EVM Input and Output Connections
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Table 5-1 summarizes the input and output connectors and corresponding test points.
Table 5-1. INA851EVM Input and Output Connections
Connector
Designator Signal Comment Test Point
J3 IN+ SMA TP5
J6 IN– SMA TP7
J2 OUT+ SMA TP6
J8 OUT– SMA TP8
J5.4 OUT+ Screw terminal TP6
J5.3 GND Screw terminal TP4
J5.2 GND Screw terminal TP9
J5.1 OUT– Screw terminal TP8
J10.1 VOCM Screw terminal TP13
J10.2 GND Screw terminal N/A
J9.1 VCLAMP+ external Screw terminal N/A
J9.2 GND Screw terminal N/A
J9.3 VCLAMP– external Screw terminal N/A
J9.4 GND Screw terminal N/A
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6 Modifications
By default, the INA851EVM is populated with the INA851 device configured in gain of 1 V/V. However, for
flexibility, the PCB layout has additional unpopulated, passive component footprints for gain resistors RG1 and
RG2 to set the front-end amplifier gain. Optional footprints for jumper resistors R5 and R6 are provided to set
the output stage to gain of 0.2 V/V. In addition, the evaluation board provides footprints R3, R12, C10, C8, and
C14 for optional input low-pass filters, and footprints for load resistors R6 and R13. These additional component
footprints in the layout allow the user to customize the evaluation circuit. For a full schematic of the INA851EVM,
see Figure 7-1.
7 Schematic, PCB Layout, and Bill of Materials
This section contains the schematic, PCB layout, and bill of materials for the INA851EVM.
7.1 Schematic
Figure 7-1 illustrates the EVM schematic.
GND
GND
TP6
OUT+
TP8
OUT-
GND
GND
Gain 0.2 (+)
Gain 0.2 (-)
0R15
0R17
VClamp+_ext
VClamp-_ext
GND GND
Note: R6, R13, are not populated, for flexibility
1
2
3
4
5
J3
1
2
3
4
5
J6
TP5
IN+
1
2
3
J4
GND
1
2
3
J7
GND
0R3
0R12
10uF
C1
100nF
C2
GND
1
2
3
J1
10uF
C3
100nF
C4
VCC
VEE
TP9
GND
GND
TP4
GND
GND
1
2
3
4
5
J2
GND
1
2
3
4
5
J8
GND
TP13
VOCM 10.0k
R18
10.0k
R19
VEE
VCC
VOCM1
2
J10
GND
VEE
VCC
GND
GND
GND
TP11
Vclmp+
TP12
Vclmp-
100nF
C19
GND
100nF
C20
GND
VCC
VEE
TP1
VCC
TP2
VEE
VEE
100
R4
100
R10
100
R2
100
R11
1.00k
R13
1.00k
R6
GNDGND
0R5
0
RG2
0
RG1
C0G/NP0
100pF
C7
C0G/NP0
100pF
C18
TP7
IN- 0R9
100nF
50V
C6
100nF
50V
C17
GND
100nF
50V
C5
100
R1
VOCM
VCC
VEE
36V
D1
Note: RG1, RG2, R5, R9 are not populated, for flexibility
Note: C7, C8, C10, C14, C18 are not populated, for flexibility
TP10
GND
GND
TP3
GND
GND
50V
10pF
50V
10pF
C15
50V
10pF
C8
50V
10pF
C14
100V
100pF
C13
50V
10pF
C11
50V
10pF
C16
100V
100pF
C10
100V
100pF
C12
1
2
3
J11
Vclamp- to Vee
Vclamp- to Ext
Vclamp+ to Ext
Vclamp+ to Vcc
0R14
VEE
1
2
3
J12
0R16
4
1
10
147
RG-
2
RG+
3
13
11
+
-
-
VOCM
12
9
INA851RGT
U1A
Vclamp+
16
Vclamp-
5FDA_IN+ 6
NC 8
FDA_IN- 15
EP 17
INA851RGT
U1B
1
2
3
4
1
2
3
4
J5
1
2
3
4
1
2
3
4
J9
1 2
3
D2
VCC
VEE
1 2
3
D3
VCC
DNP
DNP
DNP DNP
DNP
DNP
DNP
DNP
DNP
FDA_IN+
FDA_IN-
FDA_IN-
C9
DNP
DNP
FDA_IN+
Note: Rev A, Final Release
CDSOD323-T36S
BAT853SWF
BAT853SWF
Note: DNP components are not populated.
Figure 7-1. INA851EVM Schematic
7.2 PCB Layout
The INA851EVM is a four-layer PCB design. Figure 7-2 to Figure 7-6 show the PCB layer illustrations. The
top layer consists of all signal path traces, and is poured with a solid ground plane. A symmetrical board
layout is used at the differential inputs and outputs to keep good performance matching and improve common-
mode noise rejection. Route traces as symmetrically as possible for both positive and negative pathways.
Gain resistors RG1 and RG2 are placed on the top layer in close proximity to the device to reduce parasitic
capacitance. Capacitor C5 is placed in close proximity to VOCM to avoid injecting common-mode noise.
Decoupling capacitors C6, and C17 are positioned on the top layer as close as possible to the power-supply
pins of the device. The second internal layer is a dedicated solid GND plane. Independent vias are placed at the
ground connection of every component to provide a low-impedance path to ground. The third internal layer and
bottom layer route the power supplies and the VCLAMP+ and VCLAMP– connections.
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Figure 7-2. Top Overlay PCB Layout
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Figure 7-3. Top Layer PCB Layout
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Figure 7-4. Ground Layer PCB Layout
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Figure 7-5. Power Layer PCB Layout
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Figure 7-6. Bottom Layer PCB Layout
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7.3 Bill of Materials
Table 7-1 lists the INA851EVM bill of materials (BOM).
Table 7-1. INA851EVM Bill of Materials
Designator Quantity Value Description Package Reference Part Number Manufacturer
!PCB1 1 Printed Circuit Board AMPS140 Any
C1, C3 2 10 µF CAP, CERM, 10 uF, 35 V, +/- 10%, X7R, 1206 1206 C3216X7R1V106K160AC TDK
C2, C4, C19, C20 4 0.1 µF CAP, CERM, 0.1 uF, 50 V, +/- 10%, X7R, 0805 0805 08055C104KAT2A AVX
C5, C6, C17 3 0.1 µF CAP, CERM, 0.1 uF, 50 V, +/- 5%, X7R, 0603 0603 C0603C104J5RACTU Kemet
C9, C15 2 10 pF CAP, CERM, 10 pF, 50 V, +/- 1%, C0G/NP0, 0603 603 C0603C100F5GAC7867 Kemet
C11, C16 2 10 pF CAP, CERM, 10 pF, 50 V, +/- 5%, C0G/NP0, 0805 0805 08055A100JAT2A AVX
C12, C13 2 100 pF CAP, CERM, 100 pF, 100 V, +/- 5%, C0G/NP0,
0805
0805 C0805C101J1GACTU Kemet
D1 1 39 V Zener Diode 39 V 200 mW ±5% Surface Mount
SOD-323
SOD-323 BZX384C39-E3-08 Vishay Semiconductor
D2, D3 2 Diode Array 1 Pair Series Connection Schottky 40
V 200 mA (DC) Surface Mount SC-70, SOT-323
SOT-323 BAT854SWF Nexperia
H1, H2, H3, H4 4 Machine Screw, Round, #4-40 x 1/4, Nylon, Philips
panhead
Screw NY PMS 440 0025 PH B&F Fastener Supply
H5, H6, H7, H8 4 Standoff, Hex, 0.5"L #4-40 Nylon Standoff 1902C Keystone
J1 1 Terminal Block, 3.5mm Pitch, 3x1, TH 10.5x8.2x6.5mm ED555/3DS On-Shore Technology
J2, J3, J6, J8 4 Connector, End launch SMA, 50 ohm, SMT End Launch SMA 142-0701-801 Cinch Connectivity
J4, J7, J11, J12 4 Header, 100mil, 3x1, Gold, TH PBC03SAAN PBC03SAAN Sullins Connector Solutions
J5, J9 2 TERM BLOCK 3.5MM VERT 4POS PCB HDR4 OSTTE040161 On Shore Technology
J10 1 Terminal Block, 3.5mm Pitch, 2x1, TH 7.0x8.2x6.5mm ED555/2DS On-Shore Technology
R1 1 100 Ω RES, 100, 1%, 0.1 W, 0603 0603 RC0603FR-07100RL Yageo
R2, R4, R10, R11 4 100 Ω RES, 100, 0.1%, 0.125 W, 0805 0805 RT0805BRD07100RL Yageo America
R3, R12 2 0 Ω RES, 0, 5%, 0.125 W, AEC-Q200 Grade 0, 0805 0805 ERJ-6GEY0R00V Panasonic
R14, R15, R16, R17 4 0 Ω RES, 0, 5%, 0.1 W, 0603 0603 RC0603JR-070RL Yageo
R18, R19 2 10.0 kΩ RES, 10.0 k, 1%, 0.1 W, 0603 0603 ERJ-3EKF1002V Panasonic
SH-J1, SH-J2, SH-J3 3 1 × 2 Shunt, 100mil, Flash Gold, Black Closed Top 100mil Shunt SPC02SYAN Sullins Connector Solutions
TP1, TP2, TP3, TP4,
TP5, TP6, TP7, TP8,
TP9, TP10, TP11, TP12,
TP13
13 Test Point, Miniature, SMT Test Point, Miniature, SMT 5019 Keystone
U1 1 Precision, Fully Differential Output, Instrumentation
Amplifier
VQFN16 INA851RGT Texas Instruments
www.ti.com Schematic, PCB Layout, and Bill of Materials
SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022
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INA851 Evaluation Module 15
Copyright © 2022 Texas Instruments Incorporated

8 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision * (February 2022) to Revision A (November 2022) Page
• Changed INA851EVM photo to show updated revision A board........................................................................ 1
• Added text to Section 2, EVM Circuit Description, regarding PCB revision A.................................................... 4
• Changed Figure 2-1, EVM Simplified Schematic, to show updated FDA_IN– and FDA_IN+ connections........ 4
• Changed Figure 3-1, INA851EVM Default Jumper Settings, to show updated RTM Revision A silkscreen...... 5
• Changed Figure 4-1, INA851EVM Voltage Supply Connections, to show FDA_IN– and FDA_IN+ pins........... 6
• Changed Figure 5-1, INA851EVM Input and Output Connections, to show PCB revision A changes............... 7
• Changed Figure 7-1, INA851EVM Schematic, to show PCB revision A.............................................................9
• Changed Figure 7-2 to 7-6 to show the latest PCB Revision A layout............................................................... 9
• Changed Table 7-1, Bill of Materials, to show PCB revision A updates............................................................15
Revision History www.ti.com
16 INA851 Evaluation Module SBOU273A – FEBRUARY 2022 – REVISED NOVEMBER 2022
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Copyright © 2022 Texas Instruments Incorporated

STANDARD TERMS FOR EVALUATION MODULES
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, and/or
documentation which may be provided together or separately (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance
with the terms set forth herein. User's acceptance of the EVM is expressly subject to the following terms.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms do not apply to Software. The warranty, if any, for Software is covered in the applicable Software License
Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for a nonconforming EVM if (a) the nonconformity was caused by
neglect, misuse or mistreatment by an entity other than TI, including improper installation or testing, or for any EVMs that have
been altered or modified in any way by an entity other than TI, (b) the nonconformity resulted from User's design, specifications
or instructions for such EVMs or improper system design, or (c) User has not paid on time. Testing and other quality control
techniques are used to the extent TI deems necessary. TI does not test all parameters of each EVM.
User's claims against TI under this Section 2 are void if User fails to notify TI of any apparent defects in the EVMs within ten (10)
business days after delivery, or of any hidden defects with ten (10) business days after the defect has been detected.
2.3 TI's sole liability shall be at its option to repair or replace EVMs that fail to conform to the warranty set forth above, or credit
User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the warranty
period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to repair or
replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall be
warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
WARNING
Evaluation Kits are intended solely for use by technically qualified,
professional electronics experts who are familiar with the dangers
and application risks associated with handling electrical mechanical
components, systems, and subsystems.
User shall operate the Evaluation Kit within TI’s recommended
guidelines and any applicable legal or environmental requirements
as well as reasonable and customary safeguards. Failure to set up
and/or operate the Evaluation Kit within TI’s recommended
guidelines may result in personal injury or death or property
damage. Proper set up entails following TI’s instructions for
electrical ratings of interface circuits such as input, output and
electrical loads.
NOTE:
EXPOSURE TO ELECTROSTATIC DISCHARGE (ESD) MAY CAUSE DEGREDATION OR FAILURE OF THE EVALUATION
KIT; TI RECOMMENDS STORAGE OF THE EVALUATION KIT IN A PROTECTIVE ESD BAG.

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2
3Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
FCC NOTICE: This kit is designed to allow product developers to evaluate electronic components, circuitry, or software
associated with the kit to determine whether to incorporate such items in a finished product and software developers to write
software applications for use with the end product. This kit is not a finished product and when assembled may not be resold or
otherwise marketed unless all required FCC equipment authorizations are first obtained. Operation is subject to the condition
that this product not cause harmful interference to licensed radio stations and that this product accept harmful interference.
Unless the assembled kit is designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must
operate under the authority of an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
FCC Interference Statement for Class B EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed and used in accordance
with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference
will not occur in a particular installation. If this equipment does cause harmful interference to radio or television reception, which
can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more
of the following measures:
•Reorient or relocate the receiving antenna.
•Increase the separation between the equipment and receiver.
•Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
•Consult the dealer or an experienced radio/TV technician for help.
3.2 Canada
3.2.1 For EVMs issued with an Industry Canada Certificate of Conformance to RSS-210 or RSS-247
Concerning EVMs Including Radio Transmitters:
This device complies with Industry Canada license-exempt RSSs. Operation is subject to the following two conditions:
(1) this device may not cause interference, and (2) this device must accept any interference, including interference that may
cause undesired operation of the device.
Concernant les EVMs avec appareils radio:
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation
est autorisée aux deux conditions suivantes: (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit
accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
Concerning EVMs Including Detachable Antennas:
Under Industry Canada regulations, this radio transmitter may only operate using an antenna of a type and maximum (or lesser)
gain approved for the transmitter by Industry Canada. To reduce potential radio interference to other users, the antenna type
and its gain should be so chosen that the equivalent isotropically radiated power (e.i.r.p.) is not more than that necessary for
successful communication. This radio transmitter has been approved by Industry Canada to operate with the antenna types
listed in the user guide with the maximum permissible gain and required antenna impedance for each antenna type indicated.
Antenna types not included in this list, having a gain greater than the maximum gain indicated for that type, are strictly prohibited
for use with this device.

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3
Concernant les EVMs avec antennes détachables
Conformément à la réglementation d'Industrie Canada, le présent émetteur radio peut fonctionner avec une antenne d'un type et
d'un gain maximal (ou inférieur) approuvé pour l'émetteur par Industrie Canada. Dans le but de réduire les risques de brouillage
radioélectrique à l'intention des autres utilisateurs, il faut choisir le type d'antenne et son gain de sorte que la puissance isotrope
rayonnée équivalente (p.i.r.e.) ne dépasse pas l'intensité nécessaire à l'établissement d'une communication satisfaisante. Le
présent émetteur radio a été approuvé par Industrie Canada pour fonctionner avec les types d'antenne énumérés dans le
manuel d’usage et ayant un gain admissible maximal et l'impédance requise pour chaque type d'antenne. Les types d'antenne
non inclus dans cette liste, ou dont le gain est supérieur au gain maximal indiqué, sont strictement interdits pour l'exploitation de
l'émetteur
3.3 Japan
3.3.1 Notice for EVMs delivered in Japan: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page 日本国内に
輸入される評価用キット、ボードについては、次のところをご覧ください。
http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_01.page
3.3.2 Notice for Users of EVMs Considered “Radio Frequency Products” in Japan: EVMs entering Japan may not be certified
by TI as conforming to Technical Regulations of Radio Law of Japan.
If User uses EVMs in Japan, not certified to Technical Regulations of Radio Law of Japan, User is required to follow the
instructions set forth by Radio Law of Japan, which includes, but is not limited to, the instructions below with respect to EVMs
(which for the avoidance of doubt are stated strictly for convenience and should be verified by User):
1. Use EVMs in a shielded room or any other test facility as defined in the notification #173 issued by Ministry of Internal
Affairs and Communications on March 28, 2006, based on Sub-section 1.1 of Article 6 of the Ministry’s Rule for
Enforcement of Radio Law of Japan,
2. Use EVMs only after User obtains the license of Test Radio Station as provided in Radio Law of Japan with respect to
EVMs, or
3. Use of EVMs only after User obtains the Technical Regulations Conformity Certification as provided in Radio Law of Japan
with respect to EVMs. Also, do not transfer EVMs, unless User gives the same notice above to the transferee. Please note
that if User does not follow the instructions above, User will be subject to penalties of Radio Law of Japan.
【無線電波を送信する製品の開発キットをお使いになる際の注意事項】 開発キットの中には技術基準適合証明を受けて
いないものがあります。 技術適合証明を受けていないもののご使用に際しては、電波法遵守のため、以下のいずれかの
措置を取っていただく必要がありますのでご注意ください。
1. 電波法施行規則第6条第1項第1号に基づく平成18年3月28日総務省告示第173号で定められた電波暗室等の試験設備でご使用
いただく。
2. 実験局の免許を取得後ご使用いただく。
3. 技術基準適合証明を取得後ご使用いただく。
なお、本製品は、上記の「ご使用にあたっての注意」を譲渡先、移転先に通知しない限り、譲渡、移転できないものとします。
上記を遵守頂けない場合は、電波法の罰則が適用される可能性があることをご留意ください。 日本テキサス・イ
ンスツルメンツ株式会社
東京都新宿区西新宿６丁目２４番１号
西新宿三井ビル
3.3.3 Notice for EVMs for Power Line Communication: Please see http://www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
電力線搬送波通信についての開発キットをお使いになる際の注意事項については、次のところをご覧ください。http:/
/www.tij.co.jp/lsds/ti_ja/general/eStore/notice_02.page
3.4 European Union
3.4.1 For EVMs subject to EU Directive 2014/30/EU (Electromagnetic Compatibility Directive):
This is a class A product intended for use in environments other than domestic environments that are connected to a
low-voltage power-supply network that supplies buildings used for domestic purposes. In a domestic environment this
product may cause radio interference in which case the user may be required to take adequate measures.

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4
4EVM Use Restrictions and Warnings:
4.1 EVMS ARE NOT FOR USE IN FUNCTIONAL SAFETY AND/OR SAFETY CRITICAL EVALUATIONS, INCLUDING BUT NOT
LIMITED TO EVALUATIONS OF LIFE SUPPORT APPLICATIONS.
4.2 User must read and apply the user guide and other available documentation provided by TI regarding the EVM prior to handling
or using the EVM, including without limitation any warning or restriction notices. The notices contain important safety information
related to, for example, temperatures and voltages.
4.3 Safety-Related Warnings and Restrictions:
4.3.1 User shall operate the EVM within TI’s recommended specifications and environmental considerations stated in the user
guide, other available documentation provided by TI, and any other applicable requirements and employ reasonable and
customary safeguards. Exceeding the specified performance ratings and specifications (including but not limited to input
and output voltage, current, power, and environmental ranges) for the EVM may cause personal injury or death, or
property damage. If there are questions concerning performance ratings and specifications, User should contact a TI
field representative prior to connecting interface electronics including input power and intended loads. Any loads applied
outside of the specified output range may also result in unintended and/or inaccurate operation and/or possible
permanent damage to the EVM and/or interface electronics. Please consult the EVM user guide prior to connecting any
load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative.
During normal operation, even with the inputs and outputs kept within the specified allowable ranges, some circuit
components may have elevated case temperatures. These components include but are not limited to linear regulators,
switching transistors, pass transistors, current sense resistors, and heat sinks, which can be identified using the
information in the associated documentation. When working with the EVM, please be aware that the EVM may become
very warm.
4.3.2 EVMs are intended solely for use by technically qualified, professional electronics experts who are familiar with the
dangers and application risks associated with handling electrical mechanical components, systems, and subsystems.
User assumes all responsibility and liability for proper and safe handling and use of the EVM by User or its employees,
affiliates, contractors or designees. User assumes all responsibility and liability to ensure that any interfaces (electronic
and/or mechanical) between the EVM and any human body are designed with suitable isolation and means to safely
limit accessible leakage currents to minimize the risk of electrical shock hazard. User assumes all responsibility and
liability for any improper or unsafe handling or use of the EVM by User or its employees, affiliates, contractors or
designees.
4.4 User assumes all responsibility and liability to determine whether the EVM is subject to any applicable international, federal,
state, or local laws and regulations related to User’s handling and use of the EVM and, if applicable, User assumes all
responsibility and liability for compliance in all respects with such laws and regulations. User assumes all responsibility and
liability for proper disposal and recycling of the EVM consistent with all applicable international, federal, state, and local
requirements.
5. Accuracy of Information: To the extent TI provides information on the availability and function of EVMs, TI attempts to be as accurate
as possible. However, TI does not warrant the accuracy of EVM descriptions, EVM availability or other information on its websites as
accurate, complete, reliable, current, or error-free.
6. Disclaimers:
6.1 EXCEPT AS SET FORTH ABOVE, EVMS AND ANY MATERIALS PROVIDED WITH THE EVM (INCLUDING, BUT NOT
LIMITED TO, REFERENCE DESIGNS AND THE DESIGN OF THE EVM ITSELF) ARE PROVIDED "AS IS" AND "WITH ALL
FAULTS." TI DISCLAIMS ALL OTHER WARRANTIES, EXPRESS OR IMPLIED, REGARDING SUCH ITEMS, INCLUDING BUT
NOT LIMITED TO ANY EPIDEMIC FAILURE WARRANTY OR IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS
FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF ANY THIRD PARTY PATENTS, COPYRIGHTS, TRADE
SECRETS OR OTHER INTELLECTUAL PROPERTY RIGHTS.
6.2 EXCEPT FOR THE LIMITED RIGHT TO USE THE EVM SET FORTH HEREIN, NOTHING IN THESE TERMS SHALL BE
CONSTRUED AS GRANTING OR CONFERRING ANY RIGHTS BY LICENSE, PATENT, OR ANY OTHER INDUSTRIAL OR
INTELLECTUAL PROPERTY RIGHT OF TI, ITS SUPPLIERS/LICENSORS OR ANY OTHER THIRD PARTY, TO USE THE
EVM IN ANY FINISHED END-USER OR READY-TO-USE FINAL PRODUCT, OR FOR ANY INVENTION, DISCOVERY OR
IMPROVEMENT, REGARDLESS OF WHEN MADE, CONCEIVED OR ACQUIRED.
7. USER'S INDEMNITY OBLIGATIONS AND REPRESENTATIONS. USER WILL DEFEND, INDEMNIFY AND HOLD TI, ITS
LICENSORS AND THEIR REPRESENTATIVES HARMLESS FROM AND AGAINST ANY AND ALL CLAIMS, DAMAGES, LOSSES,
EXPENSES, COSTS AND LIABILITIES (COLLECTIVELY, "CLAIMS") ARISING OUT OF OR IN CONNECTION WITH ANY
HANDLING OR USE OF THE EVM THAT IS NOT IN ACCORDANCE WITH THESE TERMS. THIS OBLIGATION SHALL APPLY
WHETHER CLAIMS ARISE UNDER STATUTE, REGULATION, OR THE LAW OF TORT, CONTRACT OR ANY OTHER LEGAL
THEORY, AND EVEN IF THE EVM FAILS TO PERFORM AS DESCRIBED OR EXPECTED.