Texas Instruments TPS65916EVM User manual

1
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TPS65916 EVM User’s Guide
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User's Guide
SLIU021–September 2016
TPS65916 EVM User’s Guide
This user’s guide describes the characteristics, operation, and use of the TPS65916EVM. An EVM
description, graphical user interface (GUI) description, interface requirements, and complete schematic
are included.
Contents
1 Introduction ................................................................................................................... 1
2 Schematics, Bill of Materials, and Layout ................................................................................ 4
3 Setup and Operation....................................................................................................... 16
List of Figures
1 EVM ........................................................................................................................... 2
2 Powered EVM................................................................................................................ 4
3 TPS65916 EVM Schematic (Page 1) ..................................................................................... 5
4 TPS65916 EVM Schematic (Page 2) ..................................................................................... 6
5 TPS65916 EVM Schematic (Page 3) ..................................................................................... 7
6 TPS65916 EVM Schematic (Page 4) ..................................................................................... 8
7 Composite - Top View..................................................................................................... 12
8 Top Layer ................................................................................................................... 13
9 Layer 1 GND................................................................................................................ 13
10 Layer 2 SIGNAL............................................................................................................ 14
11 Layer 3 POWER............................................................................................................ 14
12 Bottom Layer................................................................................................................ 15
13 Composite - Bottom View ................................................................................................ 15
14 Default GPIO Configuration............................................................................................... 16
15 GPIO Configuration After GPIO_1 Set to Logic High ................................................................. 17
16 Low Level Configuration Page............................................................................................ 18
17 Sample Script............................................................................................................... 19
List of Tables
1 Default Jumper Settings for TPS65916EVM............................................................................. 3
2 TPS65916EVM BOM........................................................................................................ 8
1 Introduction
The TPS65916 device is a power-management integrated circuit (PMIC) for industrial and consumer
applications. The device provides five configurable step-down converters, with up to 7 A of output current
for memory, processor core, input/output (I/O), or preregulation of LDOs. The TPS65916 device contains 5
LDO regulators for external use. For more details, see the device datasheet, TPS65916 Power
Management Unit (PMU) for Processor.

SMPS4
SMPS2
SMPS1
LDO outputs
GPIO_0 through GPIO_6
MicroUSB Port
SMPS3
SMPS5
Status LEDs
GND
VCC (3.135V to 5.25V)
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TPS65916 EVM User’s Guide
1.1 EVM Overview
The features of this EVM are as follows:
• Allows monitoring of all LDO and SMPS output voltages.
• Allows loading of all SMPS outputs.
• Allows access to the GPIOs and other logic signals to test functionality.
• Optimized layout for stable operation of all SMPS.
• Onboard MSP430 to enable communication with the PMIC.
• Graphical User Interface (GUI) on Windows®to allow access to the registers of the PMIC through
USB-I2C.
1.2 EVM with Components Identified
Figure 1. EVM
LEDs —Display status of POWERGOOD, RESET_IN, POWER_HOLD, LDOVRTC_OUT, RESET_OUT,
INT, and power supply of MSP430
USB —Connection to PC to enable communication through the GUI
MSP430 —Microcontroller used to convert USB data to I2C format
SMPSxx —Monitor point for SMPS outputs
LDO Outputs —Monitor point for LDO outputs
VIO SelectorX —Jumper used to select VIO voltage. P12 requires a jumper installed, and by default pins
11 and 12 are shorted to select external 1.8 V as VIO. Only one jumper should be installed
between P12 and P15.
GPIOs —Jumper that provides access to the GPIOs
VSYS —VSYS power supply input. P16 is the same connector as SMPS12_OUT and must not be
confused to prevent applying VSYS to SMPS-output.

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1.3 Default Jumper Settings
Table 1 describes the default jumper settings for the TPS65916 EVM. No changes should be made to
these settings without consulting the TPS65916 EVM schematic.
Table 1. Default Jumper Settings for TPS65916EVM
JUMPER PURPOSE EVM CONFIGURATION
P12 VIO Selection Pins 11 and 12 are shorted to select external 1.8V as VIO
P15 VIO Selection No pins on this header are shorted since there is a shunt on
P12.
J2 POWERGOOD Pull-up resistor J2 is closed to enable the pull-up resistor for the POWERGOOD
signal
J3 Level Shifter Voltage Selection J3 is closed to select VIO as the level shifted voltage for U5,
U6, and U7
J7 I2C or SPI CLK J7 is closed to select the I2C_SCL signal
J10 I2C or SPI Data J10 is closed to select the I2C_SDA signal
J22 GPIO_1 GUI Control J22 is closed to allow GPIO_1 (RESET_IN) to be controlled
through the GUI
J26 GPIO_5 Selection GPIO_5 is shorted HIGH to allow the device to power-up
J30 BOOT Selection BOOT is shorted LOW to exercise the default power-up
sequence
J31 PWRON Selection PWRON is shorted HIGH
J32 LDO5 Input Selection J32 is closed to supply LDO5 from the same supply as the
other LDOs
J35 I2C_SCL Connection to PMIC J35 is closed to use the onboard SCL signal from the MSP430
J36 I2C_SDA Connection to PMIC J36 is closed to use the onboard SDA signal from the MSP430
J43 – J54 Level Shifter Direction Selection and
Enable Jumpers J43 through J54 should be left as they are configured to enable proper level shifter functionality
JP1 LDO Input Selection JP1 is closed to supply the LDOs from VSYS instead of an
external supply (VDD)
JP2 VCC_SENSE Selection VCC_SENSE is shorted to VSYS instead of an external supply
(VDD)
JP3 D2 Indicator Selection Pins 1 and 2 are shorted to allow the status of POWERGOOD
signal to be indicated by D2
JP6 D5 Indicator Selection Pins 1 and 2 are shorted to allow the status of the
POWER_HOLD signal to be indicated by D5
JP7 D7 Indicator Selection Pins 1 and 2 are shorted to allow the status of the RESET_IN
signal to be indicated by D7

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TPS65916 EVM User’s Guide
1.4 Power-Supply Requirements and Connections
To set up the EVM, ensure that VSYS (3.3 V to 5 V) is connected to the pin labeled VSYS of P16, and
that GND is connected to the pin labeled GND of P16.
1.4.1 VIO Selection
As mentioned in Table 1, there are two 12-pin headers (P12 and P15) for selecting the voltage to use for
the VIO supply voltage of the PMIC.
CAUTION
It is important to make sure that there is a total of one shunt populated between
P12 and P15. If there is a shunt on P12, there should not be one on P15 and
vice versa. Also, there should never be more than one shunt on either P12 or
P15. Violating this requirement will short two PMIC outputs together, which
could potentially damage the PMIC device.
Power for the MSP430 and the two fixed voltage LDOs (3.3-V and 1.8-V outputs) is supplied through the
USB connection, as shown in Figure 2.
Figure 2. Powered EVM
2 Schematics, Bill of Materials, and Layout
This section contains the schematics, bill of materials (BOM) and layout for the EVM.

LDO5_OUT
LDO4_OUT
LDO3_OUT
LDO2_OUT
LDO1_OUT
LDOVRTC_OUT
LDOVANA_OUT
GND
GND
GND
GND
SMPS12_OUT
GND
GND
SMPS3_OUT
GND
GND
SMPS5_OUT
GND
GND
GND
SMPS4_OUT
GND
GND
GND
GND
TP1
VCC_SENSE
TP2
GND
VSYS
VIO_IN
VPROG
ADCIN1
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_5
INT
RESET_OUT
I2C1_SDA
I2C1_SCL
PWRON
BOOT
SYNCCLKOUT
1.30k
R1
DNP
GND
SMPS2_OUT
GND
VDD
TP5
VBG
GND
GND
VDD
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
VSYS
ADCIN2
GPIO_6
SMPS1_FDBK
SMPS3_FDBK
SMPS4_FDBK
SMPS5_FDBK
GND
GND
TP43
TP44
TP45
TP46
TP47
GND
ADCIN1
38
ADCIN2
39
BOOT 16
GPIO_0
12
GPIO_1
13
GPIO_2
2
GPIO_3
14
GPIO_4
1
GPIO_5
15
GPIO_6
27
I2C1_SCL_SCK
35
I2C1_SDA_SDI
36
INT 26
LDO12_IN
22
LDO1_OUT
23
LDO2_OUT
21
LDO3_IN
5
LDO3_OUT
6
LDO4_IN
8
LDO4_OUT
7
LDO5_IN
3
LDO5_OUT
4
LDOVANA_OUT
43
LDOVRTC_OUT
44
PAD 49
PWRON 24
REFGND 41
RESET_OUT 25
SMPS1_FDBK 33
SMPS1_IN 32
SMPS1_SW 31
SMPS2_FDBK 28
SMPS2_IN 29
SMPS2_SW 30
SMPS3_FDBK 9
SMPS3_IN 10
SMPS3_SW 11
SMPS4_FDBK 17
SMPS4_IN 18
SMPS4_SW 19
SMPS5_FDBK 45
SMPS5_IN 46
SMPS5_SW 47
SYNCCLKOUT 48
VBG
40
VCCA
42 VCC_SENSE 37
VIO_IN
34
VPROG 20
U1
TPS659161RGZR X
SMPS2_FDBK
Vin = 3.135V to 5.25V
All SMPS Vout = 0.7V to 3.3V
SMPS1 Iout = 3.5A
SMPS2 Iout = 3.5A
SMPS3 Iout = 3A
SMPS4 Iout = 1.5A
SMPS5 Iout = 2A
LDO1-5 Vout = 0.9V to 3.3V
LDO1 Iout = 300mA
LDO2 Iout = 300mA
LDO3 Iout = 200mA
LDO4 Iout = 200mA
LDO5 Iout = 200mA
0
R32
0
R19
0
R33
0
R34
0
R35
0
R2
0
R3
47µF
C9
47µF
C14
47µF
C19
47µF
C22
47µF
C11
47µF
C5
2.2µF
C4
2.2µF
C6
2.2µF
C8
2.2µF
C10
2.2µF
C15
2.2µF
C12
2.2µF
C16
2.2µF
C20
2.2µF
C18
2.2µF
C44
0.1µF
C26
0.1µF
C24
0.1µF
C27
0.1µF
C25
10µF
C23
10µF
C1
10µF
C2
4.7µF
C7
4.7µF
C13
4.7µF
C17
4.7µF
C21
4.7µF
C3
1µH
L1
1µH
L2
DNP
1µH
L4
1µH
L5
1µH
L6
1µH
L3
1
2
3
JP2
12
JP1
1
2
J32
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TPS65916 EVM User’s Guide
2.1 EVM Schematics
Figure 3. TPS65916 EVM Schematic (Page 1)

D3
GND
GND
GND
GND
+3V3
+1V8
+3V3
GND
GND
GND
RESET_OUT
LDOVRTC_OUT
GPIO_6
GND
GND
SCLK SIMO CS
GND
GND
SOMI
GND
GND
GND
GND
GND
+3V3
IO9
IO8
IO11
IO10
GND
+3V3
GND
+3V3
Orange
D4
Yellow
D1
GND
Yellow
D2
IO12
IO7
CS
IO3
SOMI
SCLK
SIMO
GND
I2C_SCL_MSP I2C_SDA_MSP
I2C_SCL_MSP
I2C_SDA_MSP
I2C1_SCL
I2C1_SDA
GPIO_4
GPIO_2
1 2
P1
GND
GND
GND
MSP430
VIO_IN
MISO
MOSI
I2C_SCL_MSP
I2C_SDA_MSP
GND
SCLK2 GND
TP10
DNP
TP11
DNP
TP6
DNP
TP7
DNP
TP8
DNP
TP9
DNP
TP12
DNP
PWRON
IO13
D+
+3V3
+3V3
+3V3
VIO_IN_LS
VIO_IN_LS
VIO_IN_LS
VIO_IN_LS
VIO_IN_LS
GPIO_0
GPIO_1
GPIO_2
GPIO_3
GPIO_4
GPIO_6
MISO
D+
TP29
DNP
VPU
TP32
DNP
TP34
DNP
TP30
DNP
TP31
DNP
TP33
DNP
TP35
DNP
GND
+3V3
SSNMOSISCLK2
GND
Yellow
D5
GND
Yellow
D6
GND
Yellow
D7
INT
IO13
GND
+3V3 IO13A
IO8
GND
+3V3 IO8A
IO7
GND
+3V3 IO7A
IO10
GND
+3V3 IO10A
IO12
GND
+3V3 IO12A
IO9
GND
+3V3 IO9A
IO3
GND
+3V3 IO3A
IO11
GND
+3V3 IO11A IO9A
IO12A
IO11A
IO10A
IO7A
IO3A
IO8A
IO13A
GND
SSN
TP41
DNP
TP42
DNP
GND
+3V3
SBWTCK
SBWTDIO
SBWTCK
SBWTDIO
TP50
DNP
GND
+3V3
GND
+3V3
GND
+3V3
GND
+3V3
GND
+3V3
GND
+3V3
GPIO_5 GPIO_1
POWERGOOD
POWERHOLD RESET_IN
GND
12
34
56
78
910
1112
1314
P18
1 2
3 4
5 6
7 8
9 10
P21
GND
1
2
3
4
5
6
7
10
11
8
9
J1
IN
1
2
EN
3NC 4
OUT 5
GND
U2
TPS76333DBVRG4
IN
1
2
EN
3NR 4
OUT 5
GND
U3
TPS73618DBVRG4
VCCA
1
1DIR
2
2DIR
3
1A1
4
1A2
5
2A1
6
2A2
7
GND 8
GND 9
2B2 10
2B1 11
1B2 12
1B1 13
2OE
14 1OE
15
VCCB 16
U5
SN74AVC4 T245PWR
VCCA
1
1DIR
2
2DIR
3
1A1
4
1A2
5
2A1
6
2A2
7
GND 8
GND 9
2B2 10
2B1 11
1B2 12
1B1 13
2OE
14 1OE
15
VCCB 16
U6
SN74AVC4 T245PWR
VCCA
1
1DIR
2
2DIR
3
1A1
4
1A2
5
2A1
6
2A2
7
GND 8
GND 9
2B2 10
2B1 11
1B2 12
1B1 13
2OE
14 1OE
15
VCCB 16
U7
SN74AVC4 T245PWR
NC
1
A
2
GND 3
Y4
VCC
5
U8
SN74LV1 T04DBVR
P6.4/CB4/A4
1
P6.5/CB5/A5
2
P6.6/CB6/A6
3
P6.7/CB7/A7
4
P7.0/CB8/A12
5
P7.1/CB9/A13
6
P7.2/CB10/A14
7
P7.3/CB11/A15
8
P5.0/A8/VREF+/VEREF+
9
P5.1/A9/VREF-/VEREF-
10
AVCC1
11
P5.4/XIN
12
P5.5/XOUT
13
AVSS1
14
P8.0
15
P8.1
16
P8.2
17
DVCC1
18
DVSS1
19
VCORE
20
P1.0/TA0CLK/ACLK
21
P1.1/TA0.0
22
P1.2/TA0.1
23
P1.3/TA0.2
24
P1.4/TA0.3
25
P1.5/TA0.4
26
P1.6/TA1CLK/CBOUT
27
P1.7/TA1.0
28
P2.0/TA1.1
29
P2.1/TA1.2
30
P2.2/TA2CLK/SMCLK
31
P2.3/TA2.0
32
P2.4/TA2.1
33
P2.5/TA2.2
34
P2.6/RTCCLK/DMAE0
35
P2.7/UCB0STE/UCA0CLK
36
P3.0/UCB0SIMO/UCB0SDA
37
P3.1/UCB0SOMI/UCB0SCL
38
P3.2/UCB0CLK/UCA0STE
39
P3.3/UCA0TXD/UCA0SIMO
40
P3.4/UCA0RXD/UCA0SOMI 41
P3.5/TB0.5 42
P3.6/TB0.6 43
P3.7/TB0OUTH/SVMOUT 44
P4.0/PM_UCB1STE/PM_UCA1CLK 45
P4.1/PM_UCB1SIMO/PM_UCB1SDA 46
P4.2/PM_UCB1SOMI/PM_UCB1SCL 47
P4.3/PM_UCB1CLK/PM_UCA1STE 48
DVSS2 49
DVCC2 50
P4.4/PM_UCA1TXD/PM_UCA1SIMO 51
P4.5/PM_UCA1RXD/PM_UCA1SOMI 52
P4.6/PM_NONE 53
P4.7/PM_NONE 54
P5.6/TB0.0 55
P5.7/TB0.1 56
P7.4/TB0.2 57
P7.5/TB0.3 58
P7.6/TB0.4 59
P7.7/TB0CLK/MCLK 60
VSSU 61
PU.0/DP 62
PUR 63
PU.1/DM 64
VBUS 65 VUSB 66
V18 67
AVSS2 68
P5.2/XT2IN 69
P5.3/XT2OUT 70
TEST/SBWTCK 71
PJ.0/TDO 72
PJ.1/TDI/TCLK 73
PJ.2/TMS 74
PJ.3/TCK 75
RST/NMI/SBWTDIO 76
P6.0/CB0/A0 77 P6.1/CB1/A1 78 P6.2/CB2/A2 79 P6.3/CB3/A3 80
U4
MSP430 F5529IPN
1 6
S2A
2 5
S2B
3 4
S2C
1 6
S5A
2 5
S5B
3 4
S5C
1 6
S1A
2 5
S1B
3 4
S1C
1 6
S4A
2 5
S4B
3 4
S4C
1 6
S8A
2 5
S8B
3 4
S8C
1 6
S7A
2 5
S7B
3 4
S7C
1 6
S3A
2 5
S3B
3 4
S3C
1 6
S6A
2 5
S6B
3 4
S6C
22pF
C33
22pF
C34
10.0k
R18
10.0k
R21
10.0k
R17
10.0k
R20
10.0k
R64
10.0k
R66
10.0k
R22
10.0k
R65
10.0k
R68
10.0k
R70
10.0k
R67
10.0k
R69
10.0k
R41
10.0k
R44
10.0k
R49
10.0k
R50
10.0k
R51
10.0k
R53 10.0k
R54 10.0k
R52
10.0k
R47 10.0k
R45
10.0k
R42 10.0k
R39
10.0k
R40
10.0k
R43
10.0k
R46
10.0k
R48
10.0k
R4
0.1µF
C39
0.1µF
C40
0.1µF
C41
0.1µF
C43
0.1µF
C37
0.1µF
C38
1µF
C28
1µF
C31
1000pF
C35
2.20k
R14
2.20k
R13
4.7µF
C29
4.7µF
C32
100pF
C30
100pF
C36
1 2
24MHz
Y1
1.50k
R5
1.50k
R11
1.50k
R12
1.50k
R8
1.50k
R36
1.50k
R37
1.50k
R38
1.50k
R9
1.50k
R15
1.50k
R16
33.0
R7
33.0
R6
120k
R10
0.47µF
C42
1
2
3
Q5
BSS138W 1
2
3
Q6
BSS138W
1
23
Q9
BSS138W
1
23
Q8
BSS138W
1
23
Q7
BSS138W
1
23
Q2
BSS138W
1
23
Q3
BSS138W
1
23
Q4
BSS138W
1
23
Q1
BSS138W
1
2
3
J4
1
2
3
J5
1
2
3
J6
1 2 3
J43
1 2 3
J45
1 2 3
J44
1 2 3
J46
1 2 3
J47
1 2 3
J49
1
2
3
J11
1 2 3
J48
1 2 3
J50
1 2 3
J53
1 2 3
J51
1 2 3
J52
1 2 3
J54
1 2 3
JP3
1
2
3
JP4
1 2 3
JP6
1 2 3
JP7
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15
17
19
16
18
20
P2
1 2
J22
1 2
J23
1 2
J20
1 2
J21
1 2
J18
1 2
J19
1 2
J8
1 2
J7
1 2
J9
1 2
J10
1 2
J12
1 2
J13
1 2
J14
1 2
J15
1 2
J16
12
J2
12
J35
12
J36
12
J3
12
J34
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TPS65916 EVM User’s Guide
Figure 4. TPS65916 EVM Schematic (Page 2)

1
2
P4
SMPS12_OUT
1
2
P8
SMPS3_OUT
1
2
P10
SMPS4_OUT
1
2
P13
SMPS5_OUT
GPIO_1
GPIO_3
GPIO_5
GPIO_6
LDOVRTC_OUT
GPIO_0
GPIO_4
BOOT
VSYS
PWRON
VIO_IN
GPIO_2
1
2
P6
SMPS2_OUT
VSYS
VDD
TP13
TP14
TP15
TP16
TP17
TP18
TP19 TP20
TP21
TP22
DNP
TP23 TP24
DNP
ADCIN1 ADCIN2
+1V8
VIO_IN
TP25 TP26 TP27 TP28
+3V3
VIO_IN
GND
GND
GND
GND
GND
GND GND GND GND
SMPS12_OUT
SMPS2_OUT
SMPS3_OUT
SMPS4_OUT
LDO1_OUT
LDO2_OUT
LDO3_OUT
LDO4_OUT
LDO5_OUT
SMPS5_OUT
1
2
P19
INT
1
2
P20
SYNCCLKOUT
LDOVRTC_OUT
VPROG
RESET_OUT
1
2
3
4
5
J33
10.0k
R63
10.0k
R31
10.0k
R62
10.0k
R30
10.0k
R61
10.0k
R29
10.0k
R60
10.0k
R28
10.0k
R59
10.0k
R27
10.0k
R58
10.0k
R26
10.0k
R57
10.0k
R25
10.0k
R56
10.0k
R24
10.0k
R55
10.0k
R23
4
1
2
3
P16
4
1
2
3
P5
4
1
2
3
P7
4
1
2
3
P9
4
1
2
3
P11
4
1
2
3
P14
4
1
2
3
P17
1
2
3
J17
1
2
3
J24
1
2
3
J25
1
2
3
J26
1
2
3
J27
1
2
3
J28
1
2
3
J29
1
2
3
J30
1
2
3
J31
1 2 3
JP5
1 2
3 4
5 6
7 8
9 10
11 12
P12
1 2
3 4
5 6
7 8
9 10
11 12
P15
1 2
3 4
5 6
7 8
9 10
11 12
13 14
15
17
19
21
23
25
27
29
31
33
35
37
39
16
18
20
22
24
26
28
30
32
34
36
38
40
41 42
43 44
P3
GND
LDO1_OUT
LDO2_OUT
LDO3_OUT
LDO4_OUT
LDO5_OUT
TP3
DNP
TP4
DNP
TP36
DNP
TP38
DNP
TP37
DNP
GND
LDOVRTC_OUT
LDOVANA_OUT
TP39
DNP
TP40
LDO1_OUT
LDO2_OUT
LDO3_OUT
LDO4_OUT
LDO5_OUT
LDOVRTC_OUT
LDOVANA_OUT
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Figure 5. TPS65916 EVM Schematic (Page 3)

LOGO
PCB
Texas Instruments
FID2
DNP
FID1
DNP
FID3
DNP
HVL137
A
PCB Number:
PCB Rev:
Label Assembly Note
ZZ1
This Assembly Note is for PCB labels only
PCB Label
LBL1
Size: 0.65" x 0.20 "
Assembly Note
ZZ2
These assemblies are ESD sensitive, ESD precautions shall be observed.
Assembly Note
ZZ3
These assemblies must be clean and free from flux and all contaminants. Use of no clean flux is not acceptable.
Assembly Note
ZZ4
These assemblies must comply with workmanship standards IPC-A-610 Class 2, unless otherwise specified.
Label Table
Variant Label Text
001 TPS65917EVM
002 TPS65916EVM
28 JUMPERs
SH-1 SH-2 SH-3 SH-4 SH-5 SH-6 SH-7 SH-8
SH-9 SH-10 SH-11 SH-12 SH-13 SH-14 SH-15 SH-16
SH-17 SH-18 SH-19 SH-20 SH-21 SH-22 SH-23 SH-24
SH-25 SH-26 SH-27 SH-28
003 TPS65917EVM-Dual
LOGO
PCB
Pb-Free Symbol
LOGO
PCB
FCC disclaimer
FID5
DNP
FID4
DNP
FID6
DNP
H9
SJ-5303 (CLEAR)
H10
SJ-5303 (CLEAR)
H11
SJ-5303 (CLEAR)
H12
SJ-5303 (CLEAR)
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Figure 6. TPS65916 EVM Schematic (Page 4)
2.2 EVM Bill of Materials
Table 2 lists the bill of materials (BOM) for the TPS65916EVM.
Table 2. TPS65916EVM BOM
Designator Quantity Value Description Package Reference Part Number Manufacturer
!PCB 1 Printed Circuit Board HVL137 Any
C1, C2, C23 3 10uF CAP, CERM, 10 µF, 6.3 V, +/- 10%, X7R, 0805 0805 GCM21BR70J106KE22L MuRata
C3, C7, C13, C17, C21, C29,
C32 7 4.7uF CAP, CERM, 4.7 µF, 16 V, +/- 10%, X7R, AEC- Q200 Grade 1, 1206 1206 GCM31CR71C475KA37L MuRata
C4, C6, C8, C10, C12, C15,
C16, C18, C20, C44 10 2.2uF CAP, CERM, 2.2 µF, 6.3 V, +/- 10%, X7R, AEC- Q200 Grade 1, 0603 0603 GCM188R70J225KE22D MuRata
C5, C9, C11, C14, C19, C22 6 47uF CAP, CERM, 47 µF, 6.3 V, +/- 20%, X7R, 1210 1210 GCM32ER70J476ME19L MuRata
C24, C25, C26, C27 4 0.1uF CAP, CERM, 0.1 µF, 16 V, +/- 10%, X7R, 0402 0402 GCM155R71C104KA55D MuRata
C28, C31 2 1uF CAP, CERM, 1 µF, 6.3 V, +/- 10%, X5R, 0402 0402 GRM155R60J105KE19D MuRata

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Table 2. TPS65916EVM BOM (continued)
Designator Quantity Value Description Package Reference Part Number Manufacturer
C30, C36 2 100pF CAP, CERM, 100 pF, 50 V, +/- 5%, C0G/NP0,
0402 0402 GRM1555C1H101JA01D MuRata
C33, C34 2 22pF CAP, CERM, 22 pF, 50 V, +/- 5%, C0G/NP0,
0402 0402 C1005C0G1H220J050BA TDK
C35 1 1000pF CAP, CERM, 1000 pF, 50 V, +/- 10%, X7R,
0402 0402 GRM155R71H102KA01D MuRata
C37, C38, C39, C40, C41, C43 6 0.1uF CAP, CERM, 0.1 µF, 6.3 V, +/- 10%, X5R, 0402 0402 GRM155R60J104KA01D MuRata
C42 1 0.47uF CAP, CERM, 0.47 µF, 6.3 V, +/- 10%, X5R,
0402 0402 04026D474KAT2A AVX
D1, D2, D3, D5, D6, D7 6 Yellow LED, Yellow, SMD Yellow LED SML-P12YTT86 Rohm
D4 1 Orange LED, Orange, SMD Orange LED SML-P12DTT86 Rohm
H9, H10, H11, H12 4 Bumpon, Hemisphere, 0.44 X 0.20, Clear Transparent Bumpon SJ-5303 (CLEAR) 3M
J1 1 Connector, Receptacle, Micro-USB Type B, R/A,
Bottom Mount SMT Micro USB-B receptacle ZX62-B-5PA(11) Hirose Electric Co. Ltd.
J2, J3, J7, J8, J9, J10, J12,
J13, J14, J15, J16, J18, J19,
J20, J21, J22, J23, J32, J34,
J35, J36, JP1
22 Header, 100mil, 2x1, Tin, TH Header, 2 PIN, 100mil, Tin PEC02SAAN Sullins Connector Solutions
J4, J5, J6, J11, J17, J24, J25,
J26, J27, J28, J29, J30, J31,
J43, J44, J45, J46, J47, J48,
J49, J50, J51, J52, J53, J54,
JP2, JP3, JP4, JP5, JP6, JP7
31 Header, 100mil, 3x1, Tin, TH Header, 3 PIN, 100mil, Tin PEC03SAAN Sullins Connector Solutions
J33 1 Connector, TH, BNC Amphenol_112404 112404 Amphenol Connex
L1, L3, L4, L5, L6 5 1uH Inductor, Shielded Drum Core, Powdered Iron, 1
µH, 4.2 A, 0.043 ohm, SMD 4.7x1.2x4.3mm IHLP1616ABER1R0M11 Vishay-Dale
LBL1 1 Thermal Transfer Printable Labels, 0.650" W x
0.200" H - 10,000 per roll PCB Label 0.650"H x 0.200"W THT-14-423-10 Brady
P1, P4, P6, P8, P10, P13,
P19, P20 8 Header, 100mil, 2x1, Tin plated, TH Header, 2 PIN, 100mil, Tin PEC02SAAN Sullins Connector Solutions
P2 1 Header (Shrouded), 2.54mm, 10x2, Gold, Black,
TH Header (Shrouded), 2.54mm, 10x2, TH SBH11-PBPC-D10-ST-BK Sullins Connector Solutions
P3 1 Header, 2.54 mm, 22x2, Tin, TH Header, 2.54 mm, 22x2, TH MTLW-122-05-T-D-170 Samtec
P5, P16 2 Header(shrouded), 5.08mm, 4x1, Tin, TH Header(shrouded), 5.08mm,
4x1, TH 1740288 Phoenix Contact
P7, P9, P11, P14, P17 5 Header(shrouded), 3.81mm, 4x1, Tin, TH Header(shrouded), 3.81mm,
4x1, TH 1803442 Phoenix Contact
P12, P15 2 Header, 100mil, 6x2, Tin, TH Header, 6x2, 100mil, Tin PEC06DAAN Sullins Connector Solutions
P18 1 Header (shrouded), 100 mil, 7x2, Gold plated,
TH 7x2 Shrouded Header SBH11-PBPC-D07-ST-BK Sullins Connector Solutions
P21 1 Header (shrouded), 100mil, 5x2, High-
Temperature, Gold, TH 5x2 Shrouded header N2510-6002-RB 3M
Q1, Q2, Q3, Q4, Q5, Q6, Q7,
Q8, Q9 9 50V MOSFET, N-CH, 50 V, 0.21 A, SOT-323 SOT-323 BSS138W Fairchild Semiconductor

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Table 2. TPS65916EVM BOM (continued)
Designator Quantity Value Description Package Reference Part Number Manufacturer
R2, R3, R19, R32, R33, R34,
R35 7 0 RES, 0, 5%, 0.063 W, 0402 0402 ERJ-2GE0R00X Panasonic
R4, R17, R18, R20, R21, R22,
R23, R24, R25, R26, R27,
R28, R29, R30, R31, R39,
R40, R41, R42, R43, R44,
R45, R46, R47, R48, R49,
R50, R51, R52, R53, R54,
R55, R56, R57, R58, R59,
R60, R61, R62, R63, R64,
R65, R66, R67, R68, R69, R70
47 10.0k RES, 10.0 k, 1%, 0.1 W, 0402 0402 ERJ-2RKF1002X Panasonic
R5, R8, R9, R11, R12, R15,
R16, R36, R37, R38 10 1.50k RES, 1.50 k, 0.1%, 0.063 W, AEC-Q200 Grade 0, 0402 0402 ERA-2AEB152X Panasonic
R6, R7 2 33.0 RES, 33.0, 1%, 0.062 W, 0402 0402 RC0402FR-0733RL Yageo America
R10 1 120k RES, 120 k, 1%, 0.1 W, AEC-Q200 Grade 0,
0402 0402 ERJ-2RKF1203X Panasonic
R13, R14 2 2.20k RES, 2.20 k, 1%, 0.063 W, 0402 0402 RC0402FR-072K2L Yageo America
S1, S2, S3, S4, S5, S6, S7, S8 8 Switch, Slide, SPST 3 poles, SMT 3 poles SPST Switch 219-3LPST CTS Electrocomponents
SH-1, SH-2, SH-3, SH-4, SH-
5, SH-6, SH-7, SH-8, SH-9,
SH-10, SH-11, SH-12, SH-13,
SH-14, SH-15, SH-16, SH-17,
SH-18, SH-19, SH-20, SH-21,
SH-22, SH-23, SH-24, SH-25,
SH-26, SH-27, SH-28
28 1x2 Shunt, 100mil, Gold plated, Black Shunt 969102-0000-DA 3M
TP1, TP2, TP5, TP13, TP14,
TP15, TP16, TP17, TP18,
TP19, TP20, TP21, TP23,
TP25, TP26, TP27, TP28,
TP40, TP43, TP44, TP45,
TP46, TP47
23 Test Point, Miniature, White, TH White Miniature Testpoint 5002 Keystone
U1 1 Power Management Unit (PMU) for Processor,
RGZ0048D RGZ0048D TPS659161RGZR Texas Instruments
U2 1 Single Output LDO, 150 mA, Fixed 3.3 V Output,
2.7 to 10 V Input, with Low IQ, 5-pin SOT-23
(DBV), -40 to 125 degC, Green (RoHS & no
Sb/Br)
DBV0005A TPS76333DBVRG4 Texas Instruments
U3 1 Single Output Low Noise LDO, 400 mA, Fixed
1.8 V Output, 1.7 to 5.5 V Input, with Reverse
Current Protection, 5-pin SOT-23 (DBV), -40 to
85 degC, Green (RoHS & no Sb/Br)
DBV0005A TPS73618DBVRG4 Texas Instruments
U4 1 Mixed Signal MicroController, PN0080A PN0080A MSP430F5529IPN Texas Instruments
U5, U6, U7 3 4-Bit Dual-supply Bus Transceiver with
Configurable Voltage Translation and 3-State
Outputs, PW0016A
PW0016A SN74AVC4T245PWR Texas Instruments
U8 1 SN74LV1T04 Single Power Supply Inverter Gate
CMOS Logic Level Shifter, DBV0005A DBV0005A SN74LV1T04DBVR Texas Instruments

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Table 2. TPS65916EVM BOM (continued)
Designator Quantity Value Description Package Reference Part Number Manufacturer
Y1 1 Crystal, 24MHz, 18pF, SMD Body12.7x4.7mm ABLS-24.000MHZ-K4F-T Abracon Corporation
FID1, FID2, FID3, FID4, FID5,
FID6 0 Fiducial mark. There is nothing to buy or mount. Fiducial N/A N/A
L2 0 1uH Inductor, Shielded Drum Core, Powdered Iron, 1
µH, 4.2 A, 0.043 ohm, SMD 4.7x1.2x4.3mm IHLP1616ABER1R0M11 Vishay-Dale
R1 0 1.30k RES, 1.30 k, 1%, 0.063 W, 0402 0402 CRCW04021K30FKED Vishay-Dale
TP3, TP4, TP6, TP7, TP8,
TP9, TP10, TP11, TP12,
TP22, TP24, TP29, TP30,
TP31, TP32, TP33, TP34,
TP35, TP36, TP37, TP38,
TP39, TP41, TP42, TP50
0 Test Point, Miniature, White, TH White Miniature Testpoint 5002 Keystone

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2.3 Layout and Component Placement
Figure 7 through Figure 13 show the overviews and layers of the printed circuit board (PCB) and the
component placement of the EVM.
Figure 7. Composite - Top View

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Figure 8. Top Layer
Figure 9. Layer 1 GND

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Figure 10. Layer 2 SIGNAL
Figure 11. Layer 3 POWER

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Figure 12. Bottom Layer
Figure 13. Composite - Bottom View

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3 Setup and Operation
3.1 Powering up the Device
To turn on the device, perform the following steps:
1. Make sure supply voltage is off, unplug the USB, and close the GUI.
2. Plug in the USB cable to the EVM through the J1 micro-USB connector.
3. Plug in the other end of the USB cable to the computer USB port.
4. Ensure that VSYS (3.3 V to 5 V) is connected to the pin labeled VSYS of P16 and that GND is
connected to the pin labeled GND of P16 (Figure 1).
5. Set supply voltage to between 3.3 V and 5 V with an appropriate current limit. Turn on supply voltage.
The RESET_OUT LED (D1), LDOVRTC_OUT LED (D3), POWER_HOLD LED (D5), LDOVRTC_OUT,
and POWER_GOOD (D2) should light. See Figure 2.
3.2 TPS65916EVM Graphical User Interface (GUI)
The GUI for TPS65916EVM gives the user the ability to interact with the internal registers of the device
while also allowing control of some input pins. The GUI can be downloaded from TI.com.
The TPS65916EVM GUI has three pages. The first page is labeled DUT Config, the second page is
labeled Low Level Configuration, and the third page is labeled About.
3.2.1 Communicating with Device – Digital Inputs
The DUT_Control page of the GUI controls the digital input signals to the PMIC. The GUI can control 6
signals. Since all of these signals are inputs to the PMIC, they need to be configured as outputs from the
perspective of the GUI . To set the desired signal as an input or output, check the box next to the
corresponding signal. Checking this box changes the text label to Output and configures the signal as an
output. Any GPIO configured as output has a second check box labeled Low to the right of it. (Figure 14).
Figure 14. Default GPIO Configuration

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To set the desired signal to a logic low, while the new check box displays Low, click the corresponding Set
button. The corresponding indicator LED should stay off.
To set the desired signal to a logic high, check the Low check box and the text changes to display High.
Next, click the Set button and the corresponding indicator LED should light (Figure 15).
Figure 15. GPIO Configuration After GPIO_1 Set to Logic High
3.2.2 Communicating With Device – I2C
The Low Level Configuration page (Figure 16) of the GUI is where I2C communication with the device is
done. This page has four groups (blocks) of registers. Expand each group by clicking the “+” next to the
group, which lists all the registers in that group. Additional columns display when the name of a register is
selected (highlighted), including the Address, Default state, R/W status, and bit fields of the register.
• To read data from the register, select the appropriate register and click the Read Register icon .
• The register data displays on the right side of the page in the Bit Fields columns labeled 7 to 0.
• To write data to the register, click the bits in the Bit Fields labeled 7 to 0 for the register to write. The
register will be written to immediately. If writes should not be immediate, change the write type using
the Update Mode pulldown to Deferred, change the bits to the desired value, and click the Write
Register icon .

Write Register
(Deferred Mode) Read Register Immediate or Deferred Mode
Bit
Fields
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Figure 16. Low Level Configuration Page
3.3 Running a Script with the GUI
Use the script editor to automate a series of register writes, static bit writes, and delays.
• To launch the script window from the main GUI menu, select Script →Launch Window. The script
editor opens a blank window.
• To record a script, from the main GUI menu, select Script →Start Recording and then run the
commands from the main GUI. After each register write or read, the script editor records the command
that was run.
• When finished recording, select Script →Stop Recording.
• To save the script, on the script window menu select File →Save As... and then choose the destination
for the script file.
• To run the script again, press the F5 key or on the Script window menu, select Run →Run Module.
– If an attempt is made to run the script before being saved, a prompt displays for the user to save
the script.
– Otherwise, to save the script, select File →Save As... and then choose the destination for the script
file.
• The script in Figure 17 turns on SMPS1 to 1.15 V and then turns on SMPS3 to 1.25 V. These
commands can run a power up and power down sequence quickly, eliminating the need to manually
turn on all of the rails.

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Revision History
Figure 17. Sample Script
Revision History
DATE REVISION NOTES
September 2016 * Initial Release

STANDARD TERMS AND CONDITIONS FOR EVALUATION MODULES
1. Delivery: TI delivers TI evaluation boards, kits, or modules, including any accompanying demonstration software, components, or
documentation (collectively, an “EVM” or “EVMs”) to the User (“User”) in accordance with the terms and conditions set forth herein.
Acceptance of the EVM is expressly subject to the following terms and conditions.
1.1 EVMs are intended solely for product or software developers for use in a research and development setting to facilitate feasibility
evaluation, experimentation, or scientific analysis of TI semiconductors products. EVMs have no direct function and are not
finished products. EVMs shall not be directly or indirectly assembled as a part or subassembly in any finished product. For
clarification, any software or software tools provided with the EVM (“Software”) shall not be subject to the terms and conditions
set forth herein but rather shall be subject to the applicable terms and conditions that accompany such Software
1.2 EVMs are not intended for consumer or household use. EVMs may not be sold, sublicensed, leased, rented, loaned, assigned,
or otherwise distributed for commercial purposes by Users, in whole or in part, or used in any finished product or production
system.
2Limited Warranty and Related Remedies/Disclaimers:
2.1 These terms and conditions do not apply to Software. The warranty, if any, for Software is covered in the applicable Software
License Agreement.
2.2 TI warrants that the TI EVM will conform to TI's published specifications for ninety (90) days after the date TI delivers such EVM
to User. Notwithstanding the foregoing, TI shall not be liable for any defects that are caused by neglect, misuse or mistreatment
by an entity other than TI, including improper installation or testing, or for any EVMs that have been altered or modified in any
way by an entity other than TI. Moreover, TI shall not be liable for any defects that result from User's design, specifications or
instructions for such EVMs. Testing and other quality control techniques are used to the extent TI deems necessary or as
mandated by government requirements. TI does not test all parameters of each EVM.
2.3 If any EVM fails to conform to the warranty set forth above, TI's sole liability shall be at its option to repair or replace such EVM,
or credit User's account for such EVM. TI's liability under this warranty shall be limited to EVMs that are returned during the
warranty period to the address designated by TI and that are determined by TI not to conform to such warranty. If TI elects to
repair or replace such EVM, TI shall have a reasonable time to repair such EVM or provide replacements. Repaired EVMs shall
be warranted for the remainder of the original warranty period. Replaced EVMs shall be warranted for a new full ninety (90) day
warranty period.
3Regulatory Notices:
3.1 United States
3.1.1 Notice applicable to EVMs not FCC-Approved:
This kit is designed to allow product developers to evaluate electronic components, circuitry, or software associated with the kit
to determine whether to incorporate such items in a finished product and software developers to write software applications for
use with the end product. This kit is not a finished product and when assembled may not be resold or otherwise marketed unless
all required FCC equipment authorizations are first obtained. Operation is subject to the condition that this product not cause
harmful interference to licensed radio stations and that this product accept harmful interference. Unless the assembled kit is
designed to operate under part 15, part 18 or part 95 of this chapter, the operator of the kit must operate under the authority of
an FCC license holder or must secure an experimental authorization under part 5 of this chapter.
3.1.2 For EVMs annotated as FCC – FEDERAL COMMUNICATIONS COMMISSION Part 15 Compliant:
CAUTION
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions: (1) This device may not
cause harmful interference, and (2) this device must accept any interference received, including interference that may cause
undesired operation.
Changes or modifications not expressly approved by the party responsible for compliance could void the user's authority to
operate the equipment.
FCC Interference Statement for Class A EVM devices
NOTE: This equipment has been tested and found to comply with the limits for a Class A digital device, pursuant to part 15 of
the FCC Rules. These limits are designed to provide reasonable protection against harmful interference when the equipment is
operated in a commercial environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the instruction manual, may cause harmful interference to radio communications.
Operation of this equipment in a residential area is likely to cause harmful interference in which case the user will be required to
correct the interference at his own expense.
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER
SPACER