Texas Instruments TPS546D24SEVM-2PH User manual

User’s Guide
TPS546D24S 2-Phase SWIFT™ Step-Down Converter
Evaluation Module User's Guide
ABSTRACT
The TPS546D24SEVM-2PH evaluation module (EVM) is a two-phase buck converter with two TPS546D24S
devices. The TPS546D24S device is a stackable synchronous buck with PMBus® interface that can operate
from a nominal 2.95-V to 16-V supply. The device allows programming and monitoring through the PMBus
interface.
Two TPS546D24S devices are configured as a two-phase buck converter in factory default. Output current is
evenly distributed in the two devices; both the negative and positive output terminals are connected together.
Table of Contents
1 Description.............................................................................................................................................................................. 4
1.1 Before You Begin............................................................................................................................................................... 4
1.2 Typical Applications............................................................................................................................................................4
1.3 Features............................................................................................................................................................................. 5
2 Electrical Performance Specifications................................................................................................................................. 6
3 Schematic................................................................................................................................................................................7
4 Test Setup..............................................................................................................................................................................10
4.1 Test and Configuration Software...................................................................................................................................... 10
4.2 Test Equipment................................................................................................................................................................ 10
4.3 Tip and Barrel Measurement............................................................................................................................................ 11
4.4 List of Test Points, Jumpers, and Connectors.................................................................................................................. 11
4.5 Evaluating Single Phase Operation................................................................................................................................. 14
4.6 Evaluating Split Rail Input................................................................................................................................................ 14
4.7 Configuring EVM to Overdrive VDD5...............................................................................................................................14
5 EVM Configuration Using the Fusion GUI..........................................................................................................................15
5.1 Configuration Procedure.................................................................................................................................................. 15
6 Test Procedure......................................................................................................................................................................16
6.1 Line and Load Regulation and Efficiency Measurement Procedure................................................................................ 16
6.2 Efficiency Measurement Test Points................................................................................................................................ 17
6.3 Control Loop Gain and Phase Measurement Procedure................................................................................................. 18
7 Performance Data and Typical Characteristic Curves...................................................................................................... 19
7.1 Efficiency..........................................................................................................................................................................19
7.2 Load and Line Regulation (Measured Between TP22 and TP25)....................................................................................19
7.3 Transient Response......................................................................................................................................................... 20
7.4 Control Loop Bode Plot.................................................................................................................................................... 20
7.5 Output Ripple................................................................................................................................................................... 21
7.6 Power MOSFET Drain-Source Voltage............................................................................................................................22
7.7 Control On........................................................................................................................................................................22
7.8 Control Off........................................................................................................................................................................24
7.9 Control On With Pre-biased Output................................................................................................................................. 25
7.10 Current Sharing Between Two Phases.......................................................................................................................... 25
7.11 Thermal Image............................................................................................................................................................... 26
8 EVM Assembly Drawing and PCB Layout.......................................................................................................................... 27
9 Bill of Materials..................................................................................................................................................................... 30
10 Using the Fusion GUI......................................................................................................................................................... 33
10.1 Opening the Fusion GUI................................................................................................................................................ 33
10.2 General Settings............................................................................................................................................................ 34
10.3 Changing ON_OFF_CONFIG........................................................................................................................................ 35
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10.4 Pop-up for Some Commands While Conversion is Enabled..........................................................................................36
10.5 SMBALERT# Mask........................................................................................................................................................ 37
10.6 Device Info..................................................................................................................................................................... 38
10.7 Phase Commands..........................................................................................................................................................39
10.8 All Config........................................................................................................................................................................40
10.9 Pin Strapping..................................................................................................................................................................41
10.10 Monitor......................................................................................................................................................................... 42
10.11 Status........................................................................................................................................................................... 43
List of Figures
Figure 3-1. TPS546D24SEVM-2PH Schematic Page 1.............................................................................................................. 7
Figure 3-2. TPS546D24SEVM-2PH Schematic Page 2 (U1_P1 Controller)............................................................................... 8
Figure 3-3. TPS546D24SEVM-2PH Schematic Page 3 (U1_P2 Follower)................................................................................. 9
Figure 4-1. Tip and Barrel Measurement................................................................................................................................... 11
Figure 7-1. Efficiency, VOUT Measured Using TP13, TP16, TP26 and TP30.............................................................................19
Figure 7-2. Efficiency, VOUT Measured Using TP22 and TP25.................................................................................................. 19
Figure 7-3. Load Regulation...................................................................................................................................................... 19
Figure 7-4. Line Regulation....................................................................................................................................................... 19
Figure 7-5. Transient Response................................................................................................................................................ 20
Figure 7-6. Bode Plot at 0.8-V Output at 12 VIN, 20-A Load......................................................................................................20
Figure 7-7. Output Ripple With 0-A Load...................................................................................................................................21
Figure 7-8. Output Ripple With 80-A Load.................................................................................................................................21
Figure 7-9. Low-side MOSFET VDS ..........................................................................................................................................22
Figure 7-10. High-side MOSFET VDS ....................................................................................................................................... 22
Figure 7-11. Start-Up From Control, 0-A Load...........................................................................................................................23
Figure 7-12. Start-Up From Control, 80-A CC Load.................................................................................................................. 23
Figure 7-13. Shutdown From Control, 0-A Load........................................................................................................................24
Figure 7-14. Shutdown From Control, 20-A CC Load................................................................................................................24
Figure 7-15. Start-Up From Control With Pre-biased Output.....................................................................................................25
Figure 7-16. Inductor Current and Switch Node Waveform, 40-A Load.................................................................................... 25
Figure 7-17. Thermal Image...................................................................................................................................................... 26
Figure 8-1. TPS546D24SEVM-2PH Top Side Component View (Top View)............................................................................. 27
Figure 8-2. TPS546D24SEVM-2PH Bottom Side Component View (Bottom View).................................................................. 27
Figure 8-3. TPS546D24SEVM-2PH Top Copper (Top View).....................................................................................................27
Figure 8-4. TPS546D24SEVM-2PH Internal Layer 1 (Top View)...............................................................................................27
Figure 8-5. TPS546D24SEVM-2PH Internal Layer 2 (Top View)...............................................................................................28
Figure 8-6. TPS546D24SEVM-2PH Internal Layer 3 (Top View)...............................................................................................28
Figure 8-7. TPS546D24SEVM-2PH Internal Layer 4 (Top View)...............................................................................................28
Figure 8-8. TPS546D24SEVM-2PH Internal Layer 5 (Top View)...............................................................................................28
Figure 8-9. TPS546D24SEVM-2PH Internal Layer 6 (Top View)...............................................................................................29
Figure 8-10. TPS546D24SEVM-2PH Internal Bottom Layer (Top View)................................................................................... 29
Figure 10-1. Select Device Scanning Mode.............................................................................................................................. 33
Figure 10-2. General Settings....................................................................................................................................................34
Figure 10-3. Configure – ON_OFF_CONFIG............................................................................................................................ 35
Figure 10-4. Pop-up When Trying to Change FREQUENCY_SWITCH with Conversion Enabled........................................... 36
Figure 10-5. Configure – SMBALERT # Mask...........................................................................................................................37
Figure 10-6. Configure – Device Info.........................................................................................................................................38
Figure 10-7. Phase Commands.................................................................................................................................................39
Figure 10-8. Configure – All Config........................................................................................................................................... 40
Figure 10-9. Configure – Pin Strapping..................................................................................................................................... 41
Figure 10-10. Monitor Screen.................................................................................................................................................... 42
Figure 10-11. Status Screen...................................................................................................................................................... 43
List of Tables
Table 2-1. TPS546D24SEVM-2PH Electrical Performance Specifications..................................................................................6
Table 4-1. Test Point Functions..................................................................................................................................................11
Table 4-2. Jumpers.................................................................................................................................................................... 12
Table 4-3. JP2_P1 and JP2_P2 Selections............................................................................................................................... 12
Table 4-4. JP7_P1 and JP7_P2 Selections............................................................................................................................... 12
Table 4-5. Connector Functions.................................................................................................................................................12
Table 6-1. Test Points for Efficiency Measurements.................................................................................................................. 17
Table 6-2. Test Points for Better Efficiency Measurements........................................................................................................17
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Table 6-3. List of Test Points for Loop Response Measurements..............................................................................................18
Table 9-1. TPS546D24SEVM-2PH Bill of Materials...................................................................................................................30
Trademarks
SWIFT™ is a trademark of Texas Instruments.
PMBus® is a registered trademark of System Management Interface Forum.
All trademarks are the property of their respective owners.
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1 Description
The TPS546D24SEVM-2PH is a two-phase buck design using two stacked TPS546D24S devices. The
TPS546D24SEVM-2PH is designed for a nominal 12-V bus and to produce a regulated 0.8-V output at up
to 80 A of load current. The TPS546D24SEVM-2PH is designed to demonstrate stacking operation of the
TPS546D24S in a two-phase, low-output voltage application while providing a number of test points to evaluate
the performance of the devices. The TPS546D24SEVM-2PH can be modified to single-phase buck converters
by changing the components assembled. See Tip and Barrel Measurement for more information on single-phase
configuration.
1.1 Before You Begin
The following warnings and cautions are noted for the safety of anyone using or working close to the
TPS546D24SEVM-2PH. Observe all safety precautions.
Warning The TPS546D24SEVM-2PH circuit module may become hot during operation due
to dissipation of heat. Avoid contact with the board. Follow all applicable safety
procedures applicable to your laboratory.
!
Caution Do not leave the EVM powered when unattended.
WARNING
The circuit module has signal traces, components, and component leads on the bottom of the board.
This may result in exposed voltages, hot surfaces, or sharp edges. Do not reach under the board
during operation.
CAUTION
The circuit module may be damaged by over temperature. To avoid damage, monitor the
temperature during evaluation and provide cooling, as needed, for your system environment.
CAUTION
Some power supplies can be damaged by application of external voltages. If using more than
1 power supply, check your equipment requirements and use blocking diodes or other isolation
techniques, as needed, to prevent damage to your equipment.
CAUTION
The communication interface is not isolated on the EVM. Be sure no ground potential exists between
the computer and the EVM. Also be aware that the computer is referenced to the battery- potential of
the EVM.
1.2 Typical Applications
The TPS546D24S device is designed for the following applications:
• High-density power solutions
• Wireless infrastructure
• Switcher
• Router network
• Server
• Storage
• Smart power systems
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1.3 Features
This EVM has the following features:
• Regulated 0.8-V output up to 80-ADC steady-state output current
• The output voltage is marginable and trimmable using the PMBus interface
– Programmable UVLO, soft start, and enable through the PMBus interface
– Programmable overcurrent warning and fault limits and programmable response to faults via the PMBus
interface
– Programmable overvoltage and undervoltage warning and fault limits and programmable response to
faults via the PMBus interface
– Programmable turn-on and turn-off delays
• Convenient test points for probing critical waveforms
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2 Electrical Performance Specifications
Table 2-1 lists the electrical performance specifications in room temperature (20 to 25°C). Characteristics are
given for an input voltage of VIN = 12 V, unless otherwise specified.
Table 2-1. TPS546D24SEVM-2PH Electrical Performance Specifications
Parameter Test Conditions MIN TYP MAX Unit
Input Characteristics
Input voltage range, VIN 5 12 16 V
Full load input current IOUT = 80 A 6.4 A
Full load input current VIN = 5 V, IOUT = 80 A 15.6 A
No load input current IOUT = 0 A, switching enabled 130 mA
Enable switching threshold Set by default resistor divider, JP2_P1 and JP2_P2 pins 3
and 4 shorted 5.26 V
Disable switching threshold Set by default resistor divider, JP2_P1 and JP2_P2 pins 3
and 4 shorted 4.75 V
Output Characteristics
Output voltage, VOUT 0.8 V
Output load current, IOUT 0 80 A
Output voltage regulation Line Regulation: VIN = 5 V to 16 V 0.1%
Load Regulation: IOUT = 0 A to 80 A 0.1%
Output voltage ripple IOUT = 80 A 5 mVpp
Output voltage undershoot IOUT = 20-A to 60-A step at 1 A/µs 70 mV
Output voltage overshoot IOUT = 60-A to 20-A step at 100 A/µs 70 mV
Output overcurrent fault threshold
Phase current limit setting of U1_P1 programmed by
MSEL2 52 A
Phase current limit setting of U1_P2 programmed by
MSEL2 52 A
Systems Characteristics
Switching frequency Programmed by MSEL1 550 kHz
Full load efficiency, VOUT (1) IOUT = 80 A 84.8%
Operating case temperature IOUT = 80 A, 10 minute soak 80 °C
Loop bandwidth IOUT = 40 A 30.3 kHz
Phase margin 93.5 °
PMBus Interface and Pin-Strapping
U1_P1 PMBus address Programmed by NVM and ADRSEL 36 Decimal
U1_P1 Voltage reference Default setting of VOUT_COMMAND programmed by
VSEL 800 mV
U1_P1 Soft-start time (TON_RISE) Default setting of TON_RISE programmed by MSEL2 3 ms
(1) The efficiency is measured using the test points listed in Table 6-2 to minimize the effect of DC drops caused by onboard copper
traces.
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3 Schematic
Figure 3-1 through Figure 3-3 illustrate the TPS546D24SEVM-2PH schematics.
Figure 3-1. TPS546D24SEVM-2PH Schematic Page 1
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Figure 3-2. TPS546D24SEVM-2PH Schematic Page 2 (U1_P1 Controller)
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Figure 3-3. TPS546D24SEVM-2PH Schematic Page 3 (U1_P2 Follower)
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4 Test Setup
4.1 Test and Configuration Software
To change any of the default configuration parameters on the EVM through PMBus, obtain the TI Fusion Digital
Power Designer software.
4.1.1 Description
The TI Fusion Digital Power Designer is the graphical user interface (GUI) used to configure and monitor the
Texas Instruments TPS546D24S power converter installed on this evaluation module. The application uses the
PMBus protocol to communicate with the controller over serial bus by way of a TI USB adapter described in
Section 4.2.6.
4.1.2 Features
Some of the tasks you can perform with the GUI include:
• Turn on or off the power supply output, either through the hardware control line or the PMBus operation
command.
• Monitor real-time data. Items such as input voltage, output voltage, output current, die temperature, and
warnings and faults that are continuously monitored and displayed by the GUI.
• Configure common operating characteristics such as VOUT trim and margin, UVLO, soft-start time, warning
and fault thresholds, fault response, and on and off modes.
4.2 Test Equipment
4.2.1 Voltage Source
The input voltage source VIN must be a 0-V to 20-V variable DC source capable of supplying a minimum of 16
ADC to support 80-A load with 5-V input. Connect input VIN and GND to T1 and T2. If the output voltage of the
EVM is increased, the power supply can need to be capable of supplying more current.
4.2.2 Multimeters
TI recommends using two separate multimeters: one meter to measure VIN and the other to measure VOUT.
4.2.3 Output Load:
TI recommends a variable electronic load for the test setup. To test the full load current this EVM supports, the
load must be capable of sinking at least 80 A.
4.2.4 Oscilloscope
When using an oscilloscope to measure the switching node voltage or voltage ripple, measure using a Tip-and-
Barrel method as Figure 4-1 shows, or better.
4.2.5 Fan:
During prolonged operation at high loads, it can be necessary to provide forced air cooling with a small fan
aimed at the EVM. Maintain the surface temperature of the devices on the EVM below their rated temperature.
4.2.6 USB-to-GPIO Interface Adapter:
A communications adapter is required between the EVM and the host computer. This EVM is designed to use
TI's USB-to-GPIO or USB-to-GPIO2 Adapter. Purchase this adapter at http://www.ti.com/tool/usb-to-gpio2.
4.2.7 Recommended Wire Gauge
• Input VIN and GND to T1 and T2 (GND) (12-V input) – The recommended wire size is AWG #12, with the
total length of wire less than 2 feet (1 foot input, 1 foot return).
• Output T3 and GND T5 (0.8-V output) – The minimum recommended wire size is AWG #10, with the total
length of wire less than 2 feet (1 foot output, 1 foot return). A thicker wire gauge can be required to minimize
the voltage drop the wires.
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4.3 Tip and Barrel Measurement
Figure 4-1 illustrates the tip and barrel measurement for switching node waveform on TP2_P1 with TP4_P1 or
TP2_P2 with TP4_P2.
Metal Ground
Barrel
Probe
Tip
Figure 4-1. Tip and Barrel Measurement
4.4 List of Test Points, Jumpers, and Connectors
Table 4-1 lists the test point functions.
Table 4-1. Test Point Functions
Test
Point Type Name Description
TP1_P1 T-H Loop PVIN_P1 PVIN pin voltage of U1_P1 device measurement point
TP1_P2 T-H Loop PVIN_P2 PVIN pin voltage of U1_P2 device measurement point
TP2_P1 T-H Loop SW_P1 Switching node of output rail phase 1 measurement point, reference to TP4_P1
TP2_P2 T-H Loop SW_P2 Switching node of output rail phase 2 measurement point, reference to TP4_P2
TP3_P1 T-H Loop GND_P1 GND pin voltage of U1_P1 device measurement point
TP3_P2 T-H Loop GND_P2 GND pin voltage of U1_P2 device measurement point
TP4_P1 T-H Loop GND_P1 GND reference for switch node measurement of U1_P1
TP4_P2 T-H Loop GND_P2 GND reference for switch node measurement of U1_P2
TP5_P1 T-H Loop PG_S_P1 PGOOD signal of phase 1
TP5_P2 T-H Loop PG_S_P2 PGOOD signal of phase 2
TP6 T-H Loop AUX_5V External 5-V measurement point for VDD5
TP7 T-H Loop DATA DATA signal on J2 header
TP8 T-H Loop SMBALRT SMBALERT signal on J2 header
TP9 T-H Loop CNTL CNTL signal on J2 header
TP10 T-H Loop CLK CLK signal on J2 header
TP11 T-H Loop GND GND reference
TP12 T-H Loop PVIN VIN+ measurement point
TP13 T-H Loop VOUT_P1 U1_P1 output voltage measurement point for efficiency, reference to TP16
TP14 T-H Loop Remote SNS+ OUTPUT remote sense + voltage point
TP15 T-H Loop GND VIN- measurement point
TP16 T-H Loop GND_P1 U1_P1 output voltage referencing GND for efficiency measurement
TP17 T-H Loop CH_A OUTPUT for small signal loop gain measurements (B/A setup)
TP18 T-H Loop CH_B INPUT for small signal loop gain measurements (B/A setup)
TP19 T-H Loop Ext_AVIN AVIN measurement point
TP20 T-H Loop GND GND reference
TP21 T-H Loop VSHARE VSHARE measurement point. Sensitive signal.
TP22 T-H Loop VOUT VOUT + measurement point
TP23 T-H Loop GND GND reference
TP24 T-H Loop GND GND reference
TP25 T-H Loop GND VOUT - measurement point
TP26 T-H Loop VOUT_P2 U1_P2 output voltage measurement point for efficiency, reference to TP30
TP27 T-H Loop SYNC Synchronization connection between U1_P1 and U1_P2. External SYNC input.
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Table 4-1. Test Point Functions (continued)
Test
Point Type Name Description
TP28 T-H Loop Remote SNS- OUTPUT remote sense - voltage point
TP29 T-H Loop BC_DAT Data for back-channel communications between stacked devices
TP30 T-H Loop GND_P2 U1_P2 output voltage referencing GND for efficiency measurement
TP31 T-H Loop BC_CLK Clock for back-channel communications between stacked devices
TP32 T-H Loop GND GND reference
TP33 T-H Loop VOSNS_P2 VOSNS measurement point for U1_P2
TP34_P1,
TP34_P2
T-H Loop MSEL2_P1,
MSEL2_P2
MSEL2 measurement point for U1_P1 and U1_P2
TP35_P1,
TP35_P2
T-H Loop VSEL_P1,
VSEL_P2
VSEL measurement point for U1_P1 and U1_P2
Table 4-2 lists the EVM jumpers.
Table 4-2. Jumpers
Jumper Type Name Description
JP1_P1,
JP1_P2
Header, 100 mil, 2 × 1 EXT_5.1V_P1, EXT_5.1V_P2 Short to connect VDD5 of U1_P1 or U1_P2 to the 5.1 V
from U2
JP2_P1,
JP2_P2
Header, 100 mil, 3 × 2 CNTL_SEL1, CNTL_SEL2 U1_P1 and U1_P2 EN/UVLO pin selections
JP3 Header, 100 mil, 2 × 1 EN to GND Short to disable the auxiliary 5 V
JP4 Header, 100 mil, 2 × 1 AVIN-PVIN Short to connect to connect AVIN input to PVIN
JP5 Header, 100 mil, 2 × 1 AVIN-LDO Short to connect to connect AVIN input to U2 input
JP6 Header, 100 mil, 2 × 1 PMBus3.3V-AVIN Short to connect USB-to-GPIO 3.3V to AVIN
JP7_P1,
JP7_P2
Header, 100 mil, 3 × 1 AVIN-U1_P1, AVIN-U1_P2 U1_P1 and U1_P2 AVIN input source selections
JP8 Header, 100 mil, 2 × 1 Micro_USB-PVIN Short to connect PVIN to Micro USB connector
Table 4-3 lists the options for the EN/UVLO pin selections on JP2_P1 and JP2_P2.
Table 4-3. JP2_P1 and JP2_P2 Selections
Shunt Position Selection
pin 1 to 2 shorted PMBus adaptor control signal
pin 3 to 4 shorted Resistor divider to PVIN
pin 5 to 6 shorted EN/UVLO short to ground
Table 4-4 lists the options for the EN/UVLO pin selections on JP2_P1 and JP2_P2.
Table 4-4. JP7_P1 and JP7_P2 Selections
Shunt Position Selection
pin 1 to 2 shorted AVIN pin connected to AVIN input through 10-Ω resistor. Use this selection when testing with a split rail input.
pin 2 to 3 shorted AVIN pin connected to PVIN through 10-Ω resistor
Table 4-5 lists the EVM connector functions.
Table 4-5. Connector Functions
Connector Type Name Description
J1 Header, 100 mil, 6 × 2 N/A Do not use
J2 Header, 100 mil, 5 × 2 PMBus connector PMBus socket for TI FUSION adaptor
J3 Header, 100 mil, 6 × 2 N/A Do not use
J4 Micro USB Micro USB Micro USB connector to power EVM from a 5 V USB
source
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Table 4-5. Connector Functions (continued)
Connector Type Name Description
T1 Terminal block, 2 × 1 PVIN VIN+ connector
T2 Terminal block, 2 × 1 GND VIN– connector
T3 Terminal 90A Lug VOUT VOUT+ connector
T4 Terminal block, 2 × 1 Ext_AVIN External AVIN connector
T5 Terminal 90A Lug GND VOUT– connector
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4.5 Evaluating Single Phase Operation
The default configuration of the EVM is for 2-phase operation. For a single-phase operation, modify the EVM as
follows:
1. Short MSEL2 of U1_P1 to GND to program single-phase operation by populating R18_P1 with a 0-Ω
resistor.
2. If U1_P2 is left populated, disconnect VSHARE of U1_P2 (Follower) device from U1_P1 (Controller) by
depopulating R15_P1 (this is a 0-Ω resistor and can be used for MSEL2 pin of U1_P1 in the previous step).
3. If U1_P2 is left populated, disable U1_P2 by moving the JP2_P2 jumper to position 5-6 (GND).
Note
This modification leaves the AVIN (pin 26) of U1_P2 powered, if no-load leakage current or light-light
efficiency measurement is important, the U1_P2 AVIN pin must also be disconnected from the input
supply. Disconnect U1_P2 (Follower) AVIN from VIN by removing the jumper from JP7_P2.
4.6 Evaluating Split Rail Input
The default configuration of the EVM is for single rail input. Split rail input enables operation with 3.3V PVIN. For
split rail operation configure the jumpers on the EVM as follows:
1. Open JP4 to disconnect AVIN from PVIN.
2. Move the jumper JP7_P1 and JP7_P2 to position 1-2 to disconnect the AVIN pin from the PVIN pins.
3. Apply the AVIN input to T4. 4-V or greater AVIN is required to bring the VDD5 voltage high enough to enable
conversion.
4. If operation with 3.3-V PVIN is needed and the CNTL Jumpers (JP2_P1 and JP2_P2) are in position 3-4, the
resistor divider at the EN/UVLO must be changed. Alternately move the CNTL Jumpers to position 1-2 and
use the control signal to enable conversion or use the ON_OFF_CONFIG and OPERATION commands to
enable conversion.
4.7 Configuring EVM to Overdrive VDD5
The EVM has an external LDO (U2) that can be used to overdrive VDD5. The output of this LDO is set for 5.1 V
by default. This LDO is useful to minimize the power dissipation in the TPS546D24S IC when using a single rail
input. Overdriving VDD5 moves the loss from the internal LDO of the TPS546D24S to the external LDO (U2). To
use this LDO, configure the jumpers on the EVM as follows:
1. Short JP4 and JP5 to connect the input of the LDO to the input supply.
2. Open JP3 to enable the LDO.
3. Short JP1_P1 and JP1_P2 to connect the LDO output to the VDD5 pin.
4. Ensure the VDD5 output of the TPS546D24S is set below the external LDO output voltage.
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5 EVM Configuration Using the Fusion GUI
The TPS546D24S IC leaves the factory pre-configured. The factory default settings for the parameters can
be found in the datasheet. If configuring the EVM to settings other than the factory defaults, use the software
described in Test and Configuration Software. Make sure to have the input voltage applied to the EVM prior
to launching the software so that the TPS546D24S can respond to the GUI and the GUI can recognize the
device. The default configuration for the EVM to stop converting is set by the EN/UVLO resistor divider to a
nominal input voltage of 4.75 V; therefore if necessary to avoid any converter activity during configuration, an
input voltage less than 4.75 V must be applied. TI recommends an input voltage of 3.3 V.
5.1 Configuration Procedure
1. Adjust the input supply to provide 3.3 VDC, current limited to 1 A.
2. Apply the input voltage to the EVM. See Section 4.2 for connections and test setup.
3. Launch the Fusion GUI software. See the screen shots in Section 10 for more information.
4. Configure the EVM operating parameters as desired.
By default the pinstrap resistors configure U1_P1 as the stack controller and U1_P2 as the stack follower.
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6 Test Procedure
6.1 Line and Load Regulation and Efficiency Measurement Procedure
1. Set up the EVM as Section 4.2 and Section 6.2 describe.
2. Set the electronic load to draw 0 ADC.
3. Increase VIN from 0 V to 12 V using voltage meter to measure input voltage.
4. Use the other voltage meter to measure output voltage VOUT.
5. Vary the load from 0 to 80 ADC. VOUT must remain in regulation as defined in Table 2-1.
6. Vary VIN from 5 V to 16 V. VOUT must remain in regulation as defined in Table 2-1.
7. Decrease the load to 0 A.
8. Decrease VIN to 0 V.
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6.2 Efficiency Measurement Test Points
To evaluate the efficiency of the power train (device and inductor), make sure to measure the voltages at the
correct location. This action is necessary because otherwise the measurements include losses that are not
related to the power train itself. Losses incurred by the voltage drop in the copper traces and in the input and
output connectors are not related to the efficiency of the power train, which must not be included in efficiency
measurements.
Input current can be measured at any point in the input wires, and output current can be measured anywhere in
the output wires of the output being measured.
Table 6-1 shows the measurement points for input voltage and output voltage. VIN and VOUT are measured
to calculate the efficiency. Using these measurement points results in efficiency measurements that excluded
losses due to the wires and connectors.
Table 6-1. Test Points for Efficiency Measurements
Test Point Node Name Description Comment
TP12 PVIN Input voltage measurement point
for VIN+ The pair of test points are connected to the PVIN/PGND pins of U1_P1. The voltage drop
between input terminal to the device pins is included for efficiency measurement.
TP15 PGND Input voltage measurement point
for VIN– (GND)
TP22 VOUT Output voltage measurement
point for VOUT+ The pair of test points are connected near the output terminals. The voltage drop from the
output point of the inductor to the output terminals is included for efficiency measurement.
TP25 GND Output voltage measurement
point for VOUT– (GND)
For more accurate efficiency measurements of the power train, remove the voltage drop between the power train
and the terminals from the measurement. Using the test points in Table 6-2 reduces these losses. To average
the voltages at each test point so that only one meter is needed for PVIN and VOUT, add some resistance
between the each test point and the meter. For the measurements taken in this user's guide, a 1.5-kΩ resistor
was added in series with each test point. Using these test points reduced the measured power loss at 80 A load
by approximately 0.5 W. This power is lost in the copper traces of the PCB.
Table 6-2. Test Points for Better Efficiency Measurements
Test Point Node Name Description Comment
TP1_P1 PVIN_P1 Input voltage measurement point
for VIN+ This pair of test points are connected to PVIN and PGND near the pins of U1_P1
TP4_P1 GND_P1 Input voltage measurement point
for VIN– (PGND)
TP1_P2 PVIN_P2 Input voltage measurement point
for VIN+ This pair of test points are connected to PVIN and PGND near the pins of U1_P2
TP4_P2 GND_P2 Input voltage measurement point
for VIN– (PGND)
TP13 VOUT_P1 Output voltage measurement
point for VOUT+ This pair of test points are connected to VOUT and GND near the output inductor for U1_P1
TP16 GND_P1 Output voltage measurement
point for VOUT– (GND)
TP26 VOUT_P2 Output voltage measurement
point for VOUT+ This pair of test points are connected to VOUT and GND near the output inductor for U1_P2
TP30 GND_P2 Output voltage measurement
point for VOUT– (GND)
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6.3 Control Loop Gain and Phase Measurement Procedure
The TPS546D24SEVM-2PH includes a 49.9-Ω series resistor in the feedback loop for VOUT. The resistor is
accessible at the test points TP17 and TP18 for loop response analysis. These test points must be used during
loop response measurements as the perturbation injecting points for the loop . See the description in Table 6-3.
Table 6-3. List of Test Points for Loop Response Measurements
Test Point Node Name Description Comment
TP18 CH_B Input to feedback divider of VOUT The amplitude of the perturbation at this node must be limited to less than 30 mV
TP17 CH_A Resulting output of VOUT Bode can be measured by a network analyzer with a CH_B/CH_A configuration
Measure the loop response with the following procedure:
1. Set up the EVM as described in Section 4.2.
2. For VOUT, connect the isolation transformer of the network analyzer from TP18 to TP17.
3. Connect the input signal measurement probe to TP18. Connect the output signal measurement probe to
TP17.
4. Connect the ground leads of both probe channels to TP20.
5. On the network analyzer, measure the Bode as TP18/TP17 (In/Out).
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7 Performance Data and Typical Characteristic Curves
Figure 7-1 through Figure 7-4 present typical performance curves for the TPS546D24SEVM-2PH. The input
voltage is 12 V and the oscilloscope measurements use 20 MHz bandwidth limiting unless otherwise noted.
7.1 Efficiency
Output Current (A)
Efficiency (%)
0 10 20 30 40 50 60 70 80
40
50
60
70
80
90
100
VIN = 5 V
VIN = 12 V
VIN = 16 V
Figure 7-1. Efficiency, VOUT Measured Using TP13,
TP16, TP26 and TP30
Output Current (A)
Efficiency (%)
0 10 20 30 40 50 60 70 80
40
50
60
70
80
90
100
VIN = 5 V
VIN = 12 V
VIN = 16 V
Figure 7-2. Efficiency, VOUT Measured Using TP22
and TP25
7.2 Load and Line Regulation (Measured Between TP22 and TP25)
Output Current (A)
Output Voltage (V)
0 10 20 30 40 50 60 70 80
0.795
0.796
0.797
0.798
0.799
0.8
0.801
0.802
0.803
0.804
0.805
VIN = 5 V
VIN = 12 V
VIN = 16 V
Figure 7-3. Load Regulation
Input Voltage (V)
Output Voltage (V)
5 6 7 8 9 10 11 12 13 14 15 16
0.795
0.796
0.797
0.798
0.799
0.8
0.801
0.802
0.803
0.804
0.805
IOUT = 0 A
IOUT = 40 A
IOUT = 80 A
Figure 7-4. Line Regulation
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7.3 Transient Response
Figure 7-5 shows the transient response waveform with a 20-A to 60-A transient at 1 A/µs
Timescale = 100 µs/div, CH4 = IOUT STEP at 10 A/div, CH3 = VOUT at 50 mV/division
Figure 7-5. Transient Response
7.4 Control Loop Bode Plot
Figure 7-6 is the control loop bode plot.
Frequency (Hz)
Gain (dB)
1000 2000 5000 10000 100000 1000000
-60 -180
-40 -120
-20 -60
0 0
20 60
40 120
60 180
Gain
Phase
Figure 7-6. Bode Plot at 0.8-V Output at 12 VIN, 20-A Load
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