ECCN 5E002 TSPA - Technology / Software Publicly Available
CC430F6137, CC430F6135, CC430F6127, CC430F6126, CC430F6125
CC430F5137, CC430F5135, CC430F5133
www.ti.com
SLAS554H –MAY 2009–REVISED SEPTEMBER 2013
MSP430™ SoC With RF Core
Check for Samples: CC430F6137,CC430F6135,CC430F6127,CC430F6126,CC430F6125,CC430F5137,CC430F5135,CC430F5133
1FEATURES
23• True System-on-Chip (SoC) for Low-Power – Embedded Emulation Module (EEM)
Wireless Communication Applications • High-Performance Sub-1-GHz RF Transceiver
• Wide Supply Voltage Range: Core
3.6 V Down to 1.8 V – Same as in CC1101
• Ultralow-Power Consumption: – Wide Supply Voltage Range: 2.0 V to 3.6 V
– CPU Active Mode (AM): 160 µA/MHz – Frequency Bands: 300 MHz to 348 MHz,
– Standby Mode (LPM3 RTC Mode): 2.0 µA 389 MHz to 464 MHz, and 779 MHz to
928 MHz
– Off Mode (LPM4 RAM Retention): 1.0 µA – Programmable Data Rate From 0.6 kBaud
– Radio in RX: 15 mA, 250 kbps, 915 MHz to 500 kBaud
• MSP430 System and Peripherals – High Sensitivity (–117 dBm at 0.6 kBaud,
– 16-Bit RISC Architecture, Extended –111 dBm at 1.2 kBaud, 315 MHz,
Memory, up to 20-MHz System Clock 1% Packet Error Rate)
– Wake Up From Standby Mode in Less – Excellent Receiver Selectivity and Blocking
Than 6 µs Performance
– Flexible Power-Management System With – Programmable Output Power Up to
SVS and Brownout +12 dBm for All Supported Frequencies
– Unified Clock System With FLL – 2-FSK, 2-GFSK, and MSK Supported as
– 16-Bit Timer TA0, Timer_A With Five Well as OOK and Flexible ASK Shaping
Capture/Compare Registers – Flexible Support for Packet-Oriented
– 16-Bit Timer TA1, Timer_A With Three Systems: On-Chip Support for Sync Word
Capture/Compare Registers Detection, Address Check, Flexible Packet
– Hardware Real-Time Clock (RTC) Length, and Automatic CRC Handling
– Two Universal Serial Communication – Support for Automatic Clear Channel
Interfaces Assessment (CCA) Before Transmitting (for
– USCI_A0 Supports UART, IrDA, SPI Listen-Before-Talk Systems)
– USCI_B0 Supports I2C, SPI – Digital RSSI Output
– 12-Bit Analog-to-Digital Converter (ADC) – Suited for Systems Targeting Compliance
With Internal Reference, Sample-and-Hold, With EN 300 220 (Europe) and
and Autoscan Features (CC430F613x and FCC CFR Part 15 (US)
CC430F513x Only) – Suited for Systems Targeting Compliance
– Comparator With Wireless M-Bus Standard EN
13757‑‑4:2005
– Integrated LCD Driver With Contrast
Control for up to 96 Segments – Support for Asynchronous and
(CC430F61xx Only) Synchronous Serial Receive or Transmit
Mode for Backward Compatibility With
– 128-Bit AES Security Encryption and Existing Radio Communication Protocols
Decryption Coprocessor •Table 1 Summarizes Family Members
– 32-Bit Hardware Multiplier • For Complete Module Descriptions, See the
– Three-Channel Internal DMA CC430 Family User's Guide (SLAU259)
– Serial Onboard Programming, No External
Programming Voltage Needed
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2MSP430 is a trademark of Texas Instruments.
3All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2009–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
