
xv
4.10.4 Signal ................................................................................................................................. 871
Automatic sequence control function (ASEQ) ......................................................................... 873
4.11.1 Function setup................................................................................................................... 874
4.11.2 Preparation of the operation............................................................................................. 875
4.11.3 Example of automatic sequence operation....................................................................... 876
4.11.4 Control hierarchy conditions............................................................................................. 878
4.11.5 Input for emergency stop .................................................................................................. 878
4.11.6 Mapping for IEC61850 communication............................................................................ 880
4.11.7 Setting................................................................................................................................ 884
4.11.8 Signal ................................................................................................................................. 885
5Technical Description ...................................................................................................................... 887
IED case and module slot......................................................................................................... 890
5.1.1 Type using compression terminals ................................................................................... 891
5.1.2 Type using ring terminals................................................................................................. 897
Transformer module for AC analog input (VCT)..................................................................... 903
5.2.1 VCT12B.............................................................................................................................. 904
5.2.2 Constitution of VCT........................................................................................................... 905
5.2.3 Setting VCT ratio .............................................................................................................. 906
5.2.4 Sifting VCT rated current................................................................................................. 907
5.2.5 Settings for residual voltage, CT polarity, and busbar arrangements............................ 910
Signal processing and communication module (CPU) ............................................................ 913
5.3.1 Signal processing............................................................................................................... 913
5.3.2 Configuration switch ......................................................................................................... 914
5.3.3 Communication modules................................................................................................... 915
5.3.4 Location of communication modules................................................................................. 919
Binary IO module (BI, BO, and BIO) ...................................................................................... 921
5.4.1 Binary input feature.......................................................................................................... 922
5.4.2 Binary input circuit........................................................................................................... 923
5.4.3 Binary output feature........................................................................................................ 934
5.4.4 Binary output circuit......................................................................................................... 936
5.4.5 Structure of binary IO Module.......................................................................................... 941
5.4.6 Settings of binary input circuits ....................................................................................... 947
5.4.7 Signals (Data ID) of binary input circuits........................................................................ 949
5.4.8 Settings of binary output circuits ..................................................................................... 952
5.4.9 Signals (Data ID) of binary output circuits...................................................................... 954
Power supply module (PWS).................................................................................................... 956
5.5.1 PWS structure ................................................................................................................... 956
5.5.2 Input and output items of PWS ........................................................................................ 958
5.5.3 DC voltage monitoring ...................................................................................................... 959