TQ-Systems TQMa8Xx User manual

TQMa8Xx
Preliminary User's Manual
TQMa8Xx UM 0002
23.09.2018

Preliminary User's Manual l TQMa8Xx UM 0002 l © 2018, TQ-Systems mbH Page i
TABLE OF CONTENTS
1. ABOUT THIS MANUAL................................................................................................................................................................................1
1.1 Copyright and license expenses.............................................................................................................................................................1
1.2 Registered trademarks ..............................................................................................................................................................................1
1.3 Disclaimer......................................................................................................................................................................................................1
1.4 Imprint............................................................................................................................................................................................................1
1.5 Tips on safety................................................................................................................................................................................................2
1.6 Symbols and typographic conventions ...............................................................................................................................................2
1.7 Handling and ESD tips...............................................................................................................................................................................2
1.8 Naming of signals .......................................................................................................................................................................................3
1.9 Further applicable documents / presumed knowledge.................................................................................................................3
2. BRIEF DESCRIPTION ....................................................................................................................................................................................4
2.1 Block diagram i.MX 8X...............................................................................................................................................................................4
2.2 Key functions and characteristics...........................................................................................................................................................5
3. ELECTRONICS ...............................................................................................................................................................................................6
3.1 Interfaces to other systems and devices..............................................................................................................................................6
3.1.1 Pin multiplexing ..........................................................................................................................................................................................6
3.1.2 Connector X1................................................................................................................................................................................................7
3.1.3 Connector X2................................................................................................................................................................................................8
3.1.4 Connector X3................................................................................................................................................................................................9
3.2 System components ............................................................................................................................................................................... 10
3.2.1 i.MX 8X CPU................................................................................................................................................................................................ 10
3.2.1.1 i.MX 8X derivatives................................................................................................................................................................................... 10
3.2.1.2 i.MX 8X errata ............................................................................................................................................................................................ 10
3.2.1.3 Boot modes................................................................................................................................................................................................ 10
3.2.2 Memory....................................................................................................................................................................................................... 11
3.2.2.1 DDR3L SDRAM .......................................................................................................................................................................................... 11
3.2.2.2 eMMC NAND flash ................................................................................................................................................................................... 11
3.2.2.3 QSPI NOR flash .......................................................................................................................................................................................... 12
3.2.2.4 EEPROM....................................................................................................................................................................................................... 12
3.2.2.5 EEPROM with temperature sensor...................................................................................................................................................... 13
3.2.3 RTC................................................................................................................................................................................................................ 13
3.2.4 Interfaces .................................................................................................................................................................................................... 14
3.2.5 Reset............................................................................................................................................................................................................. 14
3.2.6 Power........................................................................................................................................................................................................... 15
3.2.6.1 Power supply............................................................................................................................................................................................. 15
3.2.6.2 Power consumption................................................................................................................................................................................ 15
3.2.6.3 LICELL........................................................................................................................................................................................................... 15
3.2.6.4 ADC input voltage V_ADC_IN .............................................................................................................................................................. 16
3.2.6.5 USB_OT [2:1]_VBUS ............................................................................................................................................................................... 16
3.2.6.6 Provided TQMa8Xx voltages ................................................................................................................................................................ 16
3.2.6.7 Voltage monitoring................................................................................................................................................................................. 16
3.2.6.8 Power-Up sequence TQMa8Xx / carrier board ............................................................................................................................... 17
3.2.6.9 Power modes............................................................................................................................................................................................. 17
3.2.6.10 PMIC ............................................................................................................................................................................................................. 17

Preliminary User's Manual l TQMa8Xx UM 0002 l © 2018, TQ-Systems mbH Page ii
TABLE OF CONTENTS (continued)
4. MECHANICS ............................................................................................................................................................................................... 18
4.1 Connectors................................................................................................................................................................................................. 18
4.2 Dimensions ................................................................................................................................................................................................ 19
4.3 Component placement.......................................................................................................................................................................... 20
4.4 Adaptation to the environment .......................................................................................................................................................... 21
4.5 Protection against external effects..................................................................................................................................................... 21
4.6 Thermal management............................................................................................................................................................................ 21
4.7 Structural requirements......................................................................................................................................................................... 21
4.8 Notes of treatment .................................................................................................................................................................................. 21
5. SOFTWARE.................................................................................................................................................................................................. 21
6. SAFETY REQUIREMENTS AND PROTECTIVE RE ULATIONS......................................................................................................... 22
6.1 EMC............................................................................................................................................................................................................... 22
6.2 ESD................................................................................................................................................................................................................ 22
6.3 Operational safety and personal security......................................................................................................................................... 22
6.4 Climate and operational conditions................................................................................................................................................... 23
6.5 Reliability and service life ...................................................................................................................................................................... 23
7. ENVIRONMENT PROTECTION................................................................................................................................................................ 24
7.1 RoHS............................................................................................................................................................................................................. 24
7.2 WEEE®.......................................................................................................................................................................................................... 24
7.3 REACH®........................................................................................................................................................................................................ 24
7.4 EuP................................................................................................................................................................................................................ 24
7.5 Battery ......................................................................................................................................................................................................... 24
7.6 Packaging................................................................................................................................................................................................... 24
7.7 Other entries.............................................................................................................................................................................................. 24
8. APPENDIX................................................................................................................................................................................................... 25
8.1 Acronyms and definitions ..................................................................................................................................................................... 25
8.2 References.................................................................................................................................................................................................. 27

Preliminary User's Manual l TQMa8Xx UM 0002 l © 2018, TQ-Systems mbH Page iii
TABLE DIRECTORY
Table 1: Terms and conventions..............................................................................................................................................................2
Table 2: Pinout connector X1....................................................................................................................................................................7
Table 3: Pinout connector X2....................................................................................................................................................................8
Table 4: Pinout connector X3....................................................................................................................................................................9
Table 5: i.MX 8X derivatives.................................................................................................................................................................... 10
Table 6: Boot-Mode / BT_FUSE_SEL..................................................................................................................................................... 10
Table 7: EEPROM........................................................................................................................................................................................ 12
Table 8: Manufacturer EEPROM ............................................................................................................................................................ 13
Table 9: Temperature sensor SE97BTP................................................................................................................................................ 13
Table 10: Reset and config signals.......................................................................................................................................................... 14
Table 11: TQMa8Xx power consumption @ 3.3 V .............................................................................................................................. 15
Table 12: TQMa8Xx LICELL........................................................................................................................................................................ 15
Table 13: USB_OT [2:1]_VBUS ................................................................................................................................................................ 16
Table 14: Provided TQMa8Xx voltages.................................................................................................................................................. 16
Table 15: Provided PMIC signals ............................................................................................................................................................. 17
Table 16: TQMa8Xx connectors............................................................................................................................................................... 18
Table 17: Carrier board mating connectors......................................................................................................................................... 18
Table 18: Labels on TQMa8Xx.................................................................................................................................................................. 20
Table 19: Climate and operational conditions extended temperature range –25 °C to +85 °C.......................................... 23
Table 20: Climate and operational conditions industrial temperature range –40 °C to +85 °C .......................................... 23
Table 21: Acronyms..................................................................................................................................................................................... 25
Table 22: Further applicable documents.............................................................................................................................................. 27
ILLUSTRATION DIRECTORY
Illustration 1: Block diagram i.MX 8X CPU.......................................................................................................................................................4
Illustration 2: Block diagram TQMa8Xx............................................................................................................................................................6
Illustration 3: Block diagram DDR3L interface............................................................................................................................................ 11
Illustration 4: Block diagram eMMC interface............................................................................................................................................. 11
Illustration 5: Block diagram QSPI interface ................................................................................................................................................ 12
Illustration 6: Block diagram EEPROM interface......................................................................................................................................... 12
Illustration 7: Block diagram temperature sensor interface................................................................................................................... 13
Illustration 8: Block diagram Reset................................................................................................................................................................. 14
Illustration 9: Block diagram power supply................................................................................................................................................. 15
Illustration 10: Block diagram power supply carrier board....................................................................................................................... 17
Illustration 11: TQMa8Xx dimensions, side view.......................................................................................................................................... 19
Illustration 12: TQMa8Xx CPU position, top view......................................................................................................................................... 19
Illustration 13: TQMa8Xx dimensions, top view through TQMa8Xx................................................................................................... 19
Illustration 14: TQMa8Xx, component placement top............................................................................................................................... 20
Illustration 15: TQMa8Xx, component placement bottom....................................................................................................................... 20
REVISION HISTORY
Rev. Date Name Pos. Modification
0001 19.06.2018 Petz Initial release
0002 23.09.2018 Petz
All
Illustration 2
Table 10
Table 19, Table 20
Links updated, ® and ™ added/updated
Names of i.MX 8X derivatives corrected
Remarks clarified
“Package temperature” replaced with “Case temperature”
Case temperature DDR3L SDRAM changed to +95 °C

Preliminary User's Manual l TQMa8Xx UM 0002 l © 2018, TQ-Systems mbH Page 1
1. ABOUT THIS MANUAL
1.1 Cop right and license expenses
Copyright protected © 2018 by TQ-Systems mbH.
This Preliminary User's Manual may not be copied, reproduced, translated, changed or distributed, completely or partially
in electronic, machine readable, or in any other form without the written consent of TQ-Systems mbH.
The drivers and utilities for the components used as well as the BIOS are subject to the copyrights of the respective
manufacturers. The licence conditions of the respective manufacturer are to be adhered to.
Bootloader-licence expenses are paid by TQ-Systems mbH and are included in the price.
Licence expenses for the operating system and applications are not taken into consideration and must be calculated / declared
separately.
1.2 Registered trademarks
TQ-Systems mbH aims to adhere to copyrights of all graphics and texts used in all publications, and strives to use original
or license-free graphics and texts.
All brand names and trademarks mentioned in the Preliminary User's Manual, including those protected by a third party, unless
specified otherwise in writing, are subjected to the specifications of the current copyright laws and the proprietary laws of the
present registered proprietor without any limitation. One should conclude that brand and trademarks are rightly protected
by a third party.
1.3 Disclaimer
TQ-Systems mbH does not guarantee that the information in this Preliminary User's Manual is up-to-date, correct, complete or
of good quality. Nor does TQ-Systems mbH assume guarantee for further usage of the information. Liability claims against TQ-
Systems mbH, referring to material or non-material related damages caused, due to usage or non-usage of the information
given in this Preliminary User's Manual, or due to usage of erroneous or incomplete information, are exempted, as long as there
is no proven intentional or negligent fault of TQ-Systems mbH.
TQ-Systems mbH explicitly reserves the rights to change or add to the contents of this Preliminary User's Manual or parts of it
without special notification.
Important Notice:
Before using the MBa8Xx or parts of the schematics of the MBa8Xx, you must evaluate it and determine if it is suitable for your
intended application. You assume all risks and liability associated with such use. TQ-Systems mbH makes no other warranties
including, but not limited to, any implied warranty of merchantability or fitness for a particular purpose. Except where prohibited
by law, TQ-Systems mbH will not be liable for any indirect, special, incidental or consequential loss or damage arising from the
usage of the MBa8Xx or schematics used, regardless of the legal theory asserted.
1.4 Imprint
TQ-Systems mbH
ut Delling, Mühlstraße 2
D-82229 Seefeld
Tel: [phone]
Fax: [phone]
E-Mail: Info@TQ- roup
Web: TQ- roup

Preliminary User's Manual l TQMa8Xx UM 0002 l © 2018, TQ-Systems mbH Page 2
1.5 Tips on safet
Improper or incorrect handling of the product can substantially reduce its life span.
1.6 S mbols and t pographic conventions
Table 1: Terms and conventions
Symbol Meaning
This symbol represents the handling of electrostatic-sensitive modules and / or components. These
components are often damaged / destroyed by the transmission of a voltage higher than about 50 V.
A human body usually only experiences electrostatic discharges above approximately 3,000 V.
This symbol indicates the possible use of voltages higher than 24 V.
Please note the relevant statutory regulations in this regard.
Non-compliance with these regulations can lead to serious damage to your health and may damage
or destroy the component.
This symbol indicates a possible source of danger.
Ignoring the instructions described can cause health damage, or damage the hardware.
This symbol represents important details or aspects for working with TQ-products.
Command A font with fixed-width is used to denote commands, contents, file names, or menu items.
1.7 Handling and ESD tips
eneral handling of your TQ-products
The TQ-product may only be used and serviced by certified personnel who have taken note of the
information, the safety regulations in this document and all related rules and regulations.
A general rule is not to touch the TQ-product during operation. This is especially important when
switching on, changing jumper settings or connecting other devices without ensuring beforehand
that the power supply of the system has been switched off.
Violation of this guideline may result in damage / destruction of the TQMa8Xx and be dangerous
to your health.
Improper handling of your TQ-product would render the guarantee invalid.
Proper ESD handling
The electronic components of your TQ-product are sensitive to electrostatic discharge (ESD).
Always wear antistatic clothing, use ESD-safe tools, packing materials etc., and operate your TQ-
product in an ESD-safe environment. Especially when you switch modules on, change jumper settings,
or connect other devices.

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1.8 Naming of signals
A hash mark (#) at the end of the signal name indicates a low-active signal.
Example: RESET#
If a signal can switch between two functions and if this is noted in the name of the signal, the low-active function is marked with
a hash mark and shown at the end.
Example: C / D#
If a signal has multiple functions, the individual functions are separated by slashes when they are important for the wiring.
The identification of the individual functions follows the above conventions.
Example: WE2# / OE#
1.9 Further applicable documents / presumed knowledge
•Specifications and manual of the modules used:
These documents describe the service, functionality and special characteristics of the module used (incl. BIOS).
•Specifications of the components used:
The manufacturer's specifications of the components used, for example CompactFlash cards, are to be taken note of.
They contain, if applicable, additional information that must be taken note of for safe and reliable operation.
These documents are stored at TQ-Systems mbH.
•Chip errata:
It is the user's responsibility to make sure all errata published by the manufacturer of each component are taken note of.
The manufacturer’s advice should be followed.
•Software behaviour:
No warranty can be given, nor responsibility taken for any unexpected software behaviour due to deficient components.
•General expertise:
Expertise in electrical engineering / computer engineering is required for the installation and the use of the device.
The following documents are required to fully comprehend the following contents:
•MBa8Xx circuit diagram
•MBa8Xx User’s Manual
•i.MX 8X Data Sheet
•i.MX 8X Reference Manual
•U-Boot documentation: www.denx.de/wiki/U-Boot/Documentation
•PTXdist documentation: www.ptxdist.de
•TQ-Support Wiki: support.tq-group.com/doku.php?id=en:arm:tqma8xx

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2. BRIEF DESCRIPTION
This Preliminary User's Manual describes the hardware of TQMa8Xx revision 01xx in combination with the MBa8Xx revision 01xx
and refers to some software settings. The MBa8Xx serves as an evaluation board for the TQMa8Xx. A certain TQMa8Xx version
does not necessarily provide all features described in this Preliminary User's Manual. This Preliminary User's Manual does also not
replace the NXP i.MX 8X Reference Manual (2). The CPU derivatives provide dual, and quad ARM® Cortex™ A35 cores, and up to
two Dual ARM® Cortex™-M4 co-processors. In addition, the CPUs include an Open L ES 3.0 or 3.1 PU as well as a VPU
supporting up to 4K h.265 decoder.
The TQMa8Xx is a universal Minimodule based on these NXP ARM® Cortex™ A35 i.MX 8X CPUs, see also Table 5.
An i.MX 8X Cortex™ A35 core typically operates at 1.2 Hz.
2.1 Block diagram i.MX 8X
Illustration 1: Block diagram i.MX 8X CPU
(Source: NXP)
The TQMa8Xx extends the TQ-Systems mbH product range and offers an outstanding computing performance.
A suitable i.MX 8X derivative (i.MX 8DualX, i.MX 8DualXPlus, or i.MX 8QuadXPlus) can be selected for each requirement.
All essential CPU signals are routed to the connectors. There are therefore no restrictions for customers using the TQMa8Xx with
respect to an integrated customised design. All essential components like CPU, DDR3L SDRAM, eMMC, and power management
are already integrated on the TQMa8Xx. The main features of the TQMa8Xx are:
•64-bit NXP i.MX 8X CPU with up to 4 × ARM® Cortex™ A35 and 1 × ARM® Cortex™ M4F
•Derivatives: i.MX 8DualX / i.MX 8DualXPlus / i.MX 8QuadXPlus
•Up to 2 byte DDR3L SDRAM, with 2 × 32 bit data bus interface, one channel optional with ECC
•Up to 64 byte eMMC NAND flash
•Up to 256 Mbyte QSPI NOR flash (optional)
•64 kbit EEPROM
•EEPROM + temperature sensor
•NXP Power Management Integrated Circuit PF8100, “ASIL” ready
•All essential CPU signals are routed to the TQMa8Xx connectors
•Extended temperature range
•Boot mode selection on TQMa8Xx
•3.3 V single supply voltage

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2.2 Ke functions and characteristics
The following components are implemented on the TQMa8Xx:
•NXP i.MX 8DualX / i.MX 8DualXPlus / i.MX 8QuadXPlus / CPU
•DDR3L SDRAM
•eMMC NAND flash
•QSPI NOR flash
•EEPROM
•EEPROM + Temperature sensor
•RTC (optional)
•Supervisor with Reset structure
•Power supply by PMIC with Power Sequencing (single 3.3 V supply)
•Boot configuration
•Three connectors (2 × 120 pins, 1 × 40 pins)
The following primary interfaces are provided at the TQMa8Xx connectors: 1
•2 × bE ( igabit Ethernet)
•2 × I2C
•1 × JTA
•1 × LVDS interface
•2 × CAN
•3 × SPI
•2 × USB 2.0 OT
•1 × USB 3.0
•2 × UART
•1 × SD 4-bit (SDIO / MMC / SD card)
•1 × QSPI)
•1 × I2S (MCASP)
•1 × PCIe
1: Number of interfaces depend on i.MX 8X derivative.

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3. ELECTRONICS
The information provided in this Preliminary User's Manual is only valid in connection with the tailored boot loader,
which is preinstalled on the TQMa8Xx, and the BSP provided by TQ-Systems mbH, see also chapter 5.
Illustration 2: Block diagram TQMa8Xx
3.1 Interfaces to other s stems and devices
3.1.1 Pin multiplexing
When using the CPU signals, the multiple pin configurations by different CPU-internal function units must be taken note of.
NXP provides a tool showing the multiplexing and simplifies the selection and configuration (NXP Pin Mux Tool):
The pin assignment listed in Table 2, Table 3, and Table 4 refers to the corresponding BSP provided by TQ-Systems mbH
in combination with the MBa8Xx.
The electrical and pin characteristics are to be taken from the i.MX 8X Data Sheet (1), the i.MX 8X Reference Manual (2),
and the PMIC Data Sheet (4).
Attention: Destruction or malfunction
Depending on the configuration, many i.MX 8X balls can provide several different functions.
Please take note of the information in the i.MX 8X Reference Manual (2), and the i.MX 8X Errata (3)
concerning the configuration of these pins before integration or start-up of your carrier board.
Improper programming by operating software can cause malfunctions, deterioration or
destruction of the TQMa8Xx.
The meanings given in the following tables must be observed:
RFU: Reserved pins without function.
To support future TQMa8Xx versions, these pins must not be connected.
DNC: These pins must never be wired and must be left open.

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3.1.2 Connector X1
Table 2: Pinout connector X1
Ball I/O Level roup Signal Pin Signal roup Level I/O Ball
– P 0 V round ND 1 2 ND round 0 V P –
E35 O 1.8 V ENET ENET1_REFCLK_OUT 3 4 TEMP_EVENT# CONFI – O –
– P 0 V round ND 5 6 ND round 0 V P –
D32 I 1.8 V ENET ENET1_RXC 7 8 ENET1_TXC ENET 1.8 V O F30
– P 0 V round ND 9 10 ND round 0 V P –
D34 I 1.8 V ENET ENET1_RX_CTL 11 12 ENET1_TX_CTL ENET 1.8 V O H28
31 I 1.8 V ENET ENET1_RXD0 13 14 ENET1_TXD0 ENET 1.8 V O F32
C33 I 1.8 V ENET ENET1_RXD1 15 16 ENET1_TXD1 ENET 1.8 V O J29
K28 I 1.8 V ENET ENET1_RXD2 17 18 ENET1_TXD2 ENET 1.8 V O 29
B34 I 1.8 V ENET ENET1_RXD3 19 20 ENET1_TXD3 ENET 1.8 V O E31
– P 0 V round ND 21 22 ND round 0 V P –
P34 I/O 1.8 V M4 PIO M4_ PIO0_IO02 23 24 PIO0_IO30 PIO 1.8 V I/O L35
R33 I/O 1.8 V M4 PIO M4_ PIO0_IO03 25 26 PIO0_IO31 PIO 1.8 V I/O N35
R31 I/O 1.8 V M4 I2C M4_I2C_SDA 27 28 PIO1_IO07 PIO 1.8 V I/O R35
P30 I/O 1.8 V M4 I2C M4_I2C_SCL 29 30 PMIC_P OOD CONFI 1.8 V O –
– P 0 V round ND 31 32 ND round 0 V P –
H34 O 1.8 V UART UART1_TX 33 34 SPI2_SCK SPI 1.8 V O R29
L31 I 1.8 V UART UART1_RX 35 36 SPI2_SDO SPI 1.8 V O P32
N29 O 1.8 V UART UART1_RTS# 37 38 SPI2_SDI SPI 1.8 V I N31
K32 I 1.8 V UART UART1_CTS# 39 40 SPI2_CS0# SPI 1.8 V O P28
– P 0 V round ND 41 42 SPI1_CS0# SPI 1.8 V O M34
D30 O 1.8 V ENET ENET0_MDC 43 44 SPI1_CS1# SPI 1.8 V O M32
B32 I/O 1.8 V ENET ENET0_MDIO 45 46 SPI1_SDO SPI 1.8 V O K34
– P 0 V round ND 47 48 SPI1_SDI SPI 1.8 V I J35
F28 O 1.8 V ENET ENET0_REFCLK_OUT 49 50 SPI1_SCK SPI 1.8 V O L33
– P 0 V round ND 51 52 ND round 0 V P –
D28 I 1.8 V ENET ENET0_RXC 53 54 ENET0_TXC ENET 1.8 V O H24
– P 0 V round ND 55 56 ND round 0 V P –
B30 I 1.8 V ENET ENET0_RX_CTL 57 58 ENET0_TX_CTL ENET 1.8 V O A29
– P 0 V round ND 59 60 ND round 0 V P –
A31 I 1.8 V ENET ENET0_RXD0 61 62 ENET0_TXD0 ENET 1.8 V O 25
C29 I 1.8 V ENET ENET0_RXD1 63 64 ENET0_TXD1 ENET 1.8 V O B28
27 I 1.8 V ENET ENET0_RXD2 65 66 ENET0_TXD2 ENET 1.8 V O E27
H26 I 1.8 V ENET ENET0_RXD3 67 68 ENET0_TXD3 ENET 1.8 V O F26
– P 0 V round ND 69 70 ND round 0 V P –
17 I 3.3 V USB USB_OT 1_ID 71 72 USB_OT 2_ID USB 3.3 V I F16
H18 P 5 V USB USB_OT 1_VBUS 73 74 USB_OT 2_VBUS USB 3.3 V P H16
F14 O 3.3 V USB USB_OT 1_PWR 75 76 USB_OT 2_PWR USB 3.3 V O H14
15 I 3.3 V USB USB_OT 1_OC 77 78 USB_OT 2_OC USB 3.3 V I C15
– P 0 V round ND 79 80 ND round 0 V P –
E19 I/O 3.3 V USB USB_OT 1_DN 81 82 USB_OT 2_DN USB 3.3 V I/O D16
D18 I/O 3.3 V USB USB_OT 1_DP 83 84 USB_OT 2_DP USB 3.3 V I/O E17
– P 0 V round ND 85 86 ND round 0 V P –
C25 I/O 1.8/3.3 V SD SD1_CMD 87 88 USB_SS_TX_P USB 1.0 V O B16
– P 0 V round ND 89 90 USB_SS_TX_N USB 1.0 V O A35
23 O 1.8/3.3 V SD SD1_CLK 91 92 ND round 0 V P –
– P 0 V round ND 93 94 USB_SS_RX_P USB 1.0 V I A19
A27 I/O 1.8/3.3 V SD SD1_DATA0 95 96 USB_SS_RX_N USB 1.0 V I B18
B26 I/O 1.8/3.3 V SD SD1_DATA1 97 98 ND round 0 V P –
D26 I/O 1.8/3.3 V SD SD1_DATA2 99 100 PCIE_TX_N PCIe 1.0 V O A9
E25 I/O 1.8/3.3 V SD SD1_DATA3 101 102 PCIE_TX_P PCIe 1.0 V O B10
– P 0 V round ND 103 104 ND round 0 V P –
D24 I 1.8 V SD SD1_WP 105 106 PCIE_RX_N PCIe 1.0 V I B12
A25 I 1.8 V SD SD1_VSELECT 107 108 PCIE_RX_P PCIe 1.0 V I A13
E23 I 1.8 V SD SD1_CD# 109 110 ND round 0 V P –
B24 O 1.8 V PIO PIO4_IO19 111 112 PCIE_REFCLK_N PCIe 1.8 V O D12
– P 0 V round ND 113 114 PCIE_REFCLK_P PCIe 1.8 V O E11
D10 I 3.3 V PCIe PCIE_CLKREQ# 115 116 ND round 0 V P –
H10 O 3.3 V PCIe PCIE_PERST# 117 118 IMX_ONOFF CONFI 1.8 V I AH28
A11 I 3.3 V PCIe PCIE_WAKE# 119 120 ND round 0 V P –

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3.1.3 Connector X2
Table 3: Pinout connector X2
Ball I/O Level roup Signal Pin Signal roup Level I/O Ball
– P 3.3 V Power V_3V3_IN 1 2 V_3V3_IN Power 3.3 V P –
– P 3.3 V Power V_3V3_IN 3 4 V_3V3_IN Power 3.3 V P –
– P 3.3 V Power V_3V3_IN 5 6 V_3V3_IN Power 3.3 V P –
– P 0 V round ND 7 8 ND round 0 V P –
– P 0 V round ND 9 10 ND round 0 V P –
– P 1.8 V Power V_1V8_OUT2 11 12 V_1V8_OUT2 Power 1.8 V P –
AJ31 I 1.8 V CONFI BOOT_MODE0 13 14 ND round 0 V P –
AK32 I 1.8 V CONFI BOOT_MODE1 15 16 MCLK_OUT0 CLK 1.8 V O L29
AL31 I 1.8 V CONFI BOOT_MODE2 17 18 MCLK_IN1 CLK 1.8 V I M28
AJ29 I 1.8 V CONFI BOOT_MODE3 19 20 MCLK_IN0 CLK 1.8 V I 35
– P 1.8 V Power V_1V8_ANA 21 22 ND round 0 V P –
– P 3 V Power LICELL 23 24 PIO3_IO05 PIO 1.8 V I/O AP26
– O 1.8 V CONFI PMIC_FSOB_EWARN 25 26 PIO3_IO06 PIO 1.8 V I/O AM24
AR31 I 1.8 V CONFI PMIC_PWRON 27 28 SCU_UART_RX SCU UART 1.8 V I AF28
– P 0 V round ND 29 30 SCU_UART_TX SCU UART 1.8 V O AH30
AM22 I 1.8 V CSI MIPI_CSI_DN0 31 32 RESET_IN# CONFI 3.0 V I A 31
AP22 I 1.8 V CSI MIPI_CSI_DP0 33 34 RESET_OUT# CONFI 3.0 V O –
– P 0 V round ND 35 36 ND round 0 V P –
AM20 I 1.8 V CSI MIPI_CSI_DN1 37 38 I2C2_SCL I2C 1.8 V I/O AD30
AP20 I 1.8 V CSI MIPI_CSI_DP1 39 40 I2C2_SDA I2C 1.8 V I/O AF34
– P 0 V round ND 41 42 ND round 0 V P –
AN23 I 1.8 V CSI MIPI_CSI_DN2 43 44 SPI3_SCK SPI 1.8 V O H32
AR23 I 1.8 V CSI MIPI_CSI_DP2 45 46 SPI3_SDO SPI 1.8 V O F34
– P 0 V round ND 47 48 SPI3_SDI SPI 1.8 V I 33
AN19 I 1.8 V CSI MIPI_CSI_DN3 49 50 SPI3_CS0# SPI 1.8 V O J31
AR19 I 1.8 V CSI MIPI_CSI_DP3 51 52 SPI3_CS1# SPI 1.8 V O K30
– P 0 V round ND 53 54 PMIC_AMUX_VSD CONFI – O –
AN21 I 1.8 V CSI MIPI_CSI_CLKN 55 56 ND round 0 V P –
AR21 I 1.8 V CSI MIPI_CSI_CLKP 57 58 MIPI_CSI_MCLK CSI 1.8 V O AN25
– P 0 V round ND 59 60 ND round 0 V P –
AN15 O 1.8 V DSI / LVDS MIPI_DSI1_DN0 61 62 MIPI_DSI0_DN0 DSI / LVDS 1.8 V O AJ21
AR15 O 1.8 V DSI / LVDS MIPI_DSI1_DP0 63 64 MIPI_DSI0_DP0 DSI / LVDS 1.8 V O AK22
– P 0 V round ND 65 66 ND round 0 V P –
AN17 O 1.8 V DSI / LVDS MIPI_DSI1_DN1 67 68 MIPI_DSI0_DN1 DSI / LVDS 1.8 V O AJ17
AR17 O 1.8 V DSI / LVDS MIPI_DSI1_DP1 69 70 MIPI_DSI0_DP1 DSI / LVDS 1.8 V O AK18
– P 0 V round ND 71 72 ND round 0 V P –
AM14 O 1.8 V DSI / LVDS MIPI_DSI1_DN2 73 74 MIPI_DSI0_DN2 DSI / LVDS 1.8 V O AJ23
AP14 O 1.8 V DSI / LVDS MIPI_DSI1_DP2 75 76 MIPI_DSI0_DP2 DSI / LVDS 1.8 V O AK24
– P 0 V round ND 77 78 ND round 0 V P –
AM18 O 1.8 V DSI / LVDS MIPI_DSI1_DN3 79 80 MIPI_DSI0_DN3 DSI / LVDS 1.8 V O AJ15
AP18 O 1.8 V DSI / LVDS MIPI_DSI1_DP3 81 82 MIPI_DSI0_DP3 DSI / LVDS 1.8 V O AK16
– P 0 V round ND 83 84 ND round 0 V P –
AM16 O 1.8 V DSI / LVDS MIPI_DSI1_CLKN 85 86 MIPI_DSI0_CLKN DSI / LVDS 1.8 V O AJ19
AP16 O 1.8 V DSI / LVDS MIPI_DSI1_CLKP 87 88 MIPI_DSI0_CLKP DSI / LVDS 1.8 V O AK20
– P 0 V round ND 89 90 ND round 0 V P –
AK26 I/O 1.8 V SCU PIO PIO3_IO00 91 92 PIO3_IO02 SCU PIO 1.8 V I/O AP28
AM26 I/O 1.8 V SCU PIO PIO3_IO01 93 94 PIO3_IO03 SCU PIO 1.8 V I/O AR27
– P 0 V round ND 95 96 ND round 0 V P –
AK10 I 1.8 V QSPI QSPIB_DQS 97 98 SAI1_TXC SAI 1.8 V O Y34
– P 0 V round ND 99 100 SAI1_TXFS SAI 1.8 V O Y32
AR11 O 1.8 V QSPI QSPIB_SCLK 101 102 SAI1_TXD SAI 1.8 V O AA33
– P 0 V round ND 103 104 ND round 0 V P –
AM10 I/O 1.8 V QSPI QSPIB_DATA0 105 106 SAI1_RXC SAI 1.8 V I AA31
AL9 I/O 1.8 V QSPI QSPIB_DATA1 107 108 SAI1_RXFS SAI 1.8 V I AB34
AJ11 I/O 1.8 V QSPI QSPIB_DATA2 109 110 SAI1_RXD SAI 1.8 V I AA35
AM8 I/O 1.8 V QSPI QSPIB_DATA3 111 112 PIO3_IO07 PIO 1.8 V I/O AP24
AH10 O 1.8 V QSPI QSPIB_SS0# 113 114 PIO3_IO08 PIO 1.8 V I/O AR25
AJ9 O 1.8 V QSPI QSPIB_SS1# 115 116 I2C1_SDA I2C 1.8 V I/O AE35
AK12 O 1.8 V QSPI QSPIA_SS1# 117 118 I2C1_SCL I2C 1.8 V I/O AD32
– P 0 V round ND 119 120 ND round 0 V P –
2: Maximum load on pins 11 and 12 is 1 A.

Preliminary User's Manual l TQMa8Xx UM 0002 l © 2018, TQ-Systems mbH Page 9
3.1.4 Connector X3
Table 4: Pinout connector X3
Ball I/O Level roup Signal Pin Signal roup Level I/O Ball
– P 0 V round ND 1 2 ND round 0 V P –
W29 I/O 1.8 V PIO PIO1_IO14 3 4 JTA _TCK JTA 1.8 V I AE31
V34 I/O 1.8 V PIO PIO1_IO13 5 6 JTA _TDI JTA 1.8 V I AH34
– P 0 V round ND 7 8 JTA _TDO JTA 1.8 V O AF32
AE33 I/O 1.8 V PIO PIO1_IO29 9 10 JTA _TMS JTA 1.8 V I A 35
AC29 I/O 1.8 V PIO PIO1_IO30 11 12 JTA _TRST# JTA 1.8 V I AD28
AC31 I/O 1.8 V PIO PIO1_IO25 13 14 ND round 0 V P –
AB28 I/O 1.8 V PIO PIO1_IO26 15 16 CAN0_RX CAN 1.8 V I AB32
– P 0 V round ND 17 18 CAN0_TX CAN 1.8 V O AA29
AK28 O 1.8 V TAMPER TAMPER_OUT0 19 20 CAN1_RX CAN 1.8 V I AD34
AL29 O 1.8 V TAMPER TAMPER_OUT1 21 22 CAN1_TX CAN 1.8 V O AC35
AP30 O 1.8 V TAMPER TAMPER_OUT2 23 24 ND round 0 V P –
AJ27 O 1.8 V TAMPER TAMPER_OUT3 25 26 ADC_IN0 ADC 1.8 V I U35
AN29 O 1.8 V TAMPER TAMPER_OUT4 27 28 ADC_IN1 ADC 1.8 V I U33
AM30 I 1.8 V TAMPER TAMPER_IN0 29 30 ADC_IN2 ADC 1.8 V I V32
AJ25 I 1.8 V TAMPER TAMPER_IN1 31 32 ADC_IN3 ADC 1.8 V I V30
AM28 I 1.8 V TAMPER TAMPER_IN2 33 34 V_ADC_IN ADC 1.8 V I U29
AR29 I 1.8 V TAMPER TAMPER_IN3 35 36 PMIC_I2C_SDA SCU I2C 1.8 V I/O AH32
AL27 I 1.8 V TAMPER TAMPER_IN4 37 38 PMIC_I2C_SCL SCU I2C 1.8 V I/O AJ35
– P 0 V round ND 39 40 ND round 0 V P –

Preliminary User's Manual l TQMa8Xx UM 0002 l © 2018, TQ-Systems mbH Page 10
3.2 System components
3.2.1 i.MX 8X CPU
3.2.1.1 i.MX 8X derivatives
Depending on the TQMa8Xx version, one of the following i.MX 8X derivatives is assembled.
Table 5: i.MX 8X derivatives
TQ-variant CPU derivative Cortex™ A35 clock Cortex™-M4 clock Tj, temp. range
TQMa8XD-xx i.MX 8DualX 1.2 Hz 266 MHz –40 °C to +125 °C
TQMa8XDP-xx i.MX 8DualXPlus 1.2 Hz 266 MHz –40 °C to +125 °C
TQMa8XQP-xx i.MX 8QuadXPlus 1.2 Hz 266 MHz –40 °C to +125 °C
3.2.1.2 i.MX 8X errata
Attention: Malfunction
Please take note of the current i.MX 8X errata (3).
3.2.1.3 Boot modes
After release of PMIC_POR#, the System Controller (SCU) starts from the internal ROM.
Depending on the OTP fuses (eFuse) and the boot mode settings of the system controller, the TQMa8Xx boots from the specified
boot source:
•eMMC
•QSPI-NOR flash
•SD card
More information about boot interfaces and its configuration is to be taken from the i.MX 8X Data Sheet (1) and the i.MX 8X
Reference Manual (2). Alternatively, an image can be loaded into the internal RAM via serial downloader.
In the following chapters, the configurations for the following possible boot devices are described exemplarily:
Table 6: Boot-Mode / BT_FUSE_SEL
BOOT_MODE[3:0] Boot source
0000 Boot from eFuse
0001 Serial Downloader (USB)
0010 Boot from eMMC
0011 Boot from SD card
010x Boot from NAND
011x Boot from QSPI
Note: Field software updates
When designing a carrier board, it is recommended to have a redundant update concept for field
software updates.

Preliminary User's Manual l TQMa8Xx UM 0002 l © 2018, TQ-Systems mbH Page 11
3.2.2 Memory
3.2.2.1 DDR3L SDRAM
Depending on the ECC option, the TQMa8Xx can be equipped with two or three DDR3L memory chips with an effective memory
width of 32 bits. The third DDR3L memory chip for the ECC option uses 8 bits.
The interface timing complies with JEDEC standard DDR3-1866 with a maximum clock rate of 933 MHz.
Illustration 3: Block diagram DDR3L interface
3.2.2.2 eMMC NAND flash
An eMMC is available on the TQMa8Xx as non-volatile memory for programs and data (e.g. bootloader, operating system,
application).
The following illustration shows the interface of the eMMC to the i.MX 8X:
Illustration 4: Block diagram eMMC interface
The i.MX 8X supports MMC card transmission modes up to the current eMMC standard v5.1 or SD card standard 3.0.
The I/O voltage is 1.8 V to support the maximum clock rate of 200 MHz. This allows a data rate of up to 400 Mbyte/s in DDR mode
(HS400). The eMMC can be used as boot medium. The boot configuration is described in 3.2.1.3.

Preliminary User's Manual l TQMa8Xx UM 0002 l © 2018, TQ-Systems mbH Page 12
3.2.2.3 QSPI NOR flash
The i.MX 8X provides two QSPI interfaces, which can be combined to an Octal-SPI or Twin-Quad-SPI on the TQMa8Xx.
NOR flashes using one or both QSPI interfaces are used on the TQMa8Xx.
The second QSPI interface may be available on the module connector.
i.MX8X
QSPIA_DATA[3:0]
SPINOR
Octal/TwinQuad
QSPINOR
D[3:0]
D[ :4]
Connector
QSPIA_DQS DQS
QSPIA_SS[1:0]_B
C1
QSPIA_SCLK
QSPIB_DATA[3:0]
QSPIB_SS[1:0]_B
QSPIB_SCLK
S1#
S2#
C2
QSPIA_SS1#
QSPIB_SCLK
QSPIB_DQS
QSPIB_DATA[3:0]
QSPIB_SS[1:0]#
QSPIB_DQS
Illustration 5: Block diagram QSPI interface
3.2.2.4 EEPROM
A serial EEPROM, controlled by the I2C1 bus, is assembled. Write-Protect (WP#) is not supported.
To store data “read-only”, the EEPROM with temperature sensor must be used, see 3.2.2.5.
Illustration 6: Block diagram EEPROM interface
The following table shows details of the EEPROM.
Table 7: EEPROM
Manufacturer Part number Size Temperature range
Microchip 24LC64T-I/MC MCH 64 Kbit –45 °C to +85 °C
The EEPROM has I2C address 0x57 / 101 0111b

Preliminary User's Manual l TQMa8Xx UM 0002 l © 2018, TQ-Systems mbH Page 13
3.2.2.5 EEPROM with temperature sensor
A serial EEPROM including temperature sensor, controlled by the I2C1 bus, is assembled.
The lower 128 bytes (addresses 00h to 7Fh) can be set to Permanent Write Protected (PWP) mode or Reversible Write Protected
(RWP) mode by software. The upper 128 bytes (addresses 80h to FFh) cannot be write-protected and can be used for general
data storage. The EEPROM also provides a temperature sensor to monitor the temperature of the TQMa8Xx.
The following table shows details of the Manufacturer EEPROM.
Table 8: Manufacturer EEPROM
Manufacturer Part number Size Temperature range
NXP SE97BTP 2 × 128 bytes –45 °C to +85 °C
The device has the following I2C addresses:
oEEPROM (normal): 0x51 / 101 0001b
oEEPROM (Protection mode): 0x31 / 011 0001b
oTemperature sensor: 0x19 / 001 1001b
The following illustration shows the interface of the temperature sensor to the i.MX 8X.
Illustration 7: Block diagram temperature sensor interface
The EEPROM with temperature sensor (D7) is assembled on the bottom side of the TQMa8Xx, see Illustration 15.
The overtemperature output of the sensor is connected as open drain to connector X1-4 (TEMP_EVENT#).
A pull-up to a maximum voltage of 3.6 V must be provided on the carrier board.
The following table shows details of the temperature sensor.
Table 9: Temperature sensor SE97BTP
Manufacturer Part number Resolution Accuracy Temperature range
NXP SE97BTP 11 bits Max. ±3 °C –40 °C to +125 °C
3.2.3 RTC
In addition to the i.MX 8X-internal RTC, the TQMa8Xx provides a discrete RTC DS1339U as assembly option.
The accuracy of the RTC is essentially determined by the characteristics of the quartz used.
The quartzes used on the TQMa8Xx have a standard frequency tolerance of ±20 ppm at +25 °C.
The RTC is connected to the I2C1 bus.
The RTC has I2C address 0x68 / 110 1000b
Note: Power supply for i.MX 8X-internal RTC
The i.MX 8X-internal RTC can always be used in ON mode, but resets itself when the module supply
is switched off, since the SNVS domain of the i.MX 8X is then no longer supplied.

Preliminary User's Manual l TQMa8Xx UM 0002 l © 2018, TQ-Systems mbH Page 14
3.2.4 Interfaces
(TBD)
3.2.5 Reset
Reset inputs and outputs are available on the TQMa8Xx connectors.
The following table describes the reset and config signals available on the TQMa8Xx connector.
Table 10: Reset and config signals
Signal Dir. Power domain Function TQMa8Xx Remark
RESET_IN# I VDD_ANA1_1P8 i.MX 8X reset input X2-32 Low Active signal
Deactivate: float or connect to 1.8 V / 3.3 V
RESET_OUT# O External defined Open-Drain output X2-34 Low Active signal
Requires Pull-Up on carrier board (to max. 6.5 V)
IMX_ONOFF I V_SNVS_CAP ON / OFF signal of i.MX 8X X1-118 Low Active signal
Deactivate: float
Illustration 8: Block diagram Reset

Preliminary User's Manual l TQMa8Xx UM 0002 l © 2018, TQ-Systems mbH Page 15
3.2.6 Power
3.2.6.1 Power supply
The TQMa8Xx only requires a single power supply of 3.3 V ±5 %.
The following illustration shows the structure of the TQMa8Xx supply:
Connector
VCC2
VCC1
VCCn
3.3 V
i.MX8X
PMIC
PF8100/
PF8200
Module
components
Illustration 9: Block diagram power supply
3.2.6.2 Power consumption
The power consumption of the TQMa8Xx strongly depends on the application, the mode of operation and the operating system.
For this reason the given values have to be seen as approximate values.
The following table shows power supply and power consumption parameters of the TQMa8Xx:
Table 11: TQMa8Xx power consumption @ 3.3 V
Mode of operation TQMa8XD TQMa8XDP TQMa8XQP Remark
Theoretical calculated peak 1440 mA 4752 mW 1440 mA 4752 mW 1440 mA 4752 mW –
U-Boot prompt 115 mA 380 mW 115 mA 380 mW 130 mA 429 mW –
Linux prompt 95 mA 314 mW 95 mA 314 mW 100 mA 330 mW –
Linux 100 % CPU load 200 mA 660 mW 200 mA 660 mW 220 mA 726 mW –
Reset 26 mA 86 mW 26 mA 86 mW 21 mA 69 mW RESET_IN# = low
Off-Mode 6 mA 20 mW 6 mA 20 mW 6 mA 20 mW PMIC_PWRON = low
3.2.6.3 LICELL
Coin cells can be connected to the LICELL input of the TQMa8Xx connector (X2-23).
Depending on the TQMa8Xx variant, the SNVS domain of the i.MX 8X or the external RTC DS1339U is thus supplied.
The following table shows details of the power consumption at the LICELL pin.
Table 12: TQMa8Xx LICELL
Current consumption Function
Typical 7 µA, max. 10 µA LICELL supplies the i.MX 8X SNVS-Domain via the PMIC‘s VSNVS regulator.
Typical 0.4 µA, max. 7 µA LICELL supplies the DS1339U RTC on the TQMa8Xx.
The i.MX 8X SNVS domain is only supplied when the TQMa8Xx supply of 3.3 V is present.
Note: Functional scope of RTC
Depending on the TQMa8Xx variant, the range of functions is reduced in battery mode
(only LICELL supplied), since no SNVS function of the i.MX 8X is available when using the DS1339U.

Preliminary User's Manual l TQMa8Xx UM 0002 l © 2018, TQ-Systems mbH Page 16
3.2.6.4 ADC input voltage V_ADC_IN
The voltage input V_ADC_IN at TQMa8Xx connector X3-34 serves as voltage reference for the ADC of the i.MX 8X.
This voltage is filtered and connected to pin V_ADC_VREFH of the i.MX 8X.
V_ADC_IN must typically be supplied with 1.8 V in order to use the ADC function of the i.MX 8X.
Depending on the accuracy requirements, V_1V8_OUT can be used for this.
Further information about the ADC can be found in the data sheet of the i.MX 8X (1).
3.2.6.5 USB_OT [2:1]_VBUS
The voltage inputs USB_OT 1_VBUS and USB_OT 2_VBUS are used to detect the voltage USB-VBUS.
They are usually connected to the VBUS voltage switched by the USB host.
Due to the different implementations of the OT PHYs in the i.MX 8X, different voltages must be used for this.
Table 13: USB_OT [2:1]_VBUS
Signal TQMa8Xx Voltage Usage
USB_OT 1_VBUS X1-73 5 V Input for VBUS comparator OT 1
USB_OT 2_VBUS X1-74 3.3 V Input for VBUS comparator OT 2
3.2.6.6 Provided TQMa8Xx voltages
In addition to the TQMa8Xx supply input, some TQMa8Xx-internal voltages are available on the TQMa8Xx connectors.
The following table shows these voltages:
Table 14: Provided TQMa8Xx voltages
Voltage TQMa8Xx Max. current Usage
V_1V8 X2-11, X2-12 1 A Internal supply for periphery and I/O, should be used on carrier board
V_1V8_ANA X2-21 25 mA Pull-Up voltage for pins BOOT_MODE[3:0]
Voltage V_1V8 has to be used to switch the supply on the carrier board.
Note: Voltages V_1V8 and V_1V8_ANA
Up to 1 A can be drawn from V_1V8, which increases the PMIC's power consumption and thus the
TQMa8Xx’s self-heating.
The BOOT_MODE pins should be pulled-up to V_1V8_ANA, or a voltage switched by V_1V8_ANA.
This ensures that the boot mode pins are read-in correctly and that no cross-supply occurs.
The voltages mentioned are outputs and must not be supplied externally under any circumstances.
3.2.6.7 Voltage monitoring
The 3.3 V input voltage is monitored on the TQMa8Xx.
If the input voltage is too low, a reset is triggered until the input voltage is within the defined range again.
Attention: Malfunction or destruction
The voltage monitoring does not detect an exceedance of the maximum permitted input voltage.
An excessively high supply voltage can lead to malfunctions, untimely aging or destruction of the
TQMa8Xx.