VINKA VK16K33 User manual

February 2020Rev. 1.21/27
Features
•Operating voltage 3.0-5.5V
•Built-in RC oscillator
•Max. 16 SEG and 8 GRID(Number of SEG pins in different packages)
•SEG pins connect to LED Anode , GRID pins connect to LED Cathode
•I2C bus interface,I2C slave address can be configured through IO pins
•16-level brightness control
•Max. 13 × 3 key scan
Key display multiplexing requires hardware circuit
Supporting combination keys requires circuit
•Read/Write address auto increment
•Dispaly mode 16x8
•Power-On Reset(POR)
•Versatile blinking modes
•Standby mode
•High driving current, suitable for highlighted applications
•Package:
SOP28(300mil)(18.00mm×7.50mm PP=1.27mm）
SOP24(300mil)(15.40mm×7.50mm PP=1.27mm）
SOP20(300mil)(12.80mm×7.50mm PP=1.27mm)
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VK16K33
16×8 LED DRIVER

The VK16K33 is a memory mapping and multi-function LED controller driver. The max. Display
segment numbers in the device is 128 patterns (16 SEG x 8 GRID) with a 13×3 (MAX.) matrix key scan
circuit. The software configuration features of the VK16K33 makes it suitable for multiple LED
applications including LED modules and display subsystems. The device communicates with host
microcontrollers via a two-line bidirectional I2C bus,it is used to configure display parameters and transfer
display data, and can also enter the standby mode through System Set Command .
SOP20/SOP24/SOP28 package.
February 2020Rev. 1.22/27
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1 General Description
VK16K33
16×8 LED DRIVER

February 2020Rev. 1.23/27
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2 Pinouts and pin description
2.1 VK16K33 SOP20 Pin Assignment
1
2
3
4
5
6
7
8
9
10 11
12
13
14
15
16
VDD
17
18
19
20
SDA
SCL
SEG0/K1
SEG1/K2
SEG2/K3
SEG3/K4
SEG4/K5
SEG5/K6
SEG6/K7
VSS
GRID0
GRID1/KS0
GRID2/KS1
GRID3/KS2
GRID4
GRID5
GRID6
GRID7
SEG7/K8/INT
TOP VIEW
SOP20
VK16K33
16×8 LED DRIVER

2.2 VK16K33 SOP20 Pin Description
February 2020Rev. 1.24/27
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OLED GRID outputs（N-MOS open drain ）
VSS
11-17 I/O
SEG6/K7-
SEG0/K1
18 I
SCL
LED GRID outputs（N-MOS open drain ）;
Key source output pin, active high during key scan operation
GRID1/KS0-
GRID3/KS2
6~9 OLED GRID outputs（N-MOS open drain ）
LED SEG outputs（P-MOS open drain ）；
Key data input pin, internal pull-low during key scan operation
Serial Clock Input for I2C interface
2GRID0
Negative power supply
3-5
1VSS
O
I/O
SDA
20 VDD VDD
Serial Data Input/Output for I2C interface
Positive power supply
19
GRID4 ~GRID7
10 SEG7/K8/INT I/O
I. when bit0 of SEG / INT register is set to“ 0”,this pin is LED SEG output（P-
MOS open drain ）and Key data input during key scan operation.
II. when bit0 of SEG / INT register is set to“ 1”,this pin is Interrupt signal (INT)
output pin
bit1 of SEG/INT register is set to“ 0”,INT pin output active-low
bit1 of SEG/INT register is set to“ 1”,INT pin output active-high
VK16K33
16×8 LED DRIVER
No. I/O
Name Function

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2.3 VK16K33 SOP24 Pin Assignment
VDD
SDA
SCL
SEG0/A1
SEG1/A0
SEG2/K1
SEG3/K2
SEG4/K3
SEG5/K4
SEG6/K5
SEG7/K6
SEG8/K7
VSS
GRID0/AD
GRID1/KS0
GRID2/KS1
GRID3/KS2
GRID4
GRID5
GRID6
GRID7
SEG11/K10/INT
SEG10/K9
SEG9/K8
1
2
3
4
5
6
7
8
9
10
11
12 13
14
SOP24
TOP VIEW
24
23
22
21
20
19
18
17
16
15
VK16K33
16×8 LED DRIVER

2.4 VK16K33 SOP24 Pin Description
February 2020Rev. 1.26/27
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O
VSS
11-19 I/O
SEG10/K9-
SEG2/K1
22 O
SCL
GRID1/KS0-
GRID3/KS2
6~9 OLED GRID outputs（N-MOS open drain ）
Serial Clock Input for I2C interface
2GRID0/AD
Negative power supply
3-5
1VSS
O
I/O
SDA
24 VDD VDD
Serial Data Input/Output for I2C interface
Positive power supply
23
GRID4 ~GRID7
10 SEG11/K10
/INT I/O
20-21 SEG1/A0-
SEG0/A1 I/O LED SEG outputs（P-MOS open drain ）
I2C slave address setting pin, 4 address 0xe0-0xe3 can be set,
and bit0 is the read / write bit. *1
LED GRID outputs（N-MOS open drain ）;
Key source output pin, active high during key scan operation
LED SEG outputs（P-MOS open drain ）；
Key data input pin, internal pull-low during key scan operation
LED GRID outputs（N-MOS open drain ）
I2C slave address source output pin, active high during power on and key scan *1
*1 I2C slave address is selected through A2-A0 pins, and I2C slave address is updated during power on reset
or key scanning cycle
VK16K33
16×8 LED DRIVER
No. I/O
Name Function
I. when bit0 of SEG / INT register is set to“ 0”,this pin is LED SEG output（P-
MOS open drain ）and Key data input during key scan operation.
II. when bit0 of SEG / INT register is set to“ 1”,this pin is Interrupt signal (INT)
output pin
bit1 of SEG/INT register is set to“ 0”,INT pin output active-low
bit1 of SEG/INT register is set to“ 1”,INT pin output active-high

February 2020Rev. 1.27/27
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2.5 VK16K33 SOP28 Pin Assignment
VSS
GRID0/AD
GRID1/KS0
GRID2/KS1
GRID3/KS2
GRID4
GRID5
GRID6
GRID7
SEG15/K13/INT
SEG14/K12
SEG13/K11
SEG12/K10
SEG11/K9
VDD
SDA
SCL
SEG0/A2
SEG1/A1
SEG2/A0
SEG3/K1
SEG4/K2
SEG5/K3
SEG6/K4
SEG7/K5
SEG8/K6
SEG9/K7
SEG10/K8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SOP28
TOP VIEW
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VK16K33
16×8 LED DRIVER

2.6 VK16K33 SOP28 Pin Description
February 2020Rev. 1.28/27
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O
VSS
11-21 I/O
SEG14/K12-
SEG3/K1
26I
SCL
GRID1/KS0-
GRID3/KS2
6~9 OLED GRID outputs（N-MOS open drain ）
Serial Clock Input for I2C interface
2GRID0/AD
Negative power supply
3-5
1VSS
O
I/O
SDA
28VDD VDD
Serial Data Input/Output for I2C interface
Positive power supply
27
GRID4 ~GRID7
10 SEG15/K13
/INT
I/O
23-25I/O
SEG2/A0-
SEG0/A2
LED GRID outputs（N-MOS open drain ）；
Key source output pin, active high during key scan operation
LED SEG outputs（P-MOS open drain ）；
Key data input pin, internal pull-low during key scan operation
LED GRID outputs（N-MOS open drain ）
I2C slave address source output pin, active high during power on and key scan*1
LED SEG outputs（P-MOS open drain ）
I2C slave address setting pin, 8 address 0xe0-0xee can be set,
and bit0 is the read / write bit. *1
VK16K33
16×8 LED DRIVER
No. I/O
Name Function
*1 I2C slave address is selected through A2-A0 pins, and I2C slave address is updated during power on reset
or key scanning cycle
I. when bit0 of SEG / INT register is set to“ 0”,this pin is LED SEG output（P-
MOS open drain ）and Key data input during key scan operation.
II. when bit0 of SEG / INT register is set to“ 1”,this pin is Interrupt signal (INT)
output pin
bit1 of SEG/INT register is set to“ 0”,INT pin output active-low
bit1 of SEG/INT register is set to“ 1”,INT pin output active-high

February 2020Rev. 1.29/27
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SCL
SDA
VDD
VSS
LCD driver/
dispaly RAM
GRID7
GRID4
SEG0/A2
SEG15/K13/INT
3 Functional Description
3.1 Block diagram
16-level brightness control
GRID1/KS0
GRID0/AD
GRID3/KS2
SEG2/A0
SEG3/K1
key Scan/
I2C address set/
INT
Key RAM
VK16K33
16×8 LED DRIVER
I2C
Controller
and
Timing
generator

February 2020Rev. 1.210/27
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3.2 Power-On Reset
●System Oscillator is off state
●GRID0~GRID3 outputs are set to VDD.
● GRID4~GRID7 outputs are set to high impedance.
●all SEG pins are set to input.
● LED Display Off.
●Key scan stopped.
● SEG/INT pin is set to SEG.
●brightness is set to 16/16 duty。
VDD
tSR>0.05V/ms
tOFF>20mS
VK16K33
16×8 LED DRIVER
When the power is applied, the device is initialized by an internal power-on reset circuit. Data transfers
on the I2C bus should be avoided for 1 ms following power-on.
The status of the internal circuits after initialization is as follows:
if VDD drops below the minimum voltage of operating voltage specification during operation, the
power-on reset timing conditions must be also satisfied. This means that VDD must fall to 0V and remain
at 0V for a minimum time of 20ms before rising to the normal operating voltage.
Power-on Reset Timing

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3.3 Standby Mode & Wake-up
Standby Mode
In the standby mode, the VK16K33 can not accept input commands nor write data to the display RAM except
using the system setup command.
If the standby mode is selected with the bit0 of the System Set Command set to “0”, the status of the standby
model is as follows:
●System Oscillator is off state
●GRID0~GRID3 outputs are set to VDD.
●GRID4~GRID7 outputs are set to high impedance.
●all SEG pins are set to input.
●LED Display Off.
●Key scan stopped.
●All key data and INT flags are cleared until the standby mode is canceled.
●If any key is pressed or the bit0 of the System Set Command is set to “1”, the standby mode will be canceled
and will cause the device to wake-up.
●If the bit0 of the SEG/INT register is set to “0”, all SEG pins are changed to input pins.
●If the bit0 of the SEG/INT register is set to “1”: all SEG pins are changed to input pins except for the INT pin
(output).
●The INT pin output remain at a high level when the bit 1of the SEG/INT register is set to “0”.
●The INT pin output remain at a low level when the bit1 of the SEG/INT register is set to “1”.
Wake-up
●Wake-up by any key or by set the bit0 of the System Set Command to “1”. A key scan will then be performed.
●The System Oscillator restarts for normal operation.
●The previous display data output will be updated by Each Mode command set.
The relationship between the Wake-up and any key press is shown as follows:
Wake-up
Standby mode command
set from MCU
Read key data command
set from MCU
INT flag or INT pin output
Any key
Press
Release key
2 frame cycle
Normal active status
VK16K33 operation status
Standby status
Press
2 frame cycle
< 2 frame cycle
Release key
Normal active status
Press Release
(When the act bit is set to “1”)
1. Key data are updated
2. Slave address are updated
1. Key data are updated
2. Slave address are updated
When after the key data has been
read,Clears the key data RAM. When after the key data has been
read,Clears the key data RAM.
VK16K33
16×8 LED DRIVER

February 2020Rev. 1.212/27
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3.4 Display RAM
GRID0
GRID1
GRID2
GRID3
┊
GRID7
D7 D6 D5 D4 D3 D2 D1 D0
SEG15
SEG14 SEG13 SEG12 SEG11 SEG10 SEG9 SEG8
Addr
0x01
0x03
0x05
0x07
0x0F
D7 D6 D5 D4 D3 D2 D1 D0
Addr
0x00
0x02
0x04
0x06
0x0E
GRID0
GRID1
GRID2
GRID3
┊
GRID7
SEG7 SEG6 SEG5 SEG4 SEG3 SEG2 SEG1
SEG0
GRID
SEG
┊ ┊
┊ ┊
VK16K33
16×8 LED DRIVER
The static display memory (RAM) is organized into 16×8 bits and stores the displayed data.The
contents of the RAM are directly mapped to the contents of the LCD driver. Display address is 0x00-0x0F,the
RAM size is 16 bytes.If you want to lighted on or off an LED, only set or clear the corresponding display RAM
bit to 1 or 0,For example, if LED1 driven by SEG0 pin and GRID1 pin is on or off, only set bit0 to 1 or 0 of the
corresponding display RAM (0x00).The ram bit corresponding to the unused SEG pin is cleared to 0.
The following is a mapping from the RAM to the LED pattern:
GRID
SEG
Note：
At the initial system power on, the value stored in the chip display RAM may be random. It is recommended to
clear the display RAM after power on, write 0x00 to the all display RAM ( 0x00-0x0f).
SEG pins connect to LED Anode, GRID pins connect to LED Cathode, Reverse connection is not allowed.
3.5 Keyscan
3.5.1 Key data reading
K10 K9 K1
K2K3K4K5K6K7K8
GRID0/KS0
GRID1/KS1
K13 K12 K11
GRID2/KS2
The key scanning is automatically completed by the hardware, only needs to read the key value through
I2C. When a key is pressed, INT interrupt is generated. This interrupt flag can be read through I2C or output
throughINT pin (open drain output).The keyscan cycle loops continuously over time, with all 39 keys(13x3)
experiencing a full keyscanning debounce over 20ms.A key press is debounced and an interrupt issued if at
least one key that was not pressed in a previous cycle is found to be pressed during both sampling periods.The
keyscan circuit detects any combination of keys pressed during each debounce cycle (n-key rollover).
When after all the key data has been read that clears the key data RAM and the int flag bit is set to “0”, If
the SEG / intINT pin is set to INT output, the INT pin returns to the level when no key is pressed.

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3.5.2 Keyscan Timing
KS0
KS1
KS2
key input
GRID1/KS0
GRID2/KS1
GRID3/KS2
SEG0~15
1 Cycle
Key scan periodDisplay period
1 Frame
...
I2C address are updated I2C address are updated I2C address are updated
AD
KS0
KS1
key input
2 Cycle
Key scan periodDisplay period
1 Frame
AD
KS0
KS1
KS2
key input
3 Cycle
Key scan periodDisplay period
1 Frame
I2C address are updated
AD
...
...
...
...
KS0
KS1
KS2
key input
n Cycle
Key scan periodDisplay period
1 Frame
AD
GRID0/AD
KS2
keyscan timing as shown:
Note： The Slave addresses are updated on the keyscan timing
Input mode
The following shows the mapping from the RAM to the key data output:
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
KS0/K4 KS0/K3 KS0/K2 KS0/K1
key
RAM
addr
key data
KS0/K5
040
04
04
04
044
043
KS0/K6 KS0/K7 KS0/K8
KS0/K12 KS0/K11 KS0/K10 KS0/K9
KS0/K13
0 0 0
KS1/K4 KS1/K3 KS1/K2 KS1/K1
KS1/K5
KS1/K6 KS1/K7 KS1/K8
KS1/K12 KS1/K11 KS1/K10 KS1/K9
KS1/K13
0 0 0
KS2/K4 KS2K3 KS2/K2 KS2/K1
KS2/K5
KS2/K6 KS2/K7 KS2/K8
KS2/K12 KS2/K11 KS2/K10 KS2/K9
KS2/K13
0 0 0
Note：It is recommended that the key data RAM is read only and should be started form address 0x40 only, the
key data RAM of address 0X40~0X45 should be read continuously and in one operation.
VK16K33
16×8 LED DRIVER
INT flag Register：
bit7-bit0 set 1when
key press,when all
key read clear 0.
key press flag
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
INT
Register
address
INTflag Function
0x60 INT
flag
INT
flag
INT
flag
INT
flag
INT
flag
INT
flag
INT
flag
INT
flag

February 2020Rev. 1.214/27
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3.5.3 Key Combination
When pressing three or more times is assumed,each combination key is required to connect diodes
in series,shown as below :
KS0
KS1
KS2 =
K1 K2 K3 K4 K5 K6 K7 K8 K9 K10 K11 K12 K13
KS0
KS1
KS2
K1 K2 K3 K4 K5 K6 K7 K8 K9 K10 K11 K12 K13
=
Note：In this circuit, pressing three or more times may cause the OFF switches to be determined as
being ON.
VK16K33
16×8 LED DRIVER
When pressing twice is assumed,KS0-KS2 is required to connect diodes in series,shown as below:

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SEG2/A0
SEG1/A1
SEG0/A2
A0
A1
A2
GRID0/AD
39KΩ*3
VK16K33
Slave Address
（ 0xE0-0xEE）bit0-R/W
Slave Address
11 1 0A2 A1 A0
/R/W
MSB LSB
3.6.. I2C Address set
Note：24 pin package A2=0, 20 pin package A2=0, A1=0.
I2C slave address is selected through A2-A0 pins, and I2C slave address is updated during power
on reset or key scanning cycle,shown as below :
Note：A2-A0 float is 0，connect is 1，when all float the device address is 0xE0
The device supports I2C serial interface.
The two lines are a serial data line, SDA, and a serial clock line, SCL. Both lines are connected to the
positive supply via pull-up resistors with a typical value of 4.7k. When the bus is free, both lines are high.
3.6 Communication Command
3.6.1 I2C Serial Interface
PS
SDA
SCL
SDA
SCL
START STOP
START and STOP
Acknowledge
S1 2 7 8 9
data send
data receive
SCL
Ack
no Ack
START
3-6
Byte Format
SP
SDA
SCL 1 2 7 8 9
ACK
1 2 3-8 9
ACK
3-6
the 9th clk is a acknowledge bit
VK16K33
16×8 LED DRIVER
February 2020Rev. 1.2

3.6.3 I2C Command Format
3.6.3.1 Write Operation
Write Command
Display RAM Single Data Byte
Display RAM Page Write Operation
Slave Addr
Write
Cmd byte
ACK
S P
Write
ACK
S0A2 0
Data byte
ACK
P
D7 D6 D5 D4 D3 D2 D1 D0
Slave Addr
ACK
Write
ACK
S
ACK
Data byte
P
Nth
data
Data byte
2nd
data ACK
Data byte
D7 D6 D5 D4 D3 D2 D1 D0
1st
data ACK
RAM Addr byte
ACK
......
......
ACK
ACK
Slave Addr RAM Addr byte
0111 A2 A1 A0 0
1 1 1 A1A0
D0D7 D6 D5 D4 D3 D2 D1
C0C7 C6 C5 C4 C3 C2 C1
0A2 0
111 A1 A0 C0C1C2C3C4C5C7 C6
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
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3.6.2.2 Read Operation
Reading a data byte is not applicable to reading the key value.
Write
ACK
S0A2 0
Data byte
NACK
P
D7 D6 D5 D4 D3 D2 D1 D0
ACK
Write
ACK
S
NACK
Data byte
P
Nth
data
Data byte
2nd
data ACK
Data byte
D7D6D5D4D3D2D1D0
1st
data ACK ACK
......
......
ACK
Slave Addr Cmd /Reg Addr byte
1 1 1 A1A0 C1
C7 C6 C5 C4 C3 C2 C2
0A2 0
111 A1 A0 C0C1C2C3C4C5C6
D7D6D5D4D3D2D1D0 D7D6D5D4D3D2D1D0
Read
S0A2
Slave Addr
1 1 1 A1A0
P
ACK
1
Slave Addr Cmd/Reg Addr byte Slave Addr
Read
S0A2
111 A1 A0 1
ACK
P
C7
VK16K33
16×8 LED DRIVER
Read n bytes data. The address pointer will auto-increase after received ACK. When reading the key,
read 6 data continuously from start address 0x40.

February 2020Rev. 1.217/27
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3.6.6 Command Summary
3.6.4 .1 System Set Command
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
1 0 0 blink off
1 0 1 2Hz
1 0 0 1Hz
1 0 1 0.5Hz
3.6.4.3 SEG/INT pin Set Command
Function Note
0
0
0
0
0
0
0
0
0
0
1
1
X
Blink
Frequency
1 0 Off
1 0 On
0
0
0
0 X Display
On/Off
1
0
Def
0x80
0x80
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0
1 0
0
INT pin,active high.
0
Function Note
1 0
X
1 0 SEG pin
1 0 INT pin,active low.
1
1
0
0 X
INT/SEG pin
function select
and INT pin
out level
1
0
Def
0xA0
1 1
This command is used to set the LED Display on/off and Blink Frequency.
3.6.4.2 Display Set Command
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 Function Note
X
0 0 Standby mode(OSC off)
0 0 Normal mode(OSC on)
1
1
0
0 X system oscillator
ON/OFF
1
0
Def
0x20
X
This command is used to set the work mode: Normal mode or Standby mode.
This command is used to set the INT / SEG pin output function.
VK16K33
16×8 LED DRIVER

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Set the address of the Display RAM (0x00 - 0x0f). When powered on, the address is set to 0x00(default).
3.6.4.3 Display Address Set Command
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 DisplayRAM Addr
0 0 0 0 0 0 0x00
0 0 0 0 0 1 0x01
0 0 0 0 1 0 0x02
0 0 0 0 1 1 0x03
0 0 0 1 0 0 0x04
0 0 0 1 0 1 0x05
0 0 0 1 1 0 0x06
0 0 0 1 1 1 0x07
0 0 1 0 0 0 0x08
0 0 1 0 0 1 0x09
0 0 1 0 1 0 0x0A
0 0 1 0 1 1 0x0B
0 0 1 1 0 0 0x0C
0 0 1 1 0 1 0x0D
3.6.4.5 Display brightness Set Command
Set the Display brightness (level 16).
bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 Function Note
1 1 0 0 0 1/16 duty
1 1 0 0 1 2/16 duty
1 1 0 1 0 3/16 duty
1 1 0 1 1 4/16 duty
1 1 1 0 0 5/16 duty
1 1 1 0 1 6/16 duty
1 1 1 1 0 7/16 duty
1 1 1 1 1 8/16 duty
1 1 1
1 1 1
9/16 duty
10/16 duty
1 1 0 1 0 11/16 duty
1 1 0 1 1 12/16 duty
1 1 1
1 1 1
13/16 duty
14/16 duty
1 1 1
1 1 1
15/16 duty
16/16 duty
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0 0 0
0 0 1
1 0 0
1 0 1
1 1 0
1 1 1
0 0 1 1 0 1 0x0E
0 0 1 1 1 1 0x0F
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
VK16K33
16×8 LED DRIVER
Set GRID
Pulse Width

3.7.1 Initialize configuration
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VK16K33
16×8 LED DRIVER
3.7 Command application
During power on, the power on reset sequence shall be met. After power on, the parameters
shall be configured first.
Config parameters through a series of commands. The command sequence is as follows:
Power On
END
SEG/INT pin Set Command=0XA0
bit1:0=00 SEG pin
Display brightness Set Command=0XEF
bit1:0=1111 GRID duty 16/16
System Set Command=0X21
bit0=1 system oscillator On
enter nomal mode
Display Set Command = 0X21
bit0=1 Display On
bit2:1=00 Blink Off
Start
Next processing
Display data RAM write
Display Address SetCommand
Address setting 0X00
Display Set Command = 0X21
bit0=1 Display On
(Initialization is configured and
can be ignored)
3.7.2 Display data Read Command

February 2020Rev. 1.220/27
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VK16K33
16×8 LED DRIVER
3.7.3 Key Read Command
no
yes
Start
INT flag Register
bit =1 ?
Read all Key data
Next
processing
SEG/INT pin Set Command
bit0=1?
yes no
Clear int flag
and the key data RAM
no
yes
INT pin=1 ?
no
yes
INT pin =0 ?
SEG/INT pin Set Command
bit1=“0”=?
yes
no
no
It is recommended that the key data RAM is read only and should be started form address
0X40 only, the key data RAM of address 0X40~0X45 should be read continuously and in one
operation.