Xilinx Spartan-3A DSP FPGA Series User manual

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Spartan-3A/3AN
FPGA Starter Kit
Board User Guide
UG334 (v1.1) June 19, 2008

Spartan-3A/3AN FPGA Starter Kit Board User Guidewww.xilinx.com UG334 (v1.1) June 19, 2008
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Revision History
The following table shows the revision history for this document.
Date Version Revision
05/28/07 1.0 Initial Xilinx release.
06/19/08 1.1 Added note that PS/2 port I/Os should always be set to LVCMOS33 with the PULLUP
attribute set true when used. Updated UCF examples to match reference
designs. Added recommendation for 1 MHz BPI configuration. Updated links.
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Preface: About This Guide
Acknowledgments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Guide Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Additional Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Chapter 1: Introduction and Overview
Getting Started. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Operating the Default Demonstration Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
VGA Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Rotary Knob/Push-Button Menu System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Select MultiBoot Configuration Image . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Scroll or Rotate Graphic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Scroll or Scale Graphic. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Restart AutoPilot, Speaker Volume Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
LCD Screen Control Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Power-Saving Suspend Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
RS-232 Serial Port Control Option . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Key Components and Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Design Trade-Offs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Configuration Methods Galore! . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Voltages for all Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Spartan-3A/3AN FPGA Starter Kit Design Examples . . . . . . . . . . . . . . . . . . . . . . . . . 21
Choose a Spartan-3 Generation Starter Kit Board for your Needs. . . . . . . . . . . . . 22
Spartan-3A/3AN FPGA Features and Embedded Processing Functions . . . . . . . . . . 22
Other Spartan-3 Generation Development Boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Spartan-3A and Spartan-3AN FPGAs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Chapter 2: Switches, Buttons, and Rotary Knob
Slide Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Locations and Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SUSPEND Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Push-Button Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Locations and Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
PROG_B Push-Button Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Rotary Push-Button Switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Locations and Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Push-Button Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table of Contents

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Rotary Shaft Encoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Discrete LEDs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Locations and Labels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Optional Discrete LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
AWAKE LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
INIT_B LED. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Chapter 3: Clock Sources
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Clock Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
50 MHz On-Board Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Auxiliary Clock Oscillator Socket . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
SMA Clock Input or Output Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
UCF Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Clock Period Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Chapter 4: FPGA Configuration Options
Configuration Mode Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Xilinx Platform Flash Configuration PROM(s) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
PROG Push-Button Switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
DONE Pin LED . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Programming the FPGA or Platform Flash PROM via USB . . . . . . . . . . . . . . . . . . . 41
Connecting the USB Cable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Platform Flash Programming Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Chapter 5: Character LCD Screen
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Character LCD Interface Signals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Voltage Compatibility. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
LCD Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
DD RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
CG ROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
CG RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Command Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Disabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Clear Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Return Cursor Home . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Entry Mode Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Display On/Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

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Cursor and Display Shift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Function Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Set CG RAM Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Set DD RAM Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Read Busy Flag and Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Write Data to CG RAM or DD RAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Read Data from CG RAM or DD RAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Four-Bit Data Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Transferring Eight-Bit Data over the Four-Bit Interface. . . . . . . . . . . . . . . . . . . . . . . . . 53
Initializing the Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Power-On Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Display Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Writing Data to the Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Disabling the Unused LCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Chapter 6: VGA Display Port
Signal Timing for a 60 Hz, 640x480 VGA Display . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
VGA Signal Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Chapter 7: RS-232 Serial Ports
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Chapter 8: PS/2 Mouse/Keyboard Port
Keyboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Mouse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Voltage Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Adding a Second PS/2 Port Using a Y-Splitter Cable . . . . . . . . . . . . . . . . . . . . . . . . . 69
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Chapter 9: Analog Capture Circuit
Digital Outputs from Analog Inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
Programmable Pre-Amplifier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Programmable Gain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
SPI Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Analog-to-Digital Converter (ADC). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
SPI Control Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
Connecting Analog Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

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Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Chapter 10: Digital-to-Analog Converter (DAC)
SPI Communication. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
SPI Communication Details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Communication Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
Specifying the DAC Output Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Chapter 11: Parallel NOR Flash PROM
Flash Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Shared SPI Flash and Platform Flash Data Line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Setting the FPGA Mode Select Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Creating and Programming Configuration Images for Parallel Flash . . . . . . . . . 89
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Chapter 12: SPI Serial Flash
SPI Flash PROM Select Jumpers (J1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Shared SPI Flash and Platform Flash Data Line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Jumper Settings to Configure FPGA from Selected SPI Flash PROM . . . . . . . . . . . . . 94
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Creating and Programming Configuration Images for SPI Serial Flash . . . . . . . 95
SPI Flash PROM Programming Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
Direct Programming Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Using Embedded USB JTAG Programmer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96
Using a Separate JTAG Parallel Programming Cable (Optional) . . . . . . . . . . . . . . . . . . 97
Direct SPI Flash Programming Using iMPACT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Indirect Programming Method . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Jumper Settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Indirect SPI Flash Programming Using iMPACT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Chapter 13: DDR2 SDRAM
DDR2 SDRAM Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110
Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
Reserve FPGA VREF Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Special Layout Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113

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Chapter 14: 10/100 Ethernet Physical Layer Interface
Ethernet PHY Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
MicroBlaze Ethernet IP Cores . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
UCF Location Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Chapter 15: Expansion Connectors
Hirose 100-Pin FX2 Edge Connector (J17) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Expansion Connector Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Voltage Supplies to the Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Connector Pinout and FPGA Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
FX2-Connector Compatible Boards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
Mating Receptacle Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Differential I/O Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Using Differential Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Using Differential Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Differential Trace Layout Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
34-Conductor Cable Assemblies (2x17) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Six-Pin Accessory Headers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
J18 Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
J19 Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
J20 Header . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
Digilent Peripheral Modules . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131
Connectorless Debugging Port Landing Pads (J34) . . . . . . . . . . . . . . . . . . . . . . . . . . 131
Chapter 16: Miniature Stereo Audio Jack
Supported Audio Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
FPGA Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Chapter 17: Voltage Supplies
Measuring Power Across Voltage Supply Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . 137
I2C Voltage Adjustment Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Possible Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Restoring Default Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
UCF Location Constraints. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
Related Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139

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Preface
About This Guide
This user guide provides basic information on the Spartan®-3A/3AN Starter Kit board
capabilities, functions, and design. It includes general information on how to use the
various peripheral functions included on the board. For detailed reference designs,
including VHDL or Verilog source code, please visit the following web link.
•Spartan-3A/3AN FPGA Starter Kit Board Web Page
http://www.xilinx.com/s3astarter and http://www.xilinx.com/s3anstarter
There are multiple versions of the Spartan-3A/3AN FPGA Starter Kit. This document
describes the three kits that include the “Revision D” Spartan-3A/3AN FPGA Starter Kit
Board, which is an updated version of the “Revision C” Spartan-3A FPGA Starter Kit
Board. The following table describes the different kits.
Almost all functionality is identical between the Revision C and Revision D boards,
although the silkscreen changes make the two boards look different. The pictures used in
this document are from the Revision D board. If you are using the original Revision C
version of the board, refer to UG330 for pictures and documentation. The following figure
highlights where to find the board revision code on a Revision C board.
Feature Spartan-3AN
Starter Kit
Spartan-3A DDR2 SDRAM
Interface Development Kit
Spartan-3A Starter
Kit, Revision D
Spartan-3A Starter Kit,
Revision C
Part
Number HW-SPAR3AN-SK-UNI-G HW-SPAR3ADDR2-DK-
UNI-G HW-SPAR3A-SK-UNI-G
Device XC3S700AN XC3S700A
Board
Revision Revision D Revision C
DDR2
Memory Supported with 133 MHz crystal oscillator in auxiliary socket
Requires board
modification for
improved performance
User
Guide UG334 (this document) UG330
Web Page www.xilinx.com/s3anstarter www.xilinx.com/s3addr2 www.xilinx.com/s3astarter

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Acknowledgments
Xilinx wishes to thank the following companies for their support of the Spartan-3A/3AN
Starter Kit board:
•STMicroelectronics for the 32 Mbit parallel NOR Flash and 16 Mbit SPI serial Flash
memories
•Atmel for the 16 Mbit SPI serial DataFlash memory
•Linear Technology for the SPI-compatible A/D and D/A converters and the
programmable pre-amplifier
•SMSC for the 10/100 Ethernet PHY
•National Semiconductor for the four-rail voltage regulators that power the FPGA and
and all peripheral components
•Xilinx, Inc. Configuration Solutions for the XCF04S Platform Flash PROM and
support for the embedded USB programmer
Guide Contents
This manual contains the following chapters:
•Chapter 1, “Introduction and Overview,” provides an overview of the key features of
the Spartan-3A/3AN Starter Kit board.
•Chapter 2, “Switches, Buttons, and Rotary Knob,” defines the switches, buttons, and
knobs present on the Spartan-3A/3AN Starter Kit board.
•Chapter 3, “Clock Sources,” describes the various clock sources available on the
Spartan-3A/3AN Starter Kit board.
•Chapter 4, “FPGA Configuration Options,” describes the configuration options for
the FPGA on the Spartan-3A/3AN Starter Kit board.
•Chapter 5, “Character LCD Screen,” describes the functionality of the character LCD
screen.
•Chapter 6, “VGA Display Port,” describes the functionality of the VGA port.
•Chapter 7, “RS-232 Serial Ports,” describes the functionality of the RS-232 serial ports.
•Chapter 8, “PS/2 Mouse/Keyboard Port,” describes the functionality of the PS/2
mouse and keyboard port.
•Chapter 10, “Digital-to-Analog Converter (DAC),” describes the functionality of the
D/A converter.
UG334_01_052707
Board Revision Code
REV C

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•Chapter 9, “Analog Capture Circuit,” describes the functionality of the A/D converter
with a programmable gain pre-amplifier.
•Chapter 11, “Parallel NOR Flash PROM,” describes the functionality of the
STMicroelectronics parallel NOR PROM.
•Chapter 12, “SPI Serial Flash,” describes the functionality of the SPI Serial Flash
memory interface.
•Chapter 13, “DDR2 SDRAM,” describes the functionality of the DDR2 SDRAM
memory interface.
•Chapter 14, “10/100 Ethernet Physical Layer Interface,” describes the functionality of
the 10/100Base-T Ethernet physical layer interface.
•Chapter 15, “Expansion Connectors,” describes the various connectors available on
the Spartan-3A/3AN Starter Kit board.
•Chapter 16, “Miniature Stereo Audio Jack,” describes the audio interface.
•Chapter 17, “Voltage Supplies,” describes the board’s power distribution system.
Additional Resources
To find additional do cumentatio n, see the Xilinx website at:
http://www.xilinx.com/support/documentation/index.htm
To search th e An swer Data base of silicon, software, and IP questi ons and an swers, or to
create a technical support WebCase, see the Xilinx website at:
http://www.xilinx.com/support.

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Chapter 1
Introduction and Overview
Thank you for purchasing the Xilinx Spartan®-3A/3AN FPGA Starter Kit. The board is
invaluable to develop a Spartan-3A or Spartan-3AN FPGA application.
Getting Started
The Spartan-3A/3AN Starter Kit board is ready for use, right out of the box. The design
stored in external Flash exercises the various I/O devices, such as the VGA display and
serial ports. In addition it demonstrates new FPGA features, such as selectable MultiBoot
and the power-saving Suspend mode.
To start using the board, follow the simple steps outlined in Figure 1-1.
1. Double-check the position of the board jumpers, as shown in Figure 1-2, page 14.
These settings are required for the demonstration design to configure correctly.
2. Optionally connect a VGA display device. The display device can be a CRT, a flat-
panel, or even a projector.
3. Optionally connect headphones or amplified speakers to the audio jack.
4. Set the SUSPEND switch to the “RUN” position.
5. Connect the included AC adapter to wall power and also to the board. The AC adapter
also includes attachments to support worldwide locals.
Figure 1-1: Powering Up the Starter Kit Board
Connect AC wall adapter.
Optional: Connect VGA display.
Optional: Connect headphones
or amplified speakers
Set SUSPEND switch
to RUN position.
Turn on power switch.
See messages and
instructions on LCD
character display.
Control operation using
rotary / push-button switch.
UG334_c1_01_052407
2
3
4
5
6
7
8
1
CHECK JUMPER SETTINGS!
910
PS/2 RS-232

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6. Turn on the power switch.
7. The character LCD and VGA display, if connected, display various informational
messages and instructions. If an audio device is connected, the board offers words of
welcome in a variety of languages.
8. Use the rotary/push-button switch to control various board functions.
9. Optionally connect a PS/2-style keyboard to support one of the included
demonstrating designs.
10. Optionally connect a PC directly to the board using a standard 9-pin serial cable.
For more information on the demonstration design, visit the Design Examples web page:
•Spartan-3A/3AN FPGA Starter Kit Demo Design Overview
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#demo
•Restoring the “Out of the Box” Flash Programming
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#out
Figure 1-2: Default Jumper Settings for Starter Kit Board
J11
J12
J4 1
J4 2
J13
J10 J9
J40
M0
M1
M2
J26
DONE
CE
GND
J46
PROM
J1
Power Supply Jumpers
(all jumpers installed)
Platform Flash Jumper
(jumper removed)
FPGA Mode Select Jumpers
(bottom two jumpers installed)
(SPI Mode)
SPI Flash Select Jumpers
(both jumpers installed, vertically)
UG334_c1_02_052707

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Operating the Default Demonstration Design
The demonstration design programmed onto the Spartan-3A/3AN Starter Kit board
provides various output information, depending on what I/O or display devices are
connected. The VGA and audio ports provide the richest experience.
VGA Display
If a VGA display is connected to the board, then the Starter Kit board displays graphics
similar to that shown in Figure 1-3.
Until one of the four push buttons around the rotary knob (Figure 2-5, page 27) is pressed,
the display automatically rotates a graphic image and zooms in and out around the image.
This is called “AutoPilot” mode. A brief text overview describing the board appears along
the left edge. Blue text at the bottom of the screen presents the menu system.
Rotary Knob/Push-Button Menu System
The Spartan-3A/3AN Starter Kit board demonstration design uses the rotary knob and
surrounding push-button switches, shown in Figure 2-5, page 27, to implement a menu
system. The menu display appears in blue text at the bottom of the VGA output. The menu
functions are highlighted in Table 1-1 and Figure 1-4.
Figure 1-3: Rotating/Zooming Graphics, Menu System Displayed on VGA Screen
Rotating and Zooming GraphicsText Description
Rotary/Push-Button Menu System UG330_c1_03_032207

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Select MultiBoot Configuration Image
Spartan-3A/3AN FPGAs support a selectable MultiBoot configuration interface. If the
FPGA configures in one of its Master configuration modes, then the FPGA always loads
the configuration image stored at address 0 in Flash at power-up, or whenever the
PROG_B button is pressed.
Spin the rotary knob to select a new FPGA configuration image. The blue text at the bottom
of the display updates with each click of the rotary knob. For example, the application
displays “Buttons: Load Configuration x” where ‘x’ corresponds to the bitstream image
listed in Ta ble 1-2. Table 1-2 describes the bitstreams preloaded on the board.
After selecting the desired image, press one of the four push-button switches that surround
the rotary knob. This action causes the FPGA to load the selected image from external
Flash memory.
To change to the “Scroll or Rotate Graphic” mode, press the rotary knob.
Ta b le 1 - 1 : Function of Each Menu Control
Press Knob Rotate Knob Press Push Button
Move to next menu selection,
next mode.
Depends on current mode, as
shown in Figure 1-4.
Depends on current mode, as
shown in Figure 1-4.
Figure 1-4: Rotary Knob/Push-Button Menu System
Buttons: Load Configuration 1.
Knob Spin: Select Configuration.
Knob Push: More Options ...
Buttons: Scroll Image.
Knob Spin: Rotate Image.
Knob Push: More Options ...
Buttons: Scroll Image.
Knob Spin: Scale Image.
Knob Push: More Options ...
Buttons: Restart AutoPilot.
Knob Spin: Adjust Volume.
Knob Push: More Options ...
Press Knob
Press Knob
Press Knob
Press Knob
Start Demonstration Design
Power-up board
Press PROG_B button
Config. 1
Config. 2
Config. 3
Config. 4
MultiBoot
MultiBoot
Select FPGA
MultiBoot
MultiBoot
AutoPilot
AutoPilot
AutoPilot
AutoPilot
UG334_c1_04_052707
Rotate
Scale
Volume
Configuration
Select MultiBoot
Scroll/Rotate Graphic
Scroll/Scale Graphic
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Scroll or Rotate Graphic
In this mode, rotate the knob to rotate the graphic image clockwise or counterclockwise.
Use the four push-button switches to scroll the graphic image up, down, left, or right.
Press the rotary knob to change to the “Scroll or Scale Graphic” mode.
Scroll or Scale Graphic
In this mode, rotate the knob to scale the size of the graphic image, zooming in and out.
Use the four push-button switches to scroll the resulting graphic image up, down, left, or
right.
Press the rotary knob to change to the “Restart AutoPilot, Speaker Volume Control” mode.
Restart AutoPilot, Speaker Volume Control
In this mode, rotate the knob to control the speaker output volume.
Press any of the four push-button switches to restart the AutoPilot function.
Press the rotary knob to change to the “Select MultiBoot Configuration Image” mode.
Ta b le 1 - 2 : FPGA Configuration Bitstreams Preprogrammed on the Starter Kit Board
FPGA
Configuration
Bitstream FPGA Application/Reference Design Example
0
(default)
Starter Kit board demonstration design. Loaded at power-up.
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#demo
1
Device DNA Reader: Reads the FPGA’s unique Device ID value and displays it on the character LCD
screen.
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#dna_reader
2
Fractal Generator: Computes fractal images in real time and displays on the VGA port. A user-
contributed design by Matthias Alles. Rotate knob to zoom fractal image; press surrounding push
buttons to scroll the image.
www-user.rhrk.uni-kl.de/~alles/fpga/files.htm
3
ASCII Terminal: Implements a text terminal using an attached VGA display and PS/2 keyboard and
will communicate with HyperTerminal on a PC via an RS-232 serial connection.
Source included in www.xilinx.com/products/boards/s3astarter/reference_designs.htm#out.
4
STMicro M29DW323DT Parallel Flash Programmer: Communicates to a PC using HyperTerminal via
an RS-232 serial connection. Programs, erases, and reads the STMicro M29DW323DT parallel Flash
PROM on the Starter Kit board.
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#parallel_flash_programmer
Spartan-3AN
FPGA
Internal Flash Paint Application: Use a mouse to create drawings and read or write them to In-System
Flash. Loaded from internal SPI Flash in Spartan-3AN FPGA Starter Kit Board. Requires setting Mode
pins as described in Table 4-1, page 39 for Internal Master SPI mode. For Spartan-3AN Starter Kit
Board only.
www.xilinx.com/products/boards/s3astarter/reference_designs.htm#paint.

18 www.xilinx.comSpartan-3A/3AN FPGA Starter Kit Board User Guide
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Chapter 1: Introduction and Overview
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LCD Screen Control Option
While the demonstration design operates best with an attached VGA display, the on-board
LCD screen tracks similar functionality, as shown in Figure 1-5. If no VGA display is
attached, then the “Scroll or Rotate Graphic”, “Scroll or Scale Graphic”, and “Restart
AutoPilot, Speaker Volume Control” modes offer little to no functionality, the exception
being the volume control assuming that a speaker is attached to the audio jack.
Power-Saving Suspend Mode
All of the preloaded FPGA configuration bitstreams have the power-saving Suspend mode
enabled. Suspend mode reduces FPGA power consumption while preserving the present
state of the FPGA application and the FPGA’s configuration data. Set the SUSPEND switch
to RUN or SUSPEND as described in “SUSPEND Switch,” page 26.
Figure 1-5: LCD Screen Output using Menu System
Press Knob
Press Knob
Press Knob
Press Knob
Start Demonstration Design
Power-up board
Press PROG_B button
Config. 1
Config. 2
Config. 3
Config. 4
MultiBoot
MultiBoot
MultiBoot
MultiBoot
AutoPilot
AutoPilot
AutoPilot
AutoPilot
UG334_c1_05_052707
Rotate
Scale
Volume
Select FPGA
Configuration
Select MultiBoot
Scroll/Rotate Graphic
Scroll/Scale Graphic
AutoPilot/Volume
Btns: Load Cfg 1
Spin: Select Cfg
Press Knob 3x
For Boot Menu
Press Knob 2x
For Boot Menu
Press Knob 1x
For Boot Menu
Welcome to XLNX
S3A Starter Kit
Wait 1 second

Spartan-3A/3AN FPGA Starter Kit Board User Guidewww.xilinx.com 19
UG334 (v1.1) June 19, 2008
Key Components and Features
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Using one or two external multimeters, measure the corresponding difference in current
consumption, as described in “Measuring Power Across Voltage Supply Jumpers,” page
137.
Caution! Do not set the SUSPEND switch to “SUSPEND” while programming the parallel NOR
Flash PROM using configuration bitstream #4, as described in Ta b l e 1 - 2 .
RS-232 Serial Port Control Option
Optionally, control the demonstration design using a serial port connection to a PC or
workstation. On a PC, use the HyperTerminal program to communicate to the FPGA
application, as shown in Figure 1-6. Using a standard, straight-through 9-pin serial cable,
connect the PC’s 9-pin RS-232 port to the board’s DCE connector (see Figure 7-1, page 63).
When the demonstration design begins operating, it transmits a message using the serial
port.
Press a number key on the PC to load the associated MultiBoot bitstream listed in Table 1-2.
Key Components and Features
The key features of the Spartan-3A FPGA Starter Kit board or the Spartan-3AN FPGA
Starter Kit board are:
•Spartan-3A FPGA Starter Kit Board: Xilinx 700K-gate XC3S700A Spartan-3A FPGA
in the Pb-free 484-ball BGA package (FGG484)
•Spartan-3AN FPGA Starter Kit Board: Xilinx 700K-gate XC3S700AN Spartan-3AN
nonvolatile FPGA in the Pb-free 484-ball BGA package (FGG484)
♦Internal 8 Mbit In-System Flash memory
♦Store FPGA configuration bitstream or nonvolatile data
•4MbitXilinxPlatform Flash configuration PROM
•64 MByte (512 Mbit) of DDR2 SDRAM, 32Mx16 data interface
•4 MByte (32 Mbit) of parallel NOR Flash
Figure 1-6: Use HyperTerminal and a Standard Serial Cable to Connect to Board
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20 www.xilinx.comSpartan-3A/3AN FPGA Starter Kit Board User Guide
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Chapter 1: Introduction and Overview
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♦FPGA configuration storage
♦MicroBlaze™ code storage/shadowing
♦x8 or x16 data interface after configuration
•Two 16 Mbit SPI serial Flash
♦STMicroelectronics and Atmel DataFlash serial architectures
♦FPGA configuration storage
-Supports single configuration bitstream or multiple MultiBoot configuration
bitstreams
♦Nonvolatile data storage
♦MicroBlaze code shadowing
•Two-line, 16-character LCD screen
•PS/2 port
♦Supports PS/2-compatible mouse or keyboard
♦Supports both mouse and keyboard using a Y-splitter cable (not included)
•VGA display port, 12-bit color
•10/100 Ethernet PHY (requires Ethernet MAC in FPGA)
•Two nine-pin RS-232 ports (DTE- an d DCE-style)
•On-board USB-based programming solution
♦FPGA download/debug
♦SPI serial Flash in-system direct programming
•50 MHz clock oscillator
•8-pin DIP socket for second oscillator
•SMA connector for clock inputs or outputs
•100-pin Hirose FX2 expansion connector with up to 43 FPGA user I/Os
♦Compatible with Digilent FX2 add-on cards
•High-speed differential I/O connectors
♦Receiver: Six data channels or five data channels plus clock
♦Transmit ter: Six data ch annels or five data channels plus clock
♦Supports multiple differential I/O standards, including LVDS, RSDS, mini-LVDS
♦Also supports up to 24 single-ended I/O
♦Uses widely available 34-conductor cables
•Two six-pin expansion connectors for Digilent Peripheral Modules
•Four-output, SPI-based Digital-to-Analog Converter (DAC)
•Two-input, SPI-based Analog-to -Digital Converter (ADC) with programmabl e-gai n
pre-amplifier
•Stereo audio jack using digital I/O pins
•ChipScope™ SoftTouch debugging port
•Rotary-encoder with push-button shaft
•Eight discrete LEDs
•Four slide switches
•Four push-button switches