Xilinx Spartan-6 fpga series User manual

Spartan-6 FPGA

GTP Transceiver Signal

Integrity Simulation Kit

User Guide

For Mentor Graphics HyperLynx

UG396 (v1.0) June 10, 2010

Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) www.xilinx.com UG396 (v1.0) June 10, 2010

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Revision History

The following table shows the revision history for this document.

Date Version Revision

06/10/10 1.0 Initial Xilinx release.

Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) www.xilinx.com 3

UG396 (v1.0) June 10, 2010

Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Preface: About This Guide

Guide Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Additional Support Resources. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Typographical Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Online Document . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Chapter 1: Spartan-6 FPGA GTP Transceiver Signal Integrity

Simulation Kit

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Release Notes for the GTP Transceiver SIS Kit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Installation and Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

SIS Kit Version 1.0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

File Hierarchy. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Getting Started. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Opening an Example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Modifying the Driver Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Customizing the Channel Representation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Modifying the Receiver Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Adjusting Simulation Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Running the Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Appendix A: Frequently Asked Questions

All Versions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Appendix B: HSPICE and HyperLynx/Eldo Correlation Results

Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

GTP REFCLK Model Correlation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

GTP Transceiver Model Correlation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Table of Contents

4www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx)

UG396 (v1.0) June 10, 2010

Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) www.xilinx.com 5

UG396 (v1.0) June 10, 2010

Preface

About This Guide

This guide describes the Spartan®-6 FPGA GTP Transceiver Signal Integrity Simulation

(SIS) Kit for Mentor Graphics HyperLynx.

Guide Contents

This user guide contains this chapter and appendices:

•Chapter 1, Spartan-6 FPGA GTP Transceiver Signal Integrity Simulation Kit, explains

installation, configuration, and use of the HyperLynx software to simulate

Spartan-6 FPGA GTP transceivers.

•Appendix A, Frequently Asked Questions, explains HyperLynx error messages.

•Appendix B, HSPICE and HyperLynx/Eldo Correlation Results, contains the

correlation results and explains how they were derived.

Additional Support Resources

To find additional documentation, see the Xilinx website at:

http://www.xilinx.com/support/documentation/index.htm.

To search the Answer Database of silicon, software, and IP questions and answers, or to

create a technical support WebCase, see the Xilinx website at:

http://www.xilinx.com/support.

Typographical Conventions

This document uses the following typographical conventions. An example illustrates each

convention.

Convention Meaning or Use Example

Courier font

Messages, prompts, and

program files that the system

displays

speed grade: - 100

Courier bold Literal commands that you enter

in a syntactical statement ngdbuild design_name

Helvetica bold

Commands that you select from

a menu File → Open

Keyboard shortcuts Ctrl+C

6www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx)

UG396 (v1.0) June 10, 2010

Preface: About This Guide

Online Document

The following conventions are used in this document:

Italic font

References to other documents

See the Spartan-6 FPGA

Configuration Guide for more

information.

Emphasis in text The address (F) is asserted after

clock event 2.

Square brackets [ ]

An optional entry or parameter.

However, in bus specifications,

such as bus[7:0], they are

required.

ngdbuild [option_name]

design_name

Convention Meaning or Use Example

Blue text Cross-reference link to a location

in the current document

See the section Additional

Support Resources for details.

Refer to Overview, page 7 for

details.

Blue, underlined text Hyperlink to a website (URL) Go to http://www.xilinx.com

for the latest documentation.

Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) www.xilinx.com 7

UG396 (v1.0) June 10, 2010

Chapter 1

Spartan-6 FPGA GTP Transceiver

Signal Integrity Simulation Kit

Introduction

The Spartan®-6 FPGA GTP Transceiver Signal Integrity Simulation (SIS) Kit for Mentor

Graphics HyperLynx provides a simulation environment for evaluating channel designs

for Spartan-6 FPGA GTP transceivers. This document explains how to install the SIS kit

and associated files, gives an overview of the SIS kit file hierarchy, and describes the steps

for getting started with simulations. The appendices describe how the HyperLynx and

Eldo simulation results are correlated with the HSPICE simulations. Results are

documented with waveform plots.

Additional information on the models, ports, and options is available in

UG386, Spartan-6 FPGA GTP Transceivers User Guide.

Release Notes for the GTP Transceiver SIS Kit

Table 1-1 shows the UG396 document version and the associated Spartan-6 FPGA GTP

Transceiver SIS Kit version.

Installation and Requirements

The software requirements and the installation instructions for the Spartan-6 FPGA GTP

Transceiver SIS Kit are provided in this section.

SIS Kit Version 1.0

The requirements for the GTP Transceiver SIS Kit are:

• HyperLynx 8.0, build number 433 or later

• Microsoft Windows XP Professional, version 2002, Service Pack 3

To install the GTP Transceiver SIS Kit, follow these steps:

1. Unzip the ZIP file into any directory, provided that the path name does not contain any

spaces.

Table 1-1: Document and SIS Kit Version Correlation

UG396 Version SIS Kit Version

1.0 1.0

8www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx)

UG396 (v1.0) June 10, 2010

Chapter 1: Spartan-6 FPGA GTP Transceiver Signal Integrity Simulation Kit

2. To prevent errors or warnings when the project files are moved to a different directory

(or computer), replace the path listed on the last line in the PJH files (located in the

HL_projects subdirectory) with a relative path:

INIFILE=.\S6_kit.ini.

Note: HyperLynx automatically replaces this relative path with a full path when opening the

project. Therefore, this change should be made every time the project is moved or copied to a

different location.

3. For better convergence, set ForceFixedStep = 0 under the [SPICE] keyword in the

bsw.ini file in the HyperLynx Installation directory.

File Hierarchy

The top-level directory into which the ZIP file is unzipped contains several subdirectories.

The HyperLynx project files are all located in the hl_projects subdirectory. Any

example project can be opened by double-clicking on the respective FFS file in Windows

Explorer or by starting HyperLynx, going to File/Open Schematic..., and then clicking on

Open Linesim File.

Model files are located in the subcircuits under the top-level project directory.

Subcircuits are referenced by the HyperLynx schematic symbols. The INC files containing

the simulation parameters are located under the testbenches directory along with the

configurator executable programs. There should be no reason to manually modify these

files. All modifications are made via the HyperLynx Graphical User Interface.

Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx) www.xilinx.com 9

UG396 (v1.0) June 10, 2010

Getting Started

The steps in this section must be observed to run simulations:

Opening an Example

The user can double-click on any FFS file in Windows Explorer to start a project in

HyperLynx. This user guide uses GTP_Tx_channel_GTP_Rx as an example, but this

discussion applies to the other testbenches as well. The user can double-click on the

GTP_RefClk.ffs or the GTP_Tx_channel_GTP_Rx.ffs file in the hl_projects

directory in Windows Explorer to start HyperLynx. Because the latter file is the more

complicated testbench, the remaining part of this document discusses that testbench only.

HyperLynx should start without any error or warning messages and look as shown in

Figure 1-1.

Note: The J0 symbol must appear unconnected on the schematics screen. This symbol should not

be removed from the schematics because it is used to insert global simulation parameters, such as

.TEMP and .option compat (the HSPICE compatibility switch for Eldo), into the project. These

parameters are managed automatically by the configurator programs. Removing J0 results in

incorrect simulations.

X-Ref Target - Figure 1-1

Figure 1-1: HyperLynx

UG396_c1_01_042010

10 www.xilinx.com Spartan-6 FPGA GTP Transceiver SIS Kit (HyperLynx)

UG396 (v1.0) June 10, 2010

Chapter 1: Spartan-6 FPGA GTP Transceiver Signal Integrity Simulation Kit

Modifying the Driver Settings

1. Double-click on U1 to open the Assign Models dialog box and click the

Configure Model button, as shown in Figure 1-2.

For more information on the driver settings, refer to UG386, Spartan-6 FPGA GTP

Transceivers User Guide.

Notes relevant to this step:

• The global simulation temperature setting can be changed in either driver or

receiver configurators. However, being a global setting in Eldo, the last change

made is applied to the entire circuit, regardless of whether the TX or RX

configurator is used to make that change.

• Be sure to click only once, because each click starts a new instance of the

configurator. If multiple instances of the configurators are open, close all but one

of them by clicking on their Cancel buttons.

X-Ref Target - Figure 1-2

Figure 1-2: Assign Models

UG396_c1_02_042010

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