ADLINK Technology NuDAQ PCI-9812/10 User manual

NuDAQ
PCI-9812/10
20MHz Simultaneous 4-CH
Analog Input Card
Users’ Guide

@Copyright 1997~2000 ADLink Technology Inc.
All Rights Reserved.
Manual Rev. 2.24: April 10, 2000
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notice in order to improve reliability, design and function and does
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Table of Contents • i
CONTENTS
How to Use This Guide ..........................................iv
Chapter 1 Introduction...........................................1
1.1 Features..........................................................................1
1.2 Applications....................................................................2
1.3 Specifications.................................................................2
1.4 Software Support............................................................4
1.4.1 Programming Library..................................................................4
1.4.2 PCIS-LVIEW: LabVIEW®Driver.................................................4
1.4.3 PCIS-VEE: HP-VEE Driver..........................................................4
1.4.4 DAQBenchTM: ActiveX Controls ...............................................5
1.4.5 DASYLabTM PRO...........................................................................5
Chapter 2 Installation............................................6
2.1 What You Have ...............................................................7
2.2 Unpacking.......................................................................7
2.3 PCI-9812/10's Layout ......................................................8
2.4 Hardware Installation......................................................9
2.5 Device Installation for Windows Systems.......................9
Chapter 3 Signal Connection..............................10
3.1 Connectors...................................................................10
3.2 Analog Input Impedance Setting...................................12
3.2.1 Analog Input ...............................................................................12
3.2.2 External Clock 0.........................................................................13
3.2.3 External Clock 1.........................................................................13
3.2.4 Digital Input.................................................................................13
Chapter 4 Registers Format................................14
4.1 I/O Port Address ...........................................................14
4.2 ADC Channel Enable Register......................................15
4.3 ADC Clock Divisor Register..........................................16
4.4 Trigger Mode Register..................................................17
4.5 Trigger Level Register ..................................................18
4.6 Trigger Source Register................................................19
4.7 Post Trigger Counter Register......................................20
4.8 FIFO Status Register.....................................................21

ii • Table of Contents
4.9 FIFO Control Register...................................................22
4.10 Acquisition Enable Register.........................................22
4.11 Clock Source Register..................................................23
4.12 High Level Programming..............................................24
4.13 Low Level Programming...............................................24
Chapter 5 Operation Theorem............................25
5.1 A/D Conversion Procedure ...........................................25
5.2 A/D Signal Source Control............................................26
5.3 A/D Trigger Source Control ..........................................27
5.3.1 Trigger Sources.........................................................................27
5.3.2 Simultaneous Trigger for Multiple Cards ...........................28
5.3.3 Trigger Modes............................................................................29
5.4 A/D Clock Source Control.............................................31
5.4.1 A/D Clock Sources....................................................................31
5.4.2 Internal Pacer Clock.................................................................31
5.4.3 External Pacer Clock................................................................31
5.4.4 Multiple Cards Operation........................................................32
5.5 A/D Data Transfer .........................................................33
5.5.1 AD Data Transfer.......................................................................33
5.5.2 Simultaneous Sampling of 4 AD Channels ........................33
5.5.3 Total Data Throughput.............................................................34
5.5.4 Maximum Acquiring Data Length .........................................34
5.5.5 Bus-mastering Data Transfer.................................................34
5.5.6 Host Memory Operation..........................................................35
5.5.7 Summary.....................................................................................36
5.6 AD Data Format............................................................36
Chapter 6 C/C++ Library.......................................38
5.1 Libraries Installation....................................................38
5.2 Programming Guide......................................................39
5.2.1 Naming Convention..................................................................39
5.2.2 Data Types..................................................................................39
6.3 _9812_Initial..................................................................40
6.4 _9812_Close .................................................................41
6.5 _9812_AD_DMA_Start...................................................41
6.6 _9812_AD_DMA_Status................................................43
6.7 _9812_AD_DMA_Stop...................................................44
6.8 _9812_Set_Clk_Src .......................................................44
6.9 _9812_Set_Clk_Rate .....................................................45
6.10 _9812_Set_Trig .............................................................46
6.11 W_9812_Alloc_DMA_Mem ............................................48
6.12 W_9812_Free_DMA_Mem .............................................50

Table of Contents • iii
6.13 W_9812_Get_Sample....................................................50
Chapter 7 Calibration...........................................51
7.1 What you need..............................................................51
7.2 VR Assignment.............................................................52
7.3 A/D Calibration..............................................................52
7.3.1 AD Calibration for Channel 0 .................................................52
7.3.2 AD Calibration for Channel 1,2,3...........................................52
Chapter 8 Software Utility...................................55
8.1 Running 9812util.exe ....................................................56
8.2 System Configuration...................................................57
8.3 Calibration....................................................................58
8.4 Functional Testing........................................................60
Product Warranty/Service.....................................62

iv • How to Use thie Guide
How to Use This Guide
This manual is designed to help you use the PCI-9812/10. The
manual describes how to modify various settings on the PCI-
9812/10 card to meet your requirements. It is divided into eight
chapters:
•Chapter 1, "Introduction", gives an overview of the product
features, applications, and specifications.
•Chapter 2, "Installation", describes how to install the PCI-9812/10.
In addition, the layout of PCI-9812/10 is shown.
•Chapter 3, "Signal Connection", describes the
connectors' pin assignment and how to connect the outside signal
and devices with the PCI-9812/10.
•Chapter 4, "Registers Structure & Format", describes the details
of register format and structure of the PCI-9812/10, this information
is very important for the programmers who want to control the
hardware by low-level programming.
•Chapter 5, "Operation Theorem", describes how to operate the
PCI-9812/10. The A/D functions are introduced. Also, some
programming concepts are specified.
•Chapter 6,"C/C++ Software Library", describes high-level
programming interface in C/C++ language. It helps programmer to
control PCI-9812/10 in high-level language style.
•Chapter 7, "Calibration", describes how to calibrate the PCI-
9812/10 for accurate measurement.
•Chapter 8, "Software Utility", describes how to run the utility
program included in the software CD.

Introduction • 1
1
Introduction
PCI-9812/10 is an advanced-performance data acquisition card based
on 32-bit PCI Bus architecture. The maximum sampling rate of PCI-
9812/10 is up to 20M samples per second, With an emphasis on
continuous, non-stop, high-speed, streaming of A/D samples to host
memory. The high performance design and state-of-the-arttechnology
make this card ideal for DSP, FFT, digital filtering, and image
processing applications.
1.1 Features
PCI-9812 PCI Bus Advanced Data Acquisition Card is designed with
the following advanced features:
•32-bit PCI-Bus, Bus Mastering DMA data transfer
•12-bit (9812) or 10-bit (9810) analog input resolution
•On-board 32K words (samples) A/D FIFO memory
•Up to 20MHz A/D sampling rate
•4 single-ended analog input channels
•Bipolar input signals
•4 A/D converters simultaneously sampling
•Five A/D trigger modes: software trigger, pre-trigger, Post-trigger,
middle trigger, and delay trigger

2 • Introduction
1.2 Applications
•IF and BASEBAND Digitization
•Ultrasound Imaging
•Gamma Cameras
•Test Instrument
•CCD Imaging
•Video Digitizing
1.3 Specifications
♦ Analog Input (A/D)
•Converters:B.B. ADS800 series
•Input Channels: 4 single-ended
•Resolution: 12-bit (9812), 10-bit (9810)
•Input Range: Bipolar: ±1V, or ±5V by soldering selection
•Max. Sampling Rate: 20 MHz samples/sec
Note:For single channel enabled, the maximum sampling rate is 20
MHz. For two channels enabled, the 20 MHz sampling rate can
be reached only when the number of samples accessed for each
channel is smaller than 16K. For four channels enabled, the 20
MHz sampling rate can be reached only when the number of
samples accessed for each channel is smaller than 8K. Please
refer to section 5.5 for more detailinformation about the sampling
rate and data length limitation.
•Accuracy: Gain Error ±1.5% at 25°C
•Input Impedance of Analog Input: (soldering selectable)
50Ω(±1V and ±5V)
1.25KΩ(±5V only)
15MΩ(±1V only)
•Dynamic Characteristic:
Differential Linearity Error:
±0.4 LSB (Typ.) ±1.0 LSB (Max.) at 25°C
Integral Linearity Error:
±1.9 LSB at 25°C