Curtiss-Wright Compact CHAMP-AV IV User manual

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Document Number:
Version:
Date:
Curtiss-Wright Controls Embedded Computing
333 Palladium Drive
Ottawa, Ontario, Canada
K2V 1A6
[phone]
COMPACT CHAMP-AV IV
QUAD POWERPCTM
(SCP-424)
USER’SMANUAL
814256
2
February 2006
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COMPACT CHAMP-AV IV USER’SMANUAL CURTISS-WRIGHT CONTROLS EMBEDDED COMPUTING
II 814256 2 FEBRUARY 2006
REVISION HISTORY
COPYRIGHT NOTICE
The information in this document is subject to change without notice and should not be
construed as a commitment by Curtiss-Wright Controls, Inc. While reasonable precautions
have been taken, Curtiss-Wright Controls, Inc. assumes no responsibility for any errors that
may appear in this document.
No part of this document may be copied or reproduced without the prior written consent of
Curtiss-Wright Controls, Inc.
The proprietary information contained in this document must not be disclosed to others for
any purpose, nor used for manufacturing purposes, without written permission of Curtiss-
Wright Controls, Inc. The acceptance of this document will be construed as an acceptance of
the foregoing condition.
Copyright © 2006, Curtiss-Wright Controls, Inc. All rights reserved.
TRADEMARKS
Acrobat is a trademark of Adobe Systems Incorporated.
Altivec is a trademark of Motorola, Inc.
Ethernet is a trademark of Xerox Corporation.
PowerPC is a trademark of International Business Machines Corporation.
UNIX is a registered trademark in the U.S. and other countries, exclusively licensed through
X / Open Company, Ltd.
VxWorks and Tornado are registered trademarks of Wind River Systems, Inc.
Verari Systems is a trademark and VSI/Pro is a registered trademark of Verari Systems, Inc.
Wind River is a trademark of Wind River Systems, Inc.
All other brand and product names are trademarks or registered trademarks of their
respective owners.
Rev By Date Description
1 JP August 2005 First release.
2 BC February 2006 Removed warning label from Chapter 2 page 5.
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CURTISS-WRIGHT CONTROLS EMBEDDED COMPUTING
814256 VERSION 2FEBRUARY 2006 III
TABLE OF CONTENTS
1. Product Overview ....................................................................................................... 1-1
General Description ..............................................................................................................1-2
Feature Summary.................................................................................................................1-4
Technical Description ............................................................................................................1-4
QuadFlow Architecture..................................................................................................... 1-5
Processor Nodes ............................................................................................................. 1-5
Node E Processor ............................................................................................................ 1-6
Double Data Rate SDRAM.................................................................................................1-6
Flash Memory.................................................................................................................1-7
High Speed SRAM ...........................................................................................................1-7
PMC-X Sites ................................................................................................................... 1-7
PCI Local Bus ................................................................................................................. 1-8
On-Board Interrupt and Control (cOBIC) ............................................................................ 1-8
Compact PCI Interface................................................................................................... 1-17
Serial Ports .................................................................................................................. 1-17
Ethernet Interfaces ....................................................................................................... 1-18
Power.......................................................................................................................... 1-18
Reset .......................................................................................................................... 1-19
Timers......................................................................................................................... 1-19
Temperature/Voltage Sensors......................................................................................... 1-19
COP Interface............................................................................................................... 1-20
Physical Characteristics ....................................................................................................... 1-21
SCP-424 Front Panel ..................................................................................................... 1-23
Mating Connectors ........................................................................................................ 1-24
Dimensions .................................................................................................................. 1-24
Weight ........................................................................................................................ 1-25
Overview of Available Software ............................................................................................ 1-26
Built In Test (BIT) Firmware ........................................................................................... 1-26
Operating System Software ............................................................................................ 1-26
Optimized DSP Libraries................................................................................................. 1-27
Software Development Tools .......................................................................................... 1-27
2. Pre-Installation Tasks................................................................................................. 2-1
Unpacking the Card ..............................................................................................................2-2
Checking Hardware Requirements........................................................................................... 2-2
Chassis Requirements...................................................................................................... 2-2
Power Requirements........................................................................................................2-2
Flash Configuration Parameters.........................................................................................2-4
PMC/PMC-X Module Installation Requirements.....................................................................2-4
Configuring Switches ............................................................................................................2-8
3. Hardware Installation.................................................................................................. 3-1
Installation Prerequisites .......................................................................................................3-2
Installation Checklist ....................................................................................................... 3-2
Unpack and Configure the Card......................................................................................... 3-2
Install the PMC Modules on the Basecard............................................................................ 3-3
Choose a cPCI Slot Location .............................................................................................3-3
Quick Installation and Power Up Procedure ..............................................................................3-4
Detailed Installation Procedure ............................................................................................... 3-5
Insert the Basecard in the Chassis.....................................................................................3-5
Connect a Terminal ......................................................................................................... 3-5
Connect Ethernet Port E...................................................................................................3-5
Cable Connections...........................................................................................................3-5
Running the Boot Monitor.................................................................................................3-6
Initiate the Power-Up Sequence ........................................................................................3-6
Display the Initial Screen Message .................................................................................... 3-6
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Configuring an Emulator for use with Compact CHAMP-AV IV................................................ 3-8
Troubleshooting ..................................................................................................................3-10
Verify Insertion in Chassis ..............................................................................................3-10
FAIL LED Behavior .........................................................................................................3-10
Sign-on Message Garbled ...............................................................................................3-10
The Next Step ....................................................................................................................3-10
4. Programming Interface ...............................................................................................4-1
Compact CHAMP-AV IV Memory Map ...................................................................................... 4-2
Data Flow Directions ....................................................................................................... 4-4
A. Connector Pin Assignments ..................................................................................... A-1
J1 Connector Pin Assignments ............................................................................................... A-2
Electrical Characteristics of J1 Signals ............................................................................... A-3
J2 Connector Pin Assignments ............................................................................................... A-4
Electrical Characteristics of J2 Signals ............................................................................... A-5
J3 Connector Pin Assignments ............................................................................................... A-6
Electrical Characteristics of J3 Signals ............................................................................... A-7
J4 Connector Pin Assignments ............................................................................................... A-8
Electrical Characteristics of J4 Signals ............................................................................... A-9
J5 Connector Pin Assignments ............................................................................................. A-10
Electrical Characteristics of J5 Signals ............................................................................. A-11
PMC Connectors................................................................................................................. A-12
J11 Connector.............................................................................................................. A-13
J12 Connector.............................................................................................................. A-15
J13 Connector.............................................................................................................. A-17
J14 Connector.............................................................................................................. A-19
J21 Connector.............................................................................................................. A-21
J22 Connector.............................................................................................................. A-23
J23 Connector.............................................................................................................. A-25
J24 Connector.............................................................................................................. A-27
PMC to cPCI Connector Mapping for Differential Signaling................................................... A-29
PMC to cPCI Connector Mapping for Single-Ended Signaling................................................ A-30
Index .................................................................................................................................. I-1
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LIST OF FIGURES
Figure 1.1: Compact CHAMP-AV IV Functional Block Diagram ..................................................... 1-3
Figure 1.2: Processor Node Block Diagram............................................................................... 1-5
Figure 1.3: cOBIC Block Diagram ........................................................................................... 1-9
Figure 1.4: Interrupt Routing ............................................................................................... 1-10
Figure 1.5: Interrupt Structure............................................................................................. 1-11
Figure 1.6: LED Control....................................................................................................... 1-16
Figure 1.7: Nodes A and E, Serial Port 0 (EIA-232 Asynchronous Mode)..................................... 1-17
Figure 1.8: Compact CHAMP-AV IV Board Layout.................................................................... 1-21
Figure 1.9: Bottom View of Compact CHAMP-AV IV PWB.......................................................... 1-22
Figure 2.1: Position of 5V and 3.3V Keying Holes on a PMC Board ...............................................2-5
Figure 2.2: Configuration Switch Locations .............................................................................. 2-9
Figure 4.1: Data Access Directions for Processor Nodes ............................................................. 4-5
Figure 4.2: Data Access Directions for PMCs ............................................................................4-6
Figure A.1: J1 Connector .......................................................................................................A-2
Figure A.2: J2 Connector .......................................................................................................A-4
Figure A.3: J3 Connector .......................................................................................................A-6
Figure A.4: J4 Connector .......................................................................................................A-8
Figure A.5: J5 Connector ..................................................................................................... A-10
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CURTISS-WRIGHT CONTROLS EMBEDDED COMPUTING
814256 VERSION 2FEBRUARY 2006 VII
LIST OF TABLES
Table 1.1: Internal Interrupt Sources................................................................................... 1-11
Table 1.2: External Interrupt Sources .................................................................................. 1-11
Table 1.3: Inter-Processor Interrupt Generation Register ........................................................ 1-13
Table 1.4: Semaphore Register Format ................................................................................ 1-14
Table 1.5: Serial Port Summary .......................................................................................... 1-17
Table 1.6: Timing Resources............................................................................................... 1-19
Table 1.7: Summary of Compact CHAMP-AV IV Connectors, Functions Supported ...................... 1-24
Table 1.8: Compact CHAMP-AV IV Dimensions ...................................................................... 1-24
Table 1.9: Compact CHAMP-AV IV Weight ............................................................................ 1-25
Table 2.1: Power Requirements.............................................................................................2-3
Table 2.2: cPCI Voltage Specifications.................................................................................... 2-3
Table 2.3: PPMC and PCI-X Support....................................................................................... 2-6
Table 2.4: Recommended Maximum Supply Current per PMC Site.............................................. 2-7
Table 2.5: Switch Definition.................................................................................................. 2-8
Table 3.1: Selection of Target Processor via RTM Rotary Switch................................................. 3-9
Table 4.1: Compact CHAMP-AV IV Memory Map ...................................................................... 4-3
Table A.1: J1 Connector Pin Assignments ...............................................................................A-3
Table A.2: J1 Connector Description.......................................................................................A-3
Table A.3: J2 Connector Pin Assignments ...............................................................................A-5
Table A.4: J2 Connector Description.......................................................................................A-5
Table A.5: J3 Connector Pin Assignments ...............................................................................A-7
Table A.6: J3 Connector Description.......................................................................................A-7
Table A.7: J4 Connector Pin Assignments ...............................................................................A-9
Table A.8: J4 Connector Description.......................................................................................A-9
Table A.9: J5 Connector Pin Assignments ............................................................................. A-11
Table A.10: J5 Connector Description..................................................................................... A-11
Table A.11: J11 Connector Description (Pn1/Jn1 64-bit PCI) ..................................................... A-13
Table A.12: J12 Connector Description (Pn2/Jn2 64-bit PCI) ..................................................... A-15
Table A.13: J13 Connector Description (Pn3/Jn3 64-bit PCI) ..................................................... A-17
Table A.14: J14 Connector Description (Pn4/Jn4 User Defined I/O) ............................................ A-19
Table A.15: J21 Connector Description (Pn1/Jn1 64-bit PCI) ..................................................... A-21
Table A.16: J22 Connector Description (Pn2/Jn2 64-bit PCI) ..................................................... A-23
Table A.17: J23 Connector Description (Pn3/Jn3 64-bit PCI) ..................................................... A-25
Table A.18: J24 Connector Description (Pn4/Jn4 User Defined I/O) ............................................ A-27
Table A.19: PMC to cPCI Connector Mapping for Differential Signaling ........................................ A-29
Table A.20: PMC to cPCI Connector Mapping for Single-Ended Signaling ..................................... A-30
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CURTISS-WRIGHT CONTROLS EMBEDDED COMPUTING
814256 VERSION 2FEBRUARY 2006 IX
PREFACE
PURPOSE
This manual describes the cPCI based Compact CHAMP-AV IV. After explaining the capabilities
of the Compact CHAMP-AV IV, the manual provides the procedure for correctly installing it and
checking its operation.
AUDIENCE
This document is aimed at readers with a technical understanding of hardware engineering
fundamentals, as well as a basic understanding of the cPCI, PCI, and digital signal processing
hardware and software.
DOCUMENTATION ROADMAP
The figure below will help you understand what documentation is available for the Compact
CHAMP-AV IV. These documents are delivered in Adobe Acrobat.pdf format on CD-ROM, or
may be obtained via our TechNet web site at http://www.technet.dy4.com/.
Compact
CHAMP-AV IV
User's Manual
814256
Contents:
- hardware functional description
- installation instructions
- programming interface
- detailed connector pinout info.
Compact CHAMP-AV IV Hardware Documentation
Contents:
- information describing the
exact hardware configuration of
your Compact CHAMP-AV IV board.
Compact
CHAMP-AV IV
Product
Release Notes
8xxxxx
CHAMPtools Software Documentation
CHAMPtools
Software User's
Manual
811489
Contents:
- Software architecture
overview
- BootMon description
- Board Support Library
description
- ANSI C Library description
- Flash programming details
- Software Update Utility
- Memory Map
- PBIT information
Contents:
- information regarding the
most recent CHAMPtools
release.
CHAMPtools
Release Notes
(included on
CHAMPtools
CD-ROM)
CHAMPtools
VSP Release
Notes
Contents:
- information regarding
the most recent
CHAMPtools VSP
release.
Software User's
Manual
Compact
CHAMP-AV IV
VxWorks BSP
and Driver Suite
814454
Contents:
- Installation Instructions
- Building Applications
- Device Drivers
- Memory Map
- Debugging
- BSL
- Extended Shell Commands
- Software Update Utility
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COMPACT CHAMP-AV IV USER’SMANUAL CURTISS-WRIGHT CONTROLS EMBEDDED COMPUTING
X814256 VERSION 2FEBRUARY 2006
SCOPE
This manual contains the following chapters:
Chapter 1 - Product Overview. This chapter provides an overview of the features and
functions of the Compact CHAMP-AV IV. This includes a technical description of the block
diagram.
Chapter 2 - Pre-Installation Tasks. This chapter discusses tasks that must be performed
before installing the Compact CHAMP-AV IV in a system, including checking power
requirements.
Chapter 3 - Hardware Installation. This chapter explains how to install the Compact
CHAMP-AV IV into a cPCI chassis and verify that it is operating correctly.
Chapter 4 - Programming Interface. Describes the memory maps for the Compact
CHAMP-AV IV.
Appendix A - Connector Pin Assignments. This appendix lists the interface connector
pinouts for the Compact CHAMP-AV IV.
RELATED SOFTWARE DOCUMENTS
For information on installing the Compact CHAMP-AV IV software, refer to the CHAMPtools
Software User’s Manual (document number 811489).
Wind River
Systems
Doumentation
Information describing the operation of the version 1.2 WIND POWER ICE and visionPROBE II
emulators is provided in the following Wind River Systems publications:
•WINDPOWER ICE for WIND POWER IDE User’s Guide, part # DOC-15149-NN-00
•WINDPOWERIDE Getting Started, part # DOC-15146-ZD-00
•WINDPOWERIDE Release Notes
• visionPROBE II for WIND POWER IDE User’s Guide, part # DOC-15145-ND-00
CONVENTIONS USED IN THIS MANUAL
This document and the accompanying documents in the documentation package use various
icon conventions and abbreviations to make the documents clearer and easier to read. These
conventions cover typography for such elements as sample software code and keystrokes,
signal meanings, and graphical elements for important information such as warnings or
cautions.
Company Name The abbreviation “CWCEC” seen in this document is used to represent the company name
“Curtiss-Wright Controls Embedded Computing”, which is a division of Curtiss-Wright
Controls, Inc.
Product Naming
Conventions
The generic product name “Compact CHAMP-AV IV” is used throughout this manual to
represent the SCP-424 (commercial version of the Compact CHAMP-AV IV)
Typographic
Conventions
Table 1 lists the typographical conventions used in this documentation package.
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CURTISS-WRIGHT CONTROLS EMBEDDED COMPUTING
814256 VERSION 2FEBRUARY 2006 XI
TABLE 1: Typographic Conventions
Item Convention Example
Keystrokes Keys are listed as they appear on most keyboards,
surrounded by < > marks. Combinations of key-
strokes appear within a single set of < > brackets.
Type < Ctrl-Alt-C > to return to the previous menu.
Type < Esc > to exit.
File Names File names are set in italics. Copy the file named bootA.exe.
Directory Names Directory names show the full directory path. The
last directory in the path does not have a trailing
slash following it.
Go to the c:\windows\temp\backup directory.
Monitor Displays Prompts and other text appearing on monitors is
set in bold monospace type. BootMon>
Firmware Code Firmware code, and any informtion you need to
type in response to a prompt, is set in monospace
type.
bootMon2.exe
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XII 814256 VERSION 2FEBRUARY 2006
Signal
Conventions
Table 2 lists symbols that can follow a signal name. For example, the Hash (#) is used with a
PCI or cPCI signal name, such as FRAME#.
Abbreviations Table 3 lists the abbreviations used to describe the size of a memory device or a range of
addresses.
Memory
Addresses
Unless otherwise stated, all memory addresses are shown in hexadecimal notation.
Icons The following icons are used throughout the documentation package:
TABLE 2: Signal Conventions
Symbol Description
# The signal is active LOW.
[no symbol] The signal is active HIGH.
TABLE 3: Abbreviations
Abbreviation Convention
1 Kbyte 1,024 bytes
1 Mbyte 1,024 Kbytes
1 Gbyte 1,024 Mbytes
Cross Reference
Warning
Caution
Note
Tip
Cross references to other documents are used when a subject being discussed is addressed
in depth by another, more authoritative document. Cross references are also used for
document chapters and sections.
The warning icon indicates procedures in the manual that, if not carried out, or if carried out
incorrectly, could cause physical injury, electrical damage to equipment, or a
non-recoverable corruption of data. Warnings include instructions for preventing such
damage. Please observe warning icons and read the accompanying text completely before
carrying out the procedure.
The caution icon indicates non-catastrophic incidents, complex practices, or procedures
which, if not observed, could result in damage to the hardware. Cautions include specific
instructions for avoiding or minimizing these incidents.
The note icon highlights exceptions and special information.
Tips provide extra information on the subject matter. This could include hints about how to
use your current CWCEC card to its maximum potential.
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CURTISS-WRIGHT CONTROLS EMBEDDED COMPUTING
814256 VERSION 2FEBRUARY 2006 XIII
REFERENCE DOCUMENTATION
Refer to the following standards for information about the specifications the Compact
CHAMP-AV IV is designed for compliance with:
• IEEE Standard Physical and Environmental Layers for PCI Mezzanine Cards (PMC), IEEE
Std 1386.1-2001, June 14, 2001
• IEEE Standard for a Common Mezzanine Card (CMC) Family, IEEE Std 1386-2001, June
14, 2001
• PCI Local Bus Specification, PCI-SIG, Revision 2.3, March 29, 2002
• PCI-X Electrical and Mechanical Addendum to the PCI Local Bus Specifications, PCI_SIG,
Rev. 2.0, Nov. 4, 2002
• PCI-X Protocol Addendum to the PCI Local Bus Specification, PCI-SIG, Rev. 2.0, July 29,
2002
• Interface Between Data Terminal Equipment and Data Circuit-Terminating Equipment
Employing Serial Binary Data Interchange, ANSI/TIA/EIA-232-F-1997, September 30,
1997
• MPC7447/A RISC Microprocessor User's Manual, Rev. 0, 8/2003
•PowerPC
TM Microprocessor Family: The Programming Environments for 32-Bit Microproc-
essors, Motorola
• MV64460, MV64461, MV64462 System Controller for PowerPC Processors, Part 1 of 2
Hardware Specification, Doc. Number: MV-S101286-01, Revision B, Marvell, July 22,
2004
• MV64460, MV64461, MV64462 System Controller for PowerPC Processors, Part 2 of 2
User Manual, Doc. Number: MV-S101286-00, Revision B, Marvell, July 22, 2004
• Double Data Rate (DDR) SDRAM Spec, JEDEC Standard No. 79, Release 2, Feb. 2002
• Stub Series Terminated Logic for 2.5V (SSTL_2), JESD8-9A, Dec. 2000
• MPC8540 Integrated Processor Hardware Specification, Rev 3.1, 12/2004
• MPC8540 PowerQUICC III Integrated Host Processor Reference Manual, Rev 1, 7/2004
• PICMG 2.0 R 3.0 CompactPCI Specification, October 1, 1999
• PICMG 2.1 R2.0 CompactPCI Hot Swap Specification, January 17, 2001
• PCIMG 2.16 R1.0 CompactPCI Packet Switching Backplane (PSB) Specification, Septem-
ber 5, 2001
Please refer to DPK-TechDoc-CD for additional reference information, supplied in Portable
Document Format (PDF) files readable by Adobe® Acrobat® Reader software. This Technical
Documentation CD-ROM includes useful weblinks, an I/O pinout configurator utility, and a
helpful guide to the VMEbus, among other things. You’ll also find copies of the relevant cable
assembly drawings on the CD.
Note
The DPK-TechDoc-CD CD-ROM also provides a copy of the Adobe Acrobat Reader software,
version 4.0, including the Acrobat Search plug-in, to enable you to get the most out of your
CD-ROM by enabling full-text searches of the information.
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814256 VERSION 2FEBRUARY 2006 1-1
1
PRODUCT OVERVIEW
INTHIS CHAPTER...
This chapter discusses the high-level features of the Compact CHAMP-AV IV product. The
following topics are discussed:
• “General Description” on page 1-2
• “Feature Summary” on page 1-4
• “Technical Description” on page 1-4
– “QuadFlow Architecture” on page 1-5
– “Processor Nodes” on page 1-5
– “Double Data Rate SDRAM” on page 1-6
–“FlashMemory”onpage1-7
– “High Speed SRAM” on page 1-7
–“PMC-XSites”onpage1-7
– “PCI Local Bus” on page 1-8
– “On-Board Interrupt and Control (cOBIC)” on page 1-8
– “Serial Ports” on page 1-17
– “Ethernet Interfaces” on page 1-18
– “Power” on page 1-18
– “Reset” on page 1-19
– “Timers” on page 1-19
– “Temperature/Voltage Sensors” on page 1-19
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COMPACT CHAMP-AV IV USER’SMANUAL CURTISS-WRIGHT CONTROLS EMBEDDED COMPUTING
1-2 814256 VERSION 2FEBRUARY 2006
– “COP Interface” on page 1-20
• “Physical Characteristics” on page 1-21
– “SCP-424 Front Panel” on page 1-23
– “Mating Connectors” on page 1-24
–“Dimensions”onpage1-24
– “Weight” on page 1-25
• “Overview of Available Software” on page 1-26
– “Built In Test (BIT) Firmware” on page 1-26
– “Operating System Software” on page 1-26
– “Optimized DSP Libraries” on page 1-27
– “Software Development Tools” on page 1-27
GENERAL DESCRIPTION
The Compact CHAMP-AV IV is a cPCI variant of our fourth generation VME-based quad
PowerPC™ AltiVec DSP board. The Compact CHAMP-AV IV introduces an architecture based
on the latest PowerPC™ and PCI-X bridge devices, to provide a very high bandwidth platform
that maximizes the processing potential of four Freescale PowerPC™ MPC7448 or 7447A
processors. The Compact CHAMP-AV IV also has a powerful fifth processor, the Freescale
MPC8540 PowerQUICC III.
The Compact CHAMP-AV IV is particularly well suited to large, multi-slot systems. This is by
virtue of its four 800 MB/sec (peak) PCI buses and its five Gigabit Ethernet connections (one
per processor), which together provide very high I/O throughput and switching bandwidth.
This together with its four altivec-enabled 7447A processors and fifth PowerPC processor
allow the computing power and data movement to be well matched. The Compact CHAMP-
AV IV has a rich set of features designed to accelerate multi-processing application
performance and speed the software development process. A diverse offering of peripherals
enable the Compact CHAMP-AV IV to be readily integrated into many types of systems such
as benign military, signal intelligence, command, control and communications, as well as
telecommunications systems.
The architecture of the Compact CHAMP-AV IV is illustrated in Figure 1.1 on page 1-3.
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CURTISS-WRIGHT CONTROLS EMBEDDED COMPUTING PRODUCT OVERVIEW
814256 VERSION 2FEBRUARY 2006 1-3
FIGURE 1.1: Compact CHAMP-AV IV Functional Block Diagram
64-bit
User I/O
64-bit
133 MHz
64-bit
64-bit
133 MHz
64-bit
133 MHz
64-bit
133 MHz
(PCI Local Bus 0)
(PCI Local Bus 1)
(PCI Local Bus 2)
(PCI Local Bus 3)
PCI_0
PCI_1
PCI_0
PCI_1
16 bit
PCI_1
PCI_0
16 bit
64-bit
133 MHz
MaxBus
64-bit
up to
99 MHz
PCI-X Bus
64-bit
133 MHz
MaxBus
32 bit
16 bit
PCI_1
PCI_0
64-bit
User I/O
64-bit
133 MHz
MaxBus
64-bit
133 MHz
MaxBus
On-Board
Interrupt
and Control
(cOBIC)
Compact PCI User I/O
MPC7447
A/7448
PowerPC
A
MV64460
Bridge
A
Local
DDR
SDRAM
(256 MB -
512 MB)
MPC7447
A/7448
PowerPC
D
MV64460
Bridge
D
Local
DDR
SDRAM
(256 MB -
512 MB)
MV64460
Bridge
C
MV64460
Bridge
B
MPC7447
A/7448
PowerPC
C
MPC7447
A/7448
PowerPC
B
Local
DDR
SDRAM
(256 MB -
512 MB)
Local
DDR
SDRAM
(256 MB -
512 MB)
PMC1
PMC2
MPC8540
FLASH
(32-128 MB)
64-bit
up to
99 MHz
PCI-X Bus
64-bit
up to
99 MHz
PCI-X Bus
64-bit
up to
99 MHz
PCI-X Bus
64-bit
up to
99 MHz
PCI-X Bus
64-bit
up to
99 MHz
PCI-X Bus
64-bit
up to
99 MHz
PCI-X Bus
64-bit
up to
99 MHz
PCI-X Bus
32-bit
GA[4:0], SGA[4:0]
8-bit General PurposeI/O
16 bit
Local
DDR
SDRAM
(256 MB -
512 MB)
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COMPACT CHAMP-AV IV USER’SMANUAL CURTISS-WRIGHT CONTROLS EMBEDDED COMPUTING
1-4 814256 VERSION 2FEBRUARY 2006
FEATURE SUMMARY
•PICMG
®2.16 multi-processor card, CompactPCI form-factor (no cPCI interface)
• Four PowerPC™ 7448/7447A (AltiVec Technology™-enhanced) CPUs operating at up to
1.0 GHz (7447A) or 1.5 GHz (7448)
– 64 Kbyte L1 and 1 Mbyte (7448)/512 Kbyte (7447A) L2 internal caches
operating at core processor speed
– 32 GFLOPs, 176 SPECint95, 132 SPECfp95 peak computational power (7447A)
– 48 GFLOPs, 264 SPECint95, 198 SPECfp95 peak computational power (7448)
• Up to 512 Mbytes DDR-266 SDRAM per processor (2 Gbyte total)
• PowerPC™ 8540 at 500-800 MHz for control functions
– 256 or 512 Mbytes DDR SDRAM
• QuadFlow architecture with up to 3.2 GB/s peak on-board throughput
• Five Gigabit Ethernet (GbE) ports, one per processor
• PICMG 2.16 compliance
• Support for two 64-bit, 100 MHz PCI-X mezzanine modules (PMC-X)
• Two EIA-232 serial ports
• Support for switch fabric PMC modules with differential routing to backplane
•VxWorks
®Board Support Package
• IXLibs-AV optimized AltiVec DSP function library
• Verari VSI/Pro®Image VSIPL DSP library
• air-cooled level 0 ruggedization
TECHNICAL DESCRIPTION
The operation of the Compact CHAMP-AV IV is described in the following sections, with
reference to the high level block diagram illustrated in Figure 1.1.
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CURTISS-WRIGHT CONTROLS EMBEDDED COMPUTING PRODUCT OVERVIEW
814256 VERSION 2FEBRUARY 2006 1-5
QUADFLOW ARCHITECTURE
The Compact CHAMP-AV IV architecture is suited to DSP applications that place a high
premium on processor to memory, processor to processor, and PMC I/O to memory
bandwidth. The data flow capabilities of the Compact CHAMP-AV IV ensure that applications
can extract the most from the raw computing performance of the four AltiVec engines. The
Compact CHAMP-AV IV architecture encompasses three key attributes that contribute to
maximizing DSP performance:
• The performance of the processor, I/O and memory subsystems.
• High-bandwidth, low-latency connections between processor nodes.
• A non-blocking bridge architecture with added data paths for simultaneous data trans-
fers.
PROCESSOR NODES
The Compact CHAMP-AV IV provides four high performance processing nodes connected in
a ring via high speed PCI-X buses. Each node consists of a 1 GHz PowerPC™ 7448/7447A
processor with 1 Mbyte (7448)/512 Kbytes (7447A) of internal L2 cache and its own
dedicated bank of DDR-266 SDRAM. Each processor node incorporates a Marvell MV64460
Discovery™ III bridge which acts as a non-blocking crossbar interface between the
MPC7448/7447A processor, the DDR SDRAM, two 64-bit, 100 MHz PCI-X buses, and Gigabit
Ethernet. See Figure 1.2 for additional details.
FIGURE 1.2: Processor Node Block Diagram
In multi-processing applications, problems are either addressed by spreading the data set
across many processors or by utilizing the processors in a pipeline, with each processor
performing a stage of the algorithm. In either case, the application requires the transfer of
data between processors. The data movement is often the limiting feature of board
performance rather than raw computing power. The QuadFlow architecture solves the
processing and data flow requirements of high performance embedded systems.
text
PowerPC
7447A/7448
1.0 - 1.5 GHz
MV64460
Bridge
Crossbar
Fabric
Serial
Gigabit
Ethernet
DMA
PCI-X 100/64 PCI-X 100/64
DDR SDRAM
256 MB
Device Bus to cOBIC (see Figure 1.3)
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