Embest MarS Board User manual

MarS Board
User Manual
Version 2.1---Dec. 27th, 2021

Embest Technology
Copyright © 2014 Embest Technology MarS Board User Manual
i
Copyright Statement:
MarS Board and its related intellectual property are owned by Shenzhen
Embest Technology Co., Ltd.
Shenzhen Embest Technology has the copyright of this document and reserves
all rights. Any part of the document should not be modified, distributed or
duplicated in any approach and form with the written permission issued by
Embest Technology Co., Ltd.
The use of Microsoft, MS-DOS, Windows, Windows95, Windows98,
Windows2000 and Windows embedded CE 6.0 are authorized by Microsoft.
Revision History:
Version
Date
Note
1.0
2013-3-29
Original Version
1.1
1.2
2.0
2013-5-11
2013-11-1
2014-8-25
Revision
Revision
Kernel upgrade to 3.0.35, Android upgrade
to 4.3
2.1
2021-12-27
Upgrade MFGTOOLS to run under Win10

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Table of Contents
Chapter 1 Product Overview ............................................................................................. 1
1.1 Introduction ..............................................................................................................1
1.2 Packing List ............................................................................................................. 1
1.3 Product Features .....................................................................................................1
1.4 System Block Diagram ............................................................................................3
1.5 Hardware Dimensions (mm) ................................................................................... 4
Chapter 2 Introduction to Hardware .................................................................................5
2.1 CPU Introduction ..................................................................................................... 5
2.1.1 Clock Signals ................................................................................................ 5
2.1.2 Reset Signal ..................................................................................................5
2.1.3 General Interfaces ........................................................................................ 5
2.1.4 Display Interface ........................................................................................... 6
2.1.5 3D Graphics Acceleration System ................................................................6
2.2 Peripheral ICs around CPU .................................................................................... 6
2.2.1 eMMC Flash NCEMBM11-04G .................................................................... 6
2.2.2 DDR H5TQ2G63DFR-H9C ...........................................................................6
2.2.3 AR8035 Ethernet PHY .................................................................................. 7
2.2.4 FE1.1 USB Hub ............................................................................................ 7
2.2.5 FT232RQ USB to UART Chip ...................................................................... 7
2.3 Hardware Interfaces on Mars Board .......................................................................8
2.3.1 Power Jack (J8) ............................................................................................ 8
2.3.2 HDMI Interface (J1) .......................................................................................8
2.3.3 LVDS Interface (J3) .......................................................................................9
2.3.4 USB OTG Interface (J7) ............................................................................... 9
2.3.5 USB Debug Interface (J9) .......................................................................... 10
2.3.6 Ethernet Interface (J2) ................................................................................10
2.3.7 USB Hub Interface (Hub1) ..........................................................................11
2.3.8 USB Hub Extension Interface (J21) ............................................................11
2.3.9 TF Card Interface (J13) ...............................................................................11
2.3.10 LCD Interface (J12) .................................................................................. 12
2.3.11 AUDMUX (Digital Audio Multiplexer) Interface (J11) ................................13

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2.3.12 CAN1 Interface (J11) ................................................................................ 13
2.3.13 CAN2 Interface (J11) ................................................................................ 14
2.3.14 ECSPI2 (Enhanced Configurable SPI) Interface (J10) ............................14
2.3.15 I2C1 Interface (J11) .................................................................................. 14
2.3.16 I2C3 Interface (J11) .................................................................................. 14
2.3.17 IPU1 (Image Processing Unit 1) Interface (J11) ...................................... 15
2.3.18 KPP Keyboard Interface (J11) ..................................................................15
2.3.19 PWM (Pulse Width Modulation) Interface (J10 & J11)............................ 15
2.3.20 GPMI (General Purpose Memory Interface) (J10) ...................................16
2.3.21 SPDIF (Sony/Philips Digital Interface) (J10) ............................................16
2.3.22 UART1 Interface (J11) .............................................................................. 16
2.3.23 UART3 Interface (J10) ..............................................................................17
2.3.24 UART4 Interface (J11) .............................................................................. 17
2.3.25 UART5 Interface (J11) .............................................................................. 17
2.3.26 USDHC1 (Ultra Secured Digital Host Controller) Interface (J10) ............17
2.3.27 ESAI (Enhanced Serial Audio Interface) (J10 & J11) .............................. 18
Chapter 3 Preparations .................................................................................................... 19
3.1 Software Introduction ............................................................................................ 19
3.2 Learning about Linux System ............................................................................... 19
3.3 Learning about Android System ............................................................................20
3.4 Setting up HyperTerminal ......................................................................................21
Chapter 4 Downloading and Running System ..............................................................23
4.1 Download and Run Linux or Android System .......................................................23
4.2 UcoS System Demonstration ................................................................................27
4.3 Display Mode Configurations of Linux&Android System ......................................27
Chapter 5 Making Images ................................................................................................ 31
5.1 Making Images for Linux .......................................................................................31
5.1.1 Getting Tools and Source Code ................................................................. 31
5.1.2 Compiling System Images ..........................................................................32
5.2 Making Images for Android ................................................................................... 33
5.2.1 Establishment of development environment .............................................. 33
5.2.2 Getting Repo Source Code ........................................................................ 33

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5.2.3 Compiling System Images ..........................................................................34
Appendix 1 – Installing Ubuntu Linux System ..............................................................36
Technical Support and Warranty .................................................................................... 48

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Chapter 1 Product Overview
1.1 Introduction
MarS Board is an evaluation board designed by Embest Technology and based on
Freescale’s i.MX 6Dual processor. i.MX 6Dual integrates ARM Cortex™-A9 core of up to
1GHz, 2D and 3D graphics processors and 3D 1080p video processor. MarS Board is
featured with abundant interfaces such as HDMI, LVDS, mini USB OTG, mini USB
debug, RJ45, USB host, TF card and LCD display to help developers from different fields
including netbooks, all-in-one PCs, high-end mobile Internet devices, handhold
computers, portable media players, game consoles and portable navigation devices.
1.2 Packing List
MarS Board
Accessories package (option)
HDMI Cable
Mini USB Cable
5V@4A power adapter
4GB TF Card
Gigabit Ethernet line
Other Options
1.3 Product Features
Product Parameters:
Dimensions: 65mm x 102mm
Operation Temperature: 0 ~ 70℃
Operating Humidity: 20% ~ 90% (Non-condensing)

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Power Supply: 5V
Processor:
i.MX 6Dual integrates ARM Cortex™-A9 core
32 KByte L1 Instruction Cache
32 KByte L1 Data Cache
Private Timer and Watchdog
Cortex-A9 NEON MPE (Media Processing Engine) Coprocessor
2D/3D Graphics Processors
On-Board Memories:
4GByte eMMC
4*256MB DDR3 SDRAM
On-Board Interfaces and Buttons:
A HDMI Interface
A LVDS Interface
A LCD Interface
Two 480Mbps High-Speed USB2.0 Hub Interface
Two 480Mbps High-Speed USB2.0 Header Interface
A 480Mbps High-Speed USB2.0 OTG Interface
A COM-USB Debug (com2) Interface
A TF Card Interface
A 10/100M/1Gbps RJ45 Network Interface
A Boot Mode Interface
A Reset Button
Signals of On-Board Interfaces:
An AUDMUX (Digital Audio Multiplexer) Signal
Two CAN Signals
A ECSPI2 (Enhanced Configurable SPI) Signal
Two I2C Signals
A camera/ Parallel signal, up to 16 bit

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A KPP (Keypad Port) Signal
A PWM (Pulse Width Modulation) Signal
A GPMI (General Purpose Memory Interface) Signal
A SPDIF (Sony/Philips Digtal Interface) Signal
Four UART Signals
A USDHC1 (Ultra Secured Digital Host Controller) Signal
A ESAI (Enhanced Serial Audio Interface) Signal
Note:
Pins of some interfaces listed above are multiplexed; please refer to data sheet of the
processor and product schematic.
1.4 System Block Diagram
Figure 1-1 System block diagram of MarS Board

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1.5 Hardware Dimensions (mm)
Figure 1-2 Dimensions of MarS Board

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Chapter 2 Introduction to
Hardware
This chapter will help you learn about the hardware composition of MarS Board by briefly
introduce CPU, peripheral ICs and pin definition of various interfaces on the product.
2.1 CPU Introduction
i.MX 6Dual is an ARM™ Cortex-A9-based dual-core processor from Freescale. It runs at
up to 1GHz, integrates 2D/3D graphics, 3D 1080p video processor and power
management, and provides 64-bit DDR3/LVDDR3/LVDDR2-1066 interfaces as well as
many other interfaces such as high-definition display and camera.
2.1.1 Clock Signals
The clock signals of i.MX 6Dual include a 32.768 KHz RTC clock and a 24 MHz external
clock;
RTC Clock: generated by an external crystal for low-frequency calculation;
External Clock: used to generate main clock signal for PLL, CMM and other
modules;
2.1.2 Reset Signal
Reset singal is determined by POR_B of CPU; low level validates reseting.
2.1.3 General Interfaces
General interfaces include 7 sets of GPIOs, each of which provides 32 dedicated GPIO
pins (except GPIO7 which has 14 pins), and therefore the total pin number of GPIO can
be up to 206.

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2.1.4 Display Interface
A parallel 24-bit RGB interface, supports 60Hz WUXGA output
Two LVDS interfaces, support up to 165 Mpixels/sec output
A HDMI 1.4 interface
A MIPI/DSI interface with 1Gbps output rate
2.1.5 3D Graphics Acceleration System
i.MX 6Dual integrates GPU3Dv4 3D graphics processing unit which provides hardware
acceleration for 3D graphics algorithms and allows desktop quality interactive graphics
applicatios reach up to HD1080p resolution. The GPU3D supports OpenGL ES 2.0,
including extensions, OpenGL ES 1.1, and OpenVG 1.1.
Additioally, i.MX 6Dual also has a GPUVGv2 vector graphics processing unit which
provides hardware acceleration for 2D graphics algorithms.
2.2 Peripheral ICs around CPU
2.2.1 eMMC Flash NCEMBM11-04G
NCEMBM11-04G is an eMMC flash memory on MarS Board with 4GB memory space.
The flash supports high-speed DDR data transfer at a clock frequency of up to 52MHz,
as well as three widths of data line: 1-bit (default), 4-bit and 8-bit. The synchronous
power managemet allows flash feature fast boot, automatical termination and sleep;
meanwhile, NCEMBM11-04G supports hight-speed dual-data-transfer boot mode.
2.2.2 DDR H5TQ2G63DFR-H9C
H5TQ2G63DFR-H9C is a DDR3 SDRAM on MarS Board with 256MB memory space. It
is suited for high-capacity and high-bandwidth applications and supports differential
clock iput, differential data strobe, automatical refresh and asynchronous pin reset. MarS

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Board has 4 chips of H5TQ2G63DFR-H9C summing up to 1GB.
2.2.3 AR8035 Ethernet PHY
AR8035 is a single port 10/100/1000 Mbps tri-speed Ethernet PHY feaured with low
power and low cost. AR8035 supports MAC.TM RGMII interface and IEEE 802.3az-2010,
Energy Efficient Ethernet (EEE) standard through proprietary SmartEEE technology,
improving energy efficiency in systems using legacy MAC devices without 802.3az
support. MarS Board can be either connected to a hub with a straight-through network
cable, or to a PC with a cross-over network cable.
2.2.4 FE1.1 USB Hub
FE1.1 is a USB 2.0 high-speed 4-port hub solution. It uses USB3320 to provide 4
extended USB interface with support for high-speed (480MHz), full-speed (2MHz) and
low-speed (1.5MHz) mode.
2.2.5 FT232RQ USB to UART Chip
FT232RQ is a USB-to-UART chip which realizes mini USB debug interface on MarS
Board. It integrates a 1024-bit internal EEPROM and CBUS I/O configuration, and
supports data transfer rates from 300 baud~3 Mbaud at TLL levels.

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2.3 Hardware Interfaces on Mars Board
Hardware Interfaces on MarS Board
2.3.1 Power Jack (J8)
Table 2-1 Power Jack
Pins
Definitions
Descriptions
1
GND
GND
2
+5V
Power supply (+5V) 4A (Type)
3
+5V
Power supply (+5V) 4A (Type)
2.3.2 HDMI Interface (J1)
Table 2-2 HDMI Interface
Pins
Definitions
Descriptions
1
DAT2+
TMDS data 2+
2
DAT2_S
TMDS data 2 shield
3
DAT2-
TMDS data 2-
4
DAT1+
TMDS data 1+
5
DAT1_S
TMDS data 1 shield
6
DAT1-
TMDS data 1-
7
DAT0+
TMDS data 0+
8
DAT0_S
TMDS data 0 shield
9
DAT0-
TMDS data 0-

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Pins
Definitions
Descriptions
10
CLK+
TMDS data clock+
11
CLK_S
TMDS data clock shield
12
CLK-
TMDS data clock-
13
NC
NC
14
NC
NC
15
SCL
IIC master serial clock
16
SDA
IIC serial bidirectional data
17
GND
GND
18
5V
5V
19
HPLG
Hot plug and play detect
2.3.3 LVDS Interface (J3)
Table 2-3 LVDS Interface
Pins
Definitions
Descriptions
1
3V3
+3.3V
2
LVDS_TX2_P
LVDS Data2+
3
LVDS_TX2_N
LVDS Data2-
4
GND
GND
5
LVDS_TX1_P
LVDS Data1+
6
LVDS_TX1_N
LVDS Data1-
7
GND
GND
8
LVDS_TX0_P
LVDS Data0+
9
LVDS_TX0_N
LVDS Data-
10
GND
GND
11
LVDS_CLK_P
LVDS_CLK+
12
LVDS_CLK_N
LVDS_CLK-
13
LCD_PWR_EN
Touch Reset Signal
14
Touch_Int
Touch Interrupt Signal
15
I2C_SCL
IIC Master Serial Clock
16
I2C_SDA
IIC Master Serial Data
17
LED_PWR_EN
Backlight Enable
18
5V
+5V
19
PWM
Pulse Width Modulation
2.3.4 USB OTG Interface (J7)
Table 2-4 USB OTG Interface

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Pins
Definitions
Descriptions
1
VBUS
+5V
2
DN
USB Data-
3
DP
USB Data+
4
ID
USB ID
5
GND
GND
2.3.5 USB Debug Interface (J9)
Table 2-5 USB Debug Interface
Pins
Definitions
Descriptions
1
VBUS
+5V
2
DN
USB Debug Data-
3
DP
USB Debug Data+
4
NC
NC
5
GND
GND
2.3.6 Ethernet Interface (J2)
Table 2-6 Ethernet Interface
Pins
Definitions
Descriptions
1
TD1+
TD1+ output
2
TD1-
TD1- output
3
TD2+
TD2+ output
4
TD2-
TD2- output
5
TCT
2.5V Power for TD
6
RCT
2.5V Power for RD
7
RD1+
RD1+ input
8
RD1-
RD1- input
9
RD2+
RD2+ input
10
RD2-
RD2- input
11
GRLA
Green LED link signal
12
GRLC
Power supply for Green LED
13
YELC
Yellow LED action signal
14
YELA
Power supply for Yellow LED

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2.3.7 USB Hub Interface (Hub1)
Table 2-7 USB Hub Interface
Pins
Definitions
Descriptions
1
APV
5V power for HUB A
2
AD-
USB HUB A Data-
3
AD+
USB Debug Data+
4
GNDA
USB HUB A GND
5
BPV
5V power for HUB B
6
BD-
USB HUB B Data-
7
BD+
USB HUB B Data+
8
GNDB
USB HUB B GND
2.3.8 USB Hub Extension Interface (J21)
Table 2-8 USB HUB Extension Interface
Pins
Definitions
Descriptions
1
PWR2
5V power for HUB 2
2
PWR1
5V power for HUB 1
3
DM2
USB HUB 2 Data-
4
DM1
USB HUB 1 Data-
5
DP2
USB HUB 2 Data+
6
DP1
USB HUB 1 Data+
7
GND
GND
8
GND
GND
9
GND
GND
10
GND
GND
2.3.9 TF Card Interface (J13)
Table 2-9 TF Card Interface
Pins
Definitions
Descriptions
1
DAT2
Card data 2
2
DAT3
Card data 3
3
CMD
Command Signal
4
VDD
VDD
5
CLK
Clock

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Pins
Definitions
Descriptions
6
VSS
VSS
7
DAT0
Card data 0
8
DAT1
Card data 1
9
CD
Card detect
2.3.10 LCD Interface (J12)
Table 2-10 LCD Interface
Pins
Definitions
Descriptions
1
B0
LCD Pixel data bit 0
2
B1
LCD Pixel data bit 1
3
B2
LCD Pixel data bit 2
4
B3
LCD Pixel data bit 3
5
B4
LCD Pixel data bit 4
6
B5
LCD Pixel data bit 5
7
B6
LCD Pixel data bit 6
8
B7
LCD Pixel data bit 7
9
GND1
GND
10
G0
LCD Pixel data bit 8
11
G1
LCD Pixel data bit 9
12
G2
LCD Pixel data bit 10
13
G3
LCD Pixel data bit 11
14
G4
LCD Pixel data bit 12
15
G5
LCD Pixel data bit 13
16
G6
LCD Pixel data bit 14
17
G7
LCD Pixel data bit 15
18
GND2
GND
19
R0
LCD Pixel data bit 16
20
R1
LCD Pixel data bit 17
21
R2
LCD Pixel data bit 18
22
R3
LCD Pixel data bit 19
23
R4
LCD Pixel data bit 20
24
R5
LCD Pixel data bit 21
25
R6
LCD Pixel data bit 22
26
R7
LCD Pixel data bit 23
27
GND3
GND
28
DEN
AC bias control (STN) or pixel data
enable (TFT)
29
HSYNC
LCD Horizontal Synchronization

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Pins
Definitions
Descriptions
30
VSYNC
LCD Vertical Synchronization
31
GND
GND
32
CLK
LCD Pixel Clock
33
GND4
GND
34
X+
X+ Position Input
35
X-
X- Position Input
36
Y+
Y+ Position Input
37
Y-
Y- Position Input
38
SPI_CLK
SPI serial clock
39
SPI_MOSI
SPI Master Output, Slave Input
40
SPI_MISO
SPI Master Input, Slave Output
41
SPI_CS
SPI Chip Select
42
IIC_CLK
IIC master serial clock
43
IIC_DAT
IIC serial bidirectional data
44
GND5
GND
45
VDD1
3.3V
46
VDD2
3.3V
47
VDD3
5V
48
VDD4
5V
49
RESET
Reset
50
PWREN
Backlight enable
Note:
Please Do Not hot plug LCD flat cable.
2.3.11 AUDMUX (Digital Audio Multiplexer) Interface (J11)
Table 2-11 AUDMUX Interface
Pins
Definitions
Descriptions
31
AUD3_RXD
Receive audio data
25
AUD3_TXC
Audio transmission clock
27
AUD3_TXD
Transmit audio data
29
AUD3_TXFS
Transmit audio frame signal
2.3.12 CAN1 Interface (J11)
Table 2-12 CAN1 Interface

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Pins
Definitions
Descriptions
33
RXCAN
Receive data
35
TXCAN
Transmit data
2.3.13 CAN2 Interface (J11)
Table 2-13 CAN2 Interface
Pins
Definitions
Descriptions
37
RXCAN
Receive data
39
TXCAN
Transmit data
2.3.14 ECSPI2 (Enhanced Configurable SPI) Interface (J10)
Table 2-14 ECSPI2 Interface
Pins
Definitions
Descriptions
21
MISO
Master Input Salve Output
19
MOSI
Master Output Salve Input
17
SCLK
Clock
15
SS0
Chip select
2.3.15 I2C1 Interface (J11)
Table 2-15 I2C1 Interface
Pins
Definitions
Descriptions
38
SCL
Master serial clock
40
SDA
Master serial data
2.3.16 I2C3 Interface (J11)
Table 2-16 I2C3 Interface
Pins
Definitions
Descriptions
3
SCL
Master serial clock
5
SDA
Master serial data

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2.3.17 IPU1 (Image Processing Unit 1) Interface (J11)
Table 2-17 IPU1 Interface
Pins
Definitions
Descriptions
4
CSI0_DAT12
Digital image data bit 12
6
CSI0_DAT13
Digital image data bit 13
8
CSI0_DAT14
Digital image data bit 14
10
CSI0_DAT15
Digital image data bit 15
12
CSI0_DAT16
Digital image data bit 16
14
CSI0_DAT17
Digital image data bit 17
16
CSI0_DAT18
Digital image data bit 18
18
CSI0_DAT19
Digital image data bit 19
21
CSI0_DATA_EN
Digital image data write enable
17
CSI0_HSYNC
Horizontal synchronization
19
CSI0_PIXCLK
Pixel clock
23
CSI0_VSYNC
Vertical synchronization
2.3.18 KPP Keyboard Interface (J11)
Table 2-18 KPP Interface
Pins
Definitions
Descriptions
30
COL[0]
Keypad matrix column 0 output
34
COL[1]
Keypad matrix column 1 output
35
COL[2]
Keypad matrix column 2 output
28
ROW[0]
Keypad matrix row 0 input
32
ROW[1]
Keypad matrix row 1 input
37
ROW[2]
Keypad matrix row 1 input
2.3.19 PWM (Pulse Width Modulation) Interface (J10 & J11)
Table 2-19 PWM Interface
Pins
Definitions
Descriptions
26(J11)
PWM1
Pulse Width Modulation
13(J10)
PWM4
Pulse Width Modulation
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