Motorola MVME167-32 User manual

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MVME167
Single Board Computer
User’s Manual
Character User Interface:

vii
Contents
CHAPTER 1 GENERAL INFORMATION
Introduction................................................................................................................1-1
Model Designations ...................................................................................................1-1
Features......................................................................................................................1-2
Specifications.............................................................................................................1-3
Cooling Requirements ........................................................................................1-3
FCC Compliance.................................................................................................1-4
General Description ...................................................................................................1-5
Equipment Required ..................................................................................................1-6
Related Documentation..............................................................................................1-7
Support Information...................................................................................................1-8
Manual Terminology..................................................................................................1-9
CHAPTER 2 HARDWARE PREPARATION AND INSTALLATION
Introduction................................................................................................................2-1
Unpacking Instructions ..............................................................................................2-1
Hardware Preparation ................................................................................................2-1
General Purpose Readable Jumpers on Header J1..............................................2-2
System Controller Header J2..............................................................................2-2
Serial Port 4 Clock Configuration Select Headers J6 and J7..............................2-4
SRAM Backup Power Source Select Header J8.................................................2-5
Installation Instructions..............................................................................................2-6
MVME167 Module Installation..........................................................................2-6
System Considerations........................................................................................2-7
CHAPTER 3 OPERATING INSTRUCTIONS
Introduction................................................................................................................3-1
Controls and Indicators..............................................................................................3-1
ABORT Switch S1..............................................................................................3-1
RESET Switch S2...............................................................................................3-1
Front Panel Indicators (DS1 - DS4)....................................................................3-2
Memory Maps............................................................................................................3-3
Local Bus Memory Map.....................................................................................3-3

viii
Normal Address Range ...............................................................................3-3
Detailed I/O Memory Maps............................................................................3-6
BBRAM,TOD Clock Memory Map .............................................................3-26
Interrupt Acknowledge Map .........................................................................3-28
VMEbus Memory Map ........................................................................................3-29
VMEbus Accesses to the Local Bus .............................................................3-29
VMEbus Short I/O Memory Map .................................................................3-29
Software Initialization .................................................................................................3-30
Multi-MPU Programming Considerations...........................................................3-30
Local Reset Operation..........................................................................................3-30
CHAPTER 4 FUNCTIONAL DESCRIPTION
Introduction ...................................................................................................................4-1
MVME167 Functional Description...............................................................................4-1
Data Bus Structure..................................................................................................4-1
MC68040 MPU......................................................................................................4-2
EPROM..................................................................................................................4-2
SRAM.....................................................................................................................4-2
Onboard DRAM.....................................................................................................4-3
Battery Backed Up RAM and Clock......................................................................4-4
VMEbus Interface ..................................................................................................4-4
I/O Interfaces..........................................................................................................4-5
Serial Port Interface.........................................................................................4-5
Parallel Port Interface......................................................................................4-6
Ethernet Interface............................................................................................4-6
SCSI Interface.................................................................................................4-7
SCSI Termination............................................................................................4-7
Local Resources .....................................................................................................4-7
Programmable Tick Timers.............................................................................4-7
Watchdog Timer..............................................................................................4-8
Software-Programmable Hardware Interrupts................................................4-8
Local Bus Timeout..........................................................................................4-8
Timing Performance...............................................................................................4-8
Local Bus to DRAM Cycle Times..................................................................4-8
ROM Cycle Times ..........................................................................................4-9
SCSI Transfers ................................................................................................4-9
LAN DMA Transfers......................................................................................4-9
Remote Status and Control...................................................................................4-10

ix
APPENDIX A EIA-232-D INTERCONNECTIONS
Introduction.................................................................................................................. A-1
Levels of Implementation ............................................................................................ A-3
Signal Adaptations................................................................................................ A-3
Sample Configurations ......................................................................................... A-4
Proper Grounding ................................................................................................. A-6

x

xi
List of Figures
Figure 2-1. MVME167 Switches, Headers, Connectors, Fuses, and LEDs ..............2-3
Figure 4-1. MVME167 Main Module Block Diagram............................................4-11
Figure 4-2. Parity DRAM Mezzanine Module Block Diagram...............................4-12
Figure 4-3. ECC DRAM Mezzanine Module Block Diagram ................................4-13
Figure A-1. Middle-of-the-Road EIA-232-D Configuration....................................A-4
Figure A-2. Minimum EIA-232-D Connection ........................................................A-5

xii

xiii
List of Tables
Table 1-1. MVME167 Model Designations...............................................................1-1
Table 1-2. MVME167 Specifications ........................................................................1-4
Table 3-1. Local Bus Memory Map...........................................................................3-4
Table 3-2. Local I/O Devices Memory Map..............................................................3-5
Table 3-3. VMEchip2 Memory Map (Sheet 1 of 3)...................................................3-8
Table 3-4. PCCchip2 Memory Map.........................................................................3-14
Table 3-5. Printer Memory Map ..............................................................................3-16
Table 3-6. MEMC040 Internal Register Memory Map ...........................................3-17
Table 3-7. MCECC Internal Register Memory Map................................................3-17
Table 3-8. Cirrus Logic CD2401 Serial Port Memory Map ....................................3-19
Table 3-9. 82596CA Ethernet LAN Memory Map..................................................3-23
Table 3-10. 53C710 SCSI Memory Map .................................................................3-24
Table 3-11. MK48T08 BBRAM,TOD Clock Memory Map ...................................3-25
Table 3-12. BBRAM Configuration Area Memory Map.........................................3-25
Table 3-13. TOD Clock Memory Map.....................................................................3-26
Table A-1. EIA-232-D Interconnections...................................................................A-2