Epson S1V30080F00A300 User manual

Rev. 1.00
S1V30080 Series
Evaluation Board
User’s Guide

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©SEIKO EPSON CORPORATION 2009,All rights reserved.

S1V30080 Series Evaluation Board User’s Guide EPSON i
(Rev. 1.00)
Table of Contents
1. Introduction .................................................................................................................. 1
1.1 Overview ......................................................................................................................................1
1.2 Cinderella board series configuration.......................................................................................2
1.3 User guide overview....................................................................................................................2
2. Before Starting.............................................................................................................. 3
2.1 Items provided.............................................................................................................................3
2.2 Cinderella (S1V30080 voice LSI evaluation board)...................................................................4
2.2.1 Part names and functions ....................................................................................................... 4
2.2.2 Cinderella block diagram....................................................................................................... 10
2.3 CASTLE board........................................................................................................................... 11
2.3.1 CASTLE Part names and functions....................................................................................... 11
2.3.2 CASTLE block diagram......................................................................................................... 16
2.4 Cinderella and CASTLE connection ........................................................................................17
3. Usage Instructions..................................................................................................... 18
3.1 Writing data to Cinderella board ..............................................................................................18
3.1.1 Data writing flowchart............................................................................................................ 19
3.1.2 Cinderella board data writing micro SD card......................................................................... 21
3.2 Cinderella board standalone demo..........................................................................................22
3.2.1 Standalone mode 1 control.................................................................................................... 23
3.2.2 Standalone mode 2 control.................................................................................................... 24
3.3 Connecting to an external host CPU .......................................................................................25
4. Usage Precautions..................................................................................................... 27
4.1 DIP switch definitions ...............................................................................................................27
4.2 Voice output pin precautions ...................................................................................................27
4.3 External power supply precautions.........................................................................................28
4.4 PLD and external flash memory power supply selector jumper pin J6................................ 28
4.5 Micro SD card precautions.......................................................................................................28
5. Board Circuit Diagram ............................................................................................... 29
Revision History............................................................................................................. 35

1. Introduction
S1V30080 Series Evaluation Board User’s Guide EPSON 1
(Rev. 1.00)
1. Introduction
1.1 Overview
This evaluation kit is a customer evaluation kit for use with the S1V30080 voice LSI (hereinafter
referred to as the "voice LSI").
The kit consists of a "Cinderella" voice LSI evaluation board and associated components. The
Cinderella board features the push switches, clock, DIP switches, audio amplifier, and host CPU
interface necessary for voice LSI evaluation.
The following functions are provided by using the board on its own or in conjunction with a
"CASTLE" board incorporating a voice LSI control host CPU.
Data writing function from CASTLE to flash memory on Cinderella board
This function allows S1V30080 ROM data in the micro SD card inserted in the CASTLE board to
be written to the flash memory on the Cinderella board.
Data is written with the Cinderella connected to the CASTLE.
The data written can be accessed as a standalone Cinderella demo or by connecting an external
host CPU.
Cinderella standalone demo function
Evaluation is possible with the standalone Cinderella using the built-in ROM of the S1V30080 or
data in the Cinderella flash memory. Push switches on the Cinderella are used for selecting audio
and starting and stopping playback with the S1V30080 in standalone mode.
With this function, the host interface mode written in the data must be either "Standalone 1" or
"Standalone 2."
External host CPU connection function
This function connects the Cinderella board to the host CPU board used by the customer.
This allows debugging of the voice LSI control program using the built-in ROM of the S1V30080
or data in the Cinderella flash memory.
With this function, the host interface mode written in the data may be "SPI (clock synchronized
serial)," "I2C," "Standalone 1" or "Standalone 2."

1. Introduction
2EPSON S1V30080 Series Evaluation Board User’s Guide
(Rev. 1.00)
1.2 Cinderella board series configuration
The Cinderella boards are configured as shown below.
Table 1.1 Cinderella board series configuration
Board model number S5U1V30080D00A1 S5U1V30080D00A3
S1V30080 model number S1V30080F00A300 S1V30080F00A300
Built-in ROM data Japanese voice
data
Japanese voice
data
Interface mode when initialized by
built-in ROM
I2C I2C
Default data in external flash memory Non-Japanese
voice data
Japanese voice
data
Interface mode when initialized by
external flash memory (default)
Standalone 2 Standalone 2
Note For details of the default data contained in the ROM and flash memory, refer to the
S5U1V30080D00A1 Data List or S5U1V30080D00A3 Data List provided separately.
1.3 User guide overview
This user guide is arranged as follows.
Section 2 describes the preparations before use, the names and functions of the items included with
the evaluation kit as preparation for use.
Section 3 describes how to use the evaluation kit.
Section 4 describes precautions when using the evaluation kit.
Section 5 includes the evaluation kit circuit diagrams.

2. Before Starting
S1V30080 Series Evaluation Board User’s Guide EPSON 3
(Rev. 1.00)
2. Before Starting
This section describes the names and functions of the items included with the evaluation kit as preparation
for use.
2.1 Items provided
1) Cinderella (S1V30080 voice LSI evaluation board) ×1
2) Customer's host CPU interface cable (for connecting to CON3) ×1
3) Speaker cable ×1
4) CASTLE (host CPU board for voice LSI control) ×1
5) micro SD card ×1
6) micro SD card USB adapter ×1
7) Evaluation board USB power supply cable ×1
8) Cinderella – CASTLE connector cable (Note 1) ×1
9) Item list and sheet describing voice LSI web page ×1
Figure 2.1
Figure 2.2
Figure 2.3
Note Items 2), 3), 5), 6), 7), and 8) may differ from
those shown in the photographs here.
Note 1 Used for S1V30080 demo with the CASTLE, and not within the scope of this document.
4)
5)
6)
7)
1)
2)
3)
8)

2. Before Starting
4EPSON S1V30080 Series Evaluation Board User’s Guide
(Rev. 1.00)
2.2 Cinderella (S1V30080 voice LSI evaluation board)
2.2.1 Part names and functions
Figures 2.4 and 2.5 illustrate the main parts of the Cinderella board.
Figure 2.4 Cinderella board obverse side Figure 2.5 Cinderella board reverse side
Connectors
1) Flash memory write connector CON1 (Slave)
This is used to write ROM data to the flash memory on the Cinderella by connecting to
CON1 on the CASTLE.
The CON1 pin layout is shown in Table 2.1.
Table 2.1 Cinderella CON1
connector No. I/O Cinderella CON1 CASTLE CON1 signal level
1 - - VDD1 (+5 V) -
2 - - VDD2 (+3.3 V) -
3 - - VDD3 (+1.8 V) -
4 - - CLOCK_OUT -
5 - - NRESET -
6 I SCKS_FLASH SCKM 3.3 V LVCMOS
7 I SIS_FLASH SOM 3.3 V LVCMOS
8 O SOS_FLASH SIM 3.3 V LVCMOS
9 I NSCSM_FLASH NSCSM 3.3 V LVCMOS
10 - - MSGRDY -
11 - - STBYEXIT -
12 - - MUTE -
13 P VSS VSS -
14 P VSS VSS -
15 P VSS VSS -
CON1
16 P VSS VSS -
1) 2)
3)
4)
5)
12)
13)
16)
15)
6)
7)
8) 9)
10)
11)
14)
17)
18)

2. Before Starting
S1V30080 Series Evaluation Board User’s Guide EPSON 5
(Rev. 1.00)
2) Host interface connector CON2 (Slave)
This is used for controlling the S1V30080 on the Cinderella via the host CPU. Messages
can be sent to the S1V30080 from the host CPU via the I2C, Standalone 1, or Standalone 2
interface.
It should be connected to CON2 on the CASTLE, and this also allows interfacing via I2C.
A 3.3 V system power supply is also fed from the CASTLE via VDD2 (+3.3 V) at the
same time.
The CON2 pin layout is shown in Table 2.2.
Table 2.2 Cinderella CON2
connector No. I/O Cinderella CON2 Castle CON2 signal level
1 P - (None) VDD1 (+5 V) -
2 P VDD VDD2 (+3.3 V) -
3 P - VDD3 (+1.8 V) -
4 I SCLK GPIO0 3.0-5.5 V CMOS
5 IO SDA GPIO1 3.0-5.5 V CMOS
6 I SET_PLAY0 GPIO2 3.0-5.5 V CMOS
7 I SET_PLAY1 GPIO3 3.0-5.5 V CMOS
8 I SET_PLAY2 GPIO4 3.0-5.5 V CMOS
9 I SET_PLAY3 GPIO5 3.0-5.5 V CMOS
10 O MSG_RECEIVE GPIO6 3.0-5.5 V CMOS
11 O SOUND_PLAYING GPIO7 3.0-5.5 V CMOS
12 I SYSTEM_EN GPIO8 3.0-5.5 V CMOS
13 P VSS VSS -
14 P VSS VSS -
15 P VSS VSS -
CON2
16 P VSS VSS -
Note Details of how to control the S1V30080 on the Cinderella board using CASTLE are
not included in this document. Contact Seiko Epson for more information.

2. Before Starting
6EPSON S1V30080 Series Evaluation Board User’s Guide
(Rev. 1.00)
3) Host interface connector CON3 (Slave)
This is used for controlling the S1V30080 on the Cinderella by the host CPU. Messages
can be sent to the S1V30080 from the host CPU via the SPI, I2C, clock synchronized serial,
Standalone 1, or Standalone 2 interface.
The CON3 pin layout is shown in Table 2.3.
Table 2.3 Cinderella CON3
connector No. I/O Cinderella CON3 External host CPU signal level
1 P VDD VDD -
2 I SYSTEM_EN SYSTEM_EN 3.0-5.5 V CMOS
3 I SCKS/SCLK/SET_PLAY[1] SCKM 3.0-5.5 V CMOS
4 IO SIS/SDA/SET_PLAY[0] SOM 3.0-5.5 V CMOS
5 IO SOS/-/SET_PLAY[2] SIM 3.0-5.5 V CMOS
6 IO MSG_RECEIVE/SET_PLAY[3] MSG_RECEIVE 3.0-5.5 V CMOS
7 O SOUND_PLAYING SOUND_PLAYING 3.0-5.5 V CMOS
CON3
8 P VSS VSS -
4) Mini-USB power supply connector CON6
This provides a single 5 V DC power supply from USB connector J7 on the Cinderella
board.
* Do not provide power from this connector when VDD is fed from J1 or J3 on the
Cinderella board. This will short-circuit the power supply, possibly resulting in damage.
5) Voice output connector CON5
This should be connected using the speaker cable provided.

2. Before Starting
S1V30080 Series Evaluation Board User’s Guide EPSON 7
(Rev. 1.00)
Switches
6) DIP switch 1 (SW6)
This DIP switch can be used as an auxiliary for demos in standalone 1 mode with the
Cinderella board on its own. For details, refer to "3.2 Cinderella board standalone demo."
7) DIP switch 2 (SW7)
This DIP switch is used for the various Cinderella board settings.
For details of the DIP switch 2 (SW7) functions, refer to Table 2.4.
For DIP switch definitions, refer to "4.1 DIP switch definitions."
Table 2.4 Cinderella SW7
SW No. Function Description
SW7-1 S1V30080 internal regulator
control
Off: Normal operation
On: S1V30080 stopped
*Should normally be set to "Off: Normal
operation."
SW7-2 Interface mode lower-order bit
SW7-3 Interface mode higher-order bit
*Controls the 7-segment LED display supporting
interface mode by setting the CPLD interface
mode combining SW7-2 and SW7-3 for
Cinderella standalone demo operation.
For Cinderella standalone demo operation, use in
conjunction with S1V30080 ROM data I/F mode
settings.
For correlation of functions with interface mode,
refer to Table 2.5.
SW7-4 External flash memory access
control
*Selects whether to use data
written to the external flash
memory or S1V30080 internal
ROM data.
Off: External flash memory access
On: S1V30080 internal ROM access
SW7-5 External flash memory write
protection
Off: Permits external flash memory writing
On: Protects external flash memory data
*For details, refer to "3.1 Writing data to Cinderella
board."
SW7-6 Test switch Always use in the On position.
Table 2.5 Cinderella SW7-2/3
SW7-3 SW7-2 Interface mode
ON ON Writing data to Cinderella board
Cinderella + CASTLE demo
Connecting to an external host CPU
OFF ON Cinderella standalone demo Standalone 1
OFF OFF Cinderella standalone demo Standalone 2

2. Before Starting
8EPSON S1V30080 Series Evaluation Board User’s Guide
(Rev. 1.00)
8) Reset switch (SW1)
Push-switch SW1 is used for system resetting the Cinderella board. After turning on the
power or altering the DIP switches, always press SW1 to reset the system, or reset the
system externally via host interface connector J3 or J1.
9) Cinderella standalone demo control push-switches (SW2 to SW5)
Push-switches SW2 to SW5 are used to control the Cinderella standalone demo functions.
For details, refer to "3.2 Cinderella board standalone demo."
10) CPLD and external flash memory power supply selection jumper JP1
Depends on the external power supply voltage.
Refer to Table 2.6.
Table 2.6 Cinderella JP1
Host CPU board voltage JP1
3.0-3.6 (V) Short circuit Pin 1 to 2
3.6-5.5 (V) Short circuit Pin 2 to 3
With CASTLE connected
(3.3 V ±0.3 V)
Short circuit Pin 1 to 2
With power supply from
mini-USB connector CON6
Short circuit Pin 2 to 3
* Avoid short-circuiting pin 1 to 2 with a 5 V power supply, as this will subject the CPLD
and external flash memory to a voltage exceeding the specified ratings and result in
damage.

2. Before Starting
S1V30080 Series Evaluation Board User’s Guide EPSON 9
(Rev. 1.00)
Other main components
11) S1V30080
Incorporates the S1V30080 QFP12-48 package items.
12) S1V30080 external flash memory
Flash memory for storing S1V30080 data. Communication with the S1V30080 uses the
clock-synchronized serial interface.
13) S1V30080 external audio signal amplifier
14) S1V30080 clock generator
This includes a 16.384 MHz crystal oscillator for the S1V30080.
Set the input clock division ratio as appropriate to suit the sampling frequency and DAC bit
width. For details, refer to the S1V30080 Series Hardware Specifications and S1V30080
Series Message Protocol Specifications.
15) 7-segment LED driver CPLD
Drives the 7-segment LED according to the interface mode, and displays the file index
number on the 7-segment LED in "Standalone 1" or "Standalone 2."
16) CPLD and external flash memory step-down regulator
Generates a 3.3 V ±0.3 V power supply voltage for the CPLD and external flash memory
when the external supply voltage is between 3.6 V and 5.5 V.
17) Standalone mode 7-segment LED
Displays the file index number in "Standalone 1" or "Standalone 2."
18) LED indicator
Illuminates when connected to the S1V30080 SOUND_PLAYING and play-back is in
progress.

2. Before Starting
10 EPSON S1V30080 Series Evaluation Board User’s Guide
(Rev. 1.00)
2.2.2 Cinderella block diagram
Figure 2.6 illustrates the Cinderella block diagram.
Figure 2.6 Cinderella block diagram
VREG
USB
+5.0V
+3.3V
DIP SW
4
Push SW RESET
S1V30080
GND
SCKS
SIS
SOS
SCLK
SDA
SET_PLAY0
VSS
MSG_RECEIVE
VSS
SET_PLAY1
SET_PLAY2
SET_PLAY3
SOUND_PLAYING
SYSTEM_EN
VDD
SCKS SIS SOS
NSCSS
VSS
VDD
MSG_RECEIVE
SOUND_PLAYING
SYSTEM_EN
CPLD
GND
LED
SERIAL
FLASH Memory
GND
10
10
7
セグメント
LED
CON3
CON2
CON1
JP1
7-segment
LED

2. Before Starting
S1V30080 Series Evaluation Board User’s Guide EPSON 11
(Rev. 1.00)
2.3 CASTLE board
The CASTLE board can be used for writing ROM data to the Cinderella board flash memory.
The CASTLE can also be used to control the S1V30080 on the Cinderella board. Details of how to
control the S1V30080 on the Cinderella board using the host CPU on the CASTLE are not included
in this document. Contact Seiko Epson for more information.
2.3.1 CASTLE Part names and functions
Figure 2.7 CASTLE board obverse side
Figure 2.8 CASTLE board reverse side
3)
4)
5)
10)
1)
3) 4)
6)
8)
9)
11)
12)
2)
7)

2. Before Starting
12 EPSON S1V30080 Series Evaluation Board User’s Guide
(Rev. 1.00)
The main components of the CASTLE board shown in Figures 2.7 and 2.8 are described below.
Connectors
1) Host interface connector CON1 (Master)
This is connected to J4 on the Cinderella board and is used when writing ROM data to the
flash memory on the Cinderella board.
The CON1 pin layout is shown in Table 2.7.
Table 2.7 CASTLE CON1
connector No. I/O CASTLE CON1 Cinderella J11 signal level
1 - VDD1 (+5 V) - -
2 - VDD2 (+3.3 V) - -
3 - VDD3 (+1.8 V) - -
4 - CLOCK_OUT - -
5 - NRESET - -
6 O SCKM SCKS_FLASH 3.3 V LVCMOS
7 O SOM SIS_FLASH 3.3 V LVCMOS
8 I SIM SOS_FLASH 3.3 V LVCMOS
9 O NSCSM NSCSM_FLASH 3.3 V LVCMOS
10 - MSGRDY - -
11 - STBYEXIT - -
12 - MUTE - -
13 P VSS VSS -
14 P VSS VSS -
15 P VSS VSS -
CON1
16 P VSS VSS -

2. Before Starting
S1V30080 Series Evaluation Board User’s Guide EPSON 13
(Rev. 1.00)
2) Host interface connector CON2 (Master)
This is connected to CON2 on the Cinderella board and is used for controlling the
S1V30080 on the Cinderella board.
Messages can be sent to the S1V30080 from the voice LSI control S1C33E07 via the I2C,
Standalone 1, or Standalone 2 interface.
The CON2 pin layout is shown in Table 2.8.
Table 2.8 CASTLE CON2
connector No. I/O CASTLE Cinderella signal level
1 P VDD1 (+5 V) - -
2 P VDD2 (+3.3 V) VDD -
3 P VDD3 (+1.8 V) - -
4 O SCLK SCLK 3.3 V CMOS
5 O SDA SDA 3.3 V CMOS
6 O SET_PLAY0 SET_PLAY0 3.3 V CMOS
7 O SET_PLAY1 SET_PLAY1 3.3 V CMOS
8 O SET_PLAY2 SET_PLAY2 3.3 V CMOS
9 O SET_PLAY3 SET_PLAY3 3.3 V CMOS
10 I MSG_RECEIVE MSG_RECEIVE 3.3 V CMOS
11 I SOUND_PLAYING SOUND_PLAYING 3.3 V CMOS
12 O SYSTEM_EN SYSTEM_EN 3.3 V CMOS
13 P VSS VSS -
14 P VSS VSS -
15 P VSS VSS -
CON2
16 P VSS VSS -
3) Mini-USB power supply connector
This provides a single 5 V DC power supply from USB connector J3 on the CASTLE
board.
When connected to the Cinderella board, power is fed from the CASTLE board to the
Cinderella board via host interface connector CON2 VDD2 pin.
4) ROM data storage micro SD connector
For inserting a micro SD card containing ROM data.
The CASTLE transfers to the flash memory on the Cinderella board via CON1 in
accordance with the voice data stored.
5) S1C33E07 debugging ICD interface connector
Used for voice LSI control S1C33E07 debugging. The S1C33E07 program is written in the
flash/SRAM multi-chip memory.
Do not use this connector.

2. Before Starting
14 EPSON S1V30080 Series Evaluation Board User’s Guide
(Rev. 1.00)
Switches
6) DIP switch (SW1)
The settings of this DIP switch are used to select the CASTLE board function.
7) Reset switch (SW6)
Push-switch SW6 is used for system resetting the CASTLE board. After turning on the
power or altering the DIP switches, always press SW6 to reset the system.
8) CASTLE control push-switches (SW2 to SW5)
Push-switches SW2 to SW5 are used to control the CASTLE.
9) S1C33E07 external memory selection jumper pin
Check that JP1 is set to the default setting as shown in Table 2.9.
Table 2.9 JP1 setting
JP1 setting Remarks
Short circuit Pin 1 to 3, Pin 2 to 4 Default

2. Before Starting
S1V30080 Series Evaluation Board User’s Guide EPSON 15
(Rev. 1.00)
Other main components
10) Voice LSI control S1C33E07
32-bit RISC controller
11) Flash/SRAM multi-chip memory
S1C33E07 external memory
12) LED indicators (LED1 to LED6)
The LEDs illuminate according to the operating status. Table 2.10 shows the LED
indication patterns for the corresponding operating status, and Table 2.11 shows the error
indication patterns.
Table 2.10 LED indication patterns
LED6 LED5 LED4 LED3 LED2 LED1 Description
Flashing Flashing Flashing Flashing Flashing Flashing When power is turned on (flashes repeatedly 3 times)
Off Off Off On Off On Cinderella board data writing mode
On On On On On On Cinderella board data writing complete
Table 2.11 Error indication patterns
LED6 LED5 LED4 LED3 LED2 LED1 Description
On Off Off Off Off Flashing SD card format error
Off Off On On Off Flashing Data transfer error
Off On On On Off Flashing Memory capacity overload
Off Off Off Off Off Off Communication error

2. Before Starting
16 EPSON S1V30080 Series Evaluation Board User’s Guide
(Rev. 1.00)
2.3.2 CASTLE block diagram
Figure 2.9 illustrates the CASTLE board block diagram.
Figure 2.9 CASTLE board block diagram
S1C33E07
VREG
USB
+5.0V
2
+3.3V
ICD I/F
6
14.7456MHz
32.768kHz
VREG +1.8V
SST
Flash / SRAM
21
16
+3.3V
FET
7
microSD I/F
8
+3.3V
FET
Buf.
OE
6
DIP SW
4
Push SW
RESET
GND
VDD2
VDD3
NRESET
SCKM
SOM
SIM
NSCSM
MSGRDY
STBYEXIT
CLOCK_OUT
GPIO0
GPIO1
GPIO2
GPIO3
VSS
6
GND
LED
VDD1
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
GPIO9

2. Before Starting
S1V30080 Series Evaluation Board User’s Guide EPSON 17
(Rev. 1.00)
2.4 Cinderella and CASTLE connection
This section explains how to connect the CASTLE board to the Cinderella board. Insert CON1 and
CON2 on the Cinderella board into CON1 and CON2 on the CASTLE board. (Connections are
unidirectional.) Figure 2.10 shows the Cinderella and CASTLE boards connected.
Figure 2.10