Espressif Systems ESP32-S3 Instruction Manual

ESP32-S3
Hardware Design Guidelines
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Espressif Systems
Dec 25, 2023

Table of contents
Table of contents i
1 About This Document 3
1.1 Introduction .............................................. 3
1.2 Latest Version of This Document ................................... 3
2 Product Overview 5
3 Schematic Checklist 7
3.1 Power Supply ............................................. 9
3.1.1 Digital Power Supply .................................... 9
3.1.2 Analog Power Supply .................................... 9
3.1.3 RTC Power Supply ..................................... 11
3.2 Chip Power-up and Reset Timing .................................. 11
3.3 Flash and PSRAM .......................................... 13
3.3.1 In-Package Flash and PSRAM ............................... 13
3.3.2 O󰝗-Package Flash and PSRAM ............................... 14
3.4 Clock Source ............................................. 14
3.4.1 External Crystal Clock Source (Compulsory) ........................ 14
3.4.2 RTC Clock Source (Optional) ................................ 15
3.5 RF .................................................. 16
3.5.1 RF Circuit .......................................... 16
3.5.2 RF Tuning .......................................... 16
3.6 UART ................................................ 18
3.7 Strapping Pins ............................................ 18
3.8 GPIO ................................................. 19
3.9 ADC ................................................. 22
3.10 SDIO ................................................. 22
3.11 USB .................................................. 22
3.12 Touch Sensor ............................................. 23
4 PCB Layout Design 25
4.1 General Principles of PCB Layout .................................. 25
4.2 Positioning a Module on a Base Board ................................ 26
4.3 Power Supply ............................................. 28
4.3.1 General Guidelines ..................................... 28
4.3.2 3.3 V Power Layout ..................................... 28
4.3.3 Analog Power Layout .................................... 29
4.4 Crystal ................................................ 29
4.5 RF .................................................. 31
4.6 Flash and PSRAM .......................................... 31
4.7 UART ................................................ 33
4.8 USB .................................................. 34
4.9 SDIO ................................................. 34
4.10 Touch Sensor ............................................. 34
4.10.1 Electrode Pattern ...................................... 35
4.10.2 PCB Layout ......................................... 35
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4.10.3 Waterproof and Proximity Sensing Design ......................... 36
4.11 Typical Layout Problems and Solutions ................................ 36
4.11.1 1. The voltage ripple is not large, but the TX performance of RF is rather poor. . . . . . . 36
4.11.2 2. When ESP32-S3 sends data packages, the voltage ripple is small, but RF TX perfor-
mance is poor. ........................................ 37
4.11.3 3. When ESP32-S3 sends data packages, the power value is much higher or lower than the
target power value, and the EVM is relatively poor. ..................... 37
4.11.4 4. TX performance is not bad, but the RX sensitivity is low. ................ 38
5 Hardware Development 39
5.1 ESP32-S3 Modules .......................................... 39
5.2 ESP32-S3 Development Boards ................................... 39
5.3 Download Guidelines ......................................... 39
6 Related Documentation and Resources 41
7 Glossary 43
8 Revision History 45
8.1 ESP Hardware Design Guidelines v1.0 ................................ 45
9 Disclaimer and Copyright Notice 47
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Table of contents
This document provides guidelines for the ESP32-S3 SoC.
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Table of contents
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Chapter 1
About This Document
1.1 Introduction
The hardware design guidelines advise on how to integrate ESP32-S3 into a product. These guidelines will help to
achieve optimal performance of your product, ensuring technical accuracy and adherence to Espressif’s standards.
The guidelines are intended for hardware and application engineers.
The document assumes that you possess a certain level of familiarity with the ESP32-S3 SoC. In case you lack prior
knowledge, we recommend utilizing this document in conjunction with the ESP32-S3 Series Datasheet.
1.2 Latest Version of This Document
Check the link to make sure that you use the latest version of this document: https://docs.espressif.com/projects/
esp-hardware-design-guidelines/en/latest/esp32s3/index.html
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Chapter 1. About This Document
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Chapter 2
Product Overview
ESP32-S3 is a system on a chip that integrates the following features:
• Wi-Fi (2.4 GHz band)
• Bluetooth® 5 (LE)
• Dual high-performance Xtensa® 32-bit LX7 CPU cores
• Ultra Low Power coprocessor running either RISC-V or FSM core
• Multiple peripherals
• Built-in security hardware
• USB OTG interface
• USB Serial/JTAG Controller
Powered by 40 nm technology, ESP32-S3 provides a robust, highly-integrated platform, which helps meet the con-
tinuous demands for e󰝚cient power usage, compact design, security, high performance, and reliability. Typical
application scenarios for ESP32-S3 include:
• Smart Home
• Industrial Automation
• Health Care
• Consumer Electronics
• Smart Agriculture
• POS Machines
• Service Robot
• Audio Devices
• Generic Low-power IoT Sensor Hubs
• Generic Low-power IoT Data Loggers
• Cameras for Video Streaming
• USB Devices
• Speech Recognition
• Image Recognition
• Wi-Fi + Bluetooth Networking Card
• Touch and Proximity Sensing
For more information about ESP32-S3, please refer to ESP32-S3 Series Datasheet.
Note: Unless otherwise speci󰝘ed, “ESP32-S3”used in this document refers to the series of chips, instead of a
speci󰝘c chip variant.
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Chapter 2. Product Overview
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Chapter 3
Schematic Checklist
The integrated circuitry of ESP32-S3 requires only 20 electrical components (resistors, capacitors, and inductors)
and a crystal, as well as an SPI 󰝙ash. The high integration of ESP32-S3 allows for simple peripheral circuit design.
This chapter details the schematic design of ESP32-S3.
The following 󰝘gure shows a reference schematic design of ESP32-S3. It can be used as the basis of your schematic
design.
Fig. 1: ESP32-S3 Reference Schematic
Note that Figure ESP32-S3 Reference Schematic shows the connection for 3.3 V, quad, o󰝗-package SPI 󰝙ash/PSRAM.
• In cases where 1.8 V or 3.3 V, octal, in-package or o󰝗-package SPI 󰝙ash/PSRAM is used, GPIO33 ~ GPIO37
are occupied and cannot be used for other functions.
• If an in-package SPI 󰝙ash/PSRAM is utilized, where VDD_SPI is set at either 1.8 V or 3.3 V, GPIO45 will no
longer have any impact. In these scenarios, the presence of R1 is optional. However, in all other cases, refer to
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