Espressif Systems ESP32 Series Instruction Manual

ESP32
Hardware Design Guidelines
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Dec 25, 2023

Table of contents
Table of contents i
1 About This Document 3
1.1 Introduction .............................................. 3
1.2 Latest Version of This Document ................................... 3
2 Product Overview 5
3 Schematic Checklist 7
3.1 Power Supply ............................................. 8
3.1.1 Digital Power Supply .................................... 8
3.1.2 Analog Power Supply .................................... 9
3.1.3 RTC Power Supply ..................................... 11
3.2 Chip Power-up and Reset Timing .................................. 11
3.3 Flash and PSRAM .......................................... 12
3.3.1 In-Package Flash and PSRAM ............................... 12
3.3.2 O󰝗-Package Flash and PSRAM ............................... 13
3.4 Clock Source ............................................. 13
3.4.1 External Crystal Clock Source (Compulsory) ........................ 13
3.4.2 RTC Clock Source (Optional) ................................ 14
3.5 RF .................................................. 15
3.5.1 RF Circuit .......................................... 15
3.5.2 RF Tuning .......................................... 16
3.6 UART ................................................ 16
3.7 Strapping Pins ............................................ 17
3.8 GPIO ................................................. 18
3.9 ADC ................................................. 19
3.10 External Capacitor .......................................... 19
3.11 SDIO ................................................. 20
3.12 Touch Sensor ............................................. 20
4 PCB Layout Design 21
4.1 General Principles of PCB Layout .................................. 21
4.2 Positioning a Module on a Base Board ................................ 22
4.3 Power Supply ............................................. 23
4.3.1 General Guidelines ..................................... 23
4.3.2 3.3 V Power Layout ..................................... 24
4.3.3 Analog Power Layout .................................... 24
4.3.4 Two-layer PCB Design ................................... 24
4.4 Crystal ................................................ 24
4.5 RF .................................................. 26
4.5.1 RF Layout on Four-layer PCB ................................ 26
4.5.2 RF Layout on Two-layer PCB ................................ 28
4.6 Flash and PSRAM .......................................... 28
4.7 External RC .............................................. 28
4.8 UART ................................................ 29
4.9 SDIO ................................................. 29
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4.10 Touch Sensor ............................................. 30
4.10.1 Electrode Pattern ...................................... 30
4.10.2 PCB Layout ......................................... 30
4.11 Typical Layout Problems and Solutions ................................ 32
4.11.1 1. The voltage ripple is not large, but the TX performance of RF is rather poor. . . . . . . 32
4.11.2 2. When ESP32 sends data packages, the voltage ripple is small, but RF TX performance
is poor. ........................................... 32
4.11.3 3. When ESP32 sends data packages, the power value is much higher or lower than the
target power value, and the EVM is relatively poor. ..................... 32
4.11.4 4. TX performance is not bad, but the RX sensitivity is low. ................ 32
5 Hardware Development 33
5.1 ESP32 Modules ............................................ 33
5.2 ESP32 Development Boards ..................................... 33
5.3 Download Guidelines ......................................... 33
6 Related Documentation and Resources 35
7 Glossary 37
8 Revision History 39
8.1 ESP Hardware Design Guidelines v1.0 ................................ 39
9 Disclaimer and Copyright Notice 41
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Table of contents
This document provides guidelines for the ESP32 SoC.
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Table of contents
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Chapter 1
About This Document
1.1 Introduction
The hardware design guidelines advise on how to integrate ESP32 into a product. These guidelines will help to
achieve optimal performance of your product, ensuring technical accuracy and adherence to Espressif’s standards.
The guidelines are intended for hardware and application engineers.
The document assumes that you possess a certain level of familiarity with the ESP32 SoC. In case you lack prior
knowledge, we recommend utilizing this document in conjunction with the ESP32 Series Datasheet.
1.2 Latest Version of This Document
Check the link to make sure that you use the latest version of this document: https://docs.espressif.com/projects/
esp-hardware-design-guidelines/en/latest/esp32/index.html
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Chapter 1. About This Document
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Chapter 2
Product Overview
ESP32 is a system on a chip that integrates the following features:
• Wi-Fi (2.4 GHz band)
• Bluetooth®
• Dual high-performance Xtensa® 32-bit LX6 CPU cores
• Ultra Low Power coprocessor
• Multiple peripherals
Powered by 40 nm technology, ESP32 provides a robust, highly-integrated platform, which helps meet the continuous
demands for e󰝚cient power usage, compact design, security, high performance, and reliability. Typical application
scenarios for ESP32 include:
• Smart Home
• Industrial Automation
• Health Care
• Consumer Electronics
• Smart Agriculture
• POS Machines
• Service Robot
• Audio Devices
• Generic Low-power IoT Sensor Hubs
• Generic Low-power IoT Data Loggers
• Cameras for Video Streaming
• Speech Recognition
• Image Recognition
• SDIO Wi-Fi + Bluetooth Networking Card
• Touch and Proximity Sensing
For more information about ESP32, please refer to ESP32 Series Datasheet.
Note: Unless otherwise speci󰝘ed,“ESP32”used in this document refers to the series of chips, instead of a speci󰝘c
chip variant.
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Chapter 2. Product Overview
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Chapter 3
Schematic Checklist
The integrated circuitry of ESP32 requires only 20 electrical components (resistors, capacitors, and inductors) and
a crystal, as well as an SPI 󰝙ash. The high integration of ESP32 allows for simple peripheral circuit design. This
chapter details the schematic design of ESP32.
The following 󰝘gure shows a reference schematic design of ESP32. It can be used as the basis of your schematic
design.
Fig. 1: ESP32 Reference Schematic
Note that Figure ESP32 Reference Schematic shows the connection for quad 3.3 V external 󰝙ash/PSRAM. PSRAM’
s SCLK and 󰝙ash can share the clock from SD_CLK or GPIO17.
• In cases where quad 1.8 V external 󰝙ash/PSRAM is used, R9 should be populated.
• In cases where ESP32-D0WDR2-V3 with in-package quad 3.3 V PSRAM is used, the external 󰝙ash can be
connected as Figure ESP32 Reference Schematic shows.
• In cases where ESP32-U4WDH with in-package quad 3.3 V 󰝙ash is used, the in-package 󰝙ash is connected as
Figure ESP32 Schematic for Quad 3.3 V In-Package Flash shows.
Any basic ESP32 circuit design may be broken down into the following major building blocks:
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