Espressif Systems ESP32-S2-WROVER User manual

CONFIDENTIAL
ESP32-S2-WROVER
User Manual
Prelease version 0.1
Espressif Systems
Copyright © 2019
www.espressif.com

CONFIDENTIAL
About This Document
This document provides the specifications for the ESP32-S2-WROVER module.
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For revision history of this document, please refer to the last page.
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PROVIDED AS IS WITH NO WARRANTIES WHATSOEVER, INCLUDING ANY WARRANTY OF MERCHANTABIL-
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ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE.
All liability, including liability for infringement of any proprietary rights, relating to use of information in this docu-
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are granted herein. The Wi-Fi Alliance Member logo is a trademark of the Wi-Fi Alliance. The Bluetooth logo is a
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Copyright © 2019 Espressif Inc. All rights reserved.
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1. Module Overview
1. Module Overview
1.1 Features
MCU
• ESP32-S2 embedded, Xtensa®single-core 32-bit
LX7 microprocessor, up to 240 MHz
• 128 KB ROM
• 320 KB SRAM
• 16 KB SRAM in RTC
Wi-Fi
• 802.11 b/g/n
• Bit rate: 802.11n up to 150 Mbps
• A-MPDU and A-MSDU aggregation
• 0.4 µs guard interval support
•Operating frequency range: 2412 ~ 2462 MHz
Hardware
• Interfaces: GPIO, SPI, LCD, UART, I2C, I2S, Cam-
era interface, IR, pulse counter, LED PWM, USB
OTG 1.1, ADC, DAC, touch sensor, temperature
sensor
• 40 MHz crystal oscillator
• 4 MB SPI flash
• 2 MB PSRAM
• Operating voltage/Power supply: 3.0 ~3.6 V
•Operating temperature range: –40 ~ 85 °C
• Dimensions: (18 × 31 × 3.3) mm
Certification
• Green certification: RoHS/REACH
Test
• HTOL/HTSL/uHAST/TCT/ESD
1.2 Description
ESP32-S2-WROVER is a powerful, generic Wi-Fi MCU module that has a rich set of peripherals. This module is
an ideal choice for a wide variety of application scenarios relating to Internet of Things (IoT), wearable electronics
and smart home.
This module is provided in two versions: one with a PCB antenna, the other with an Dipole antenna.
ESP32-S2-WROVER features a 4 MB external SPI flash and an additional 2 MB SPI Pseudo static RAM (PSRAM).
The information in this datasheet is applicable to both modules.
The ordering information on the two variants of ESP32-S2-WROVER is listed as follows:
Table 1: ESP32-S2-WROVER Ordering Information
Module Chip embedded Flash PSRAM Module dimensions (mm)
ESP32-S2-WROVER (PCB) ESP32-S2 4 MB 2 MB (18.00±0.10)×(31.00±0.10)×(3.30±0.10)
ESP32-S2-WROVER-I (Dipole)
Notes:
The module with various capacities of flash or flash is available for custom order.
At the core of this module is ESP32-S2 *, an Xtensa® 32-bit LX7 CPU that operates at up to 240 MHz. The user
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1. Module Overview
can power off the CPU and make use of the low-power co-processor to constantly monitor the peripherals for
changes or crossing of thresholds. ESP32-S2 integrates a rich set of peripherals, ranging from SPI, I²S, UART, I²C,
LED PWM, ADC, DAC, touch sensor, temperature sensor, as well as up to 43 GPIOs. It also includes a full-speed
USB On-The-Go (OTG) interface to enable USB communication.
Note:
* For more information on ESP32-S2, please refer to ESP32-S2 Datasheet.
1.3 Applications
• Generic Low-power IoT Sensor Hub
• Generic Low-power IoT Data Loggers
• Cameras for Video Streaming
• Over-the-top (OTT) Devices
• USB Devices
• Speech Recognition
• Image Recognition
• Mesh Network
• Home Automation
• Smart Home Control Panel
• Smart Building
• Industrial Automation
• Smart Agriculture
• Audio Applications
• Health Care Applications
• Wi-Fi-enabled Toys
• Wearable Electronics
• Retail & Catering Applications
• Smart POS Machines
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LIST OF TABLES
List of Tables
1 ESP32-S2-WROVER Ordering Information 3
2 Pin Definitions 10
3 Strapping Pins 11
4 Absolute Maximum Ratings 13
5 Recommended Operating Conditions 13
6 DC Characteristics (3.3 V, 25 °C) 13
7 Current Consumption Depending on RF Modes 14
8 Current Consumption Depending on Work Modes 14
9 Wi-Fi RF Standards 15
10 Transmitter Characteristics 15
11 Receiver Characteristics 15
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LIST OF FIGURES
List of Figures
1 Block Diagram 8
2 Pin Layout of ESP32-S2-WROVER (Top View) 9
3 ESP32-S2-WROVER Schematics 17
4 ESP32-S2-WROVER Peripheral Schematics 18
5 ESP32-S2-WROVER Physical Dimensions 19
6 Recommended PCB Land Pattern 20
7 Reflow Profile 21
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3. Pin Definitions
3. Pin Definitions
3.1 Pin Layout
PCB Antenna
GND
EN
IO46
IO45
RXD0
TXD0
IO42
IO41
IO40
IO39
IO38
IO37
IO36
IO35
IO34
IO33
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
GND
3V3
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
IO8
IO9
IO10
IO11
IO12
IO13
43 GND
17 18 19
IO14 IO15 IO16
20 21 22
IO17 IO18 IO19
23 24 25
IO20 IO21 IO26
26 GND
Figure 2: Pin Layout of ESP32-S2-WROVER (Top View)
Note:
The pin diagram shows the approximate location of pins on the module. For the actual mechanical diagram, please refer
to Figure 7.1 Physical Dimensions.
3.2 Pin Description
ESP32-S2-WROVER has 42 pins. See pin definitions in Table 2.
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3. Pin Definitions
Table 2: Pin Definitions
Name No. Type Function
GND 1 P Ground
3V3 2 P Power supply
IO0 3 I/O/T RTC_GPIO0, GPIO0
IO1 4 I/O/T RTC_GPIO1, GPIO1, TOUCH1, ADC1_CH0
IO2 5 I/O/T RTC_GPIO2, GPIO2, TOUCH2, ADC1_CH1
IO3 6 I/O/T RTC_GPIO3, GPIO3, TOUCH3, ADC1_CH2
IO4 7 I/O/T RTC_GPIO4, GPIO4, TOUCH4, ADC1_CH3
IO5 8 I/O/T RTC_GPIO5, GPIO5, TOUCH5, ADC1_CH4
IO6 9 I/O/T RTC_GPIO6, GPIO6, TOUCH6, ADC1_CH5
IO7 10 I/O/T RTC_GPIO7, GPIO7, TOUCH7, ADC1_CH6
IO8 11 I/O/T RTC_GPIO8, GPIO8, TOUCH8, ADC1_CH7
IO9 12 I/O/T RTC_GPIO9, GPIO9, TOUCH9, ADC1_CH8, FSPIHD
IO10 13 I/O/T RTC_GPIO10, GPIO10, TOUCH10, ADC1_CH9, FSPICS0, FSPIIO4
IO11 14 I/O/T RTC_GPIO11, GPIO11, TOUCH11, ADC2_CH0, FSPID, FSPIIO5
IO12 15 I/O/T RTC_GPIO12, GPIO12, TOUCH12, ADC2_CH1, FSPICLK, FSPIIO6
IO13 16 I/O/T RTC_GPIO13, GPIO13, TOUCH13, ADC2_CH2, FSPIQ, FSPIIO7
IO14 17 I/O/T RTC_GPIO14, GPIO14, TOUCH14, ADC2_CH3, FSPIWP, FSPIDQS
IO15 18 I/O/T RTC_GPIO15, GPIO15, U0RTS, ADC2_CH4, XTAL_32K_P
IO16 19 I/O/T RTC_GPIO16, GPIO16, U0CTS, ADC2_CH5, XTAL_32K_N
IO17 20 I/O/T RTC_GPIO17, GPIO17, U1TXD, ADC2_CH6, DAC_1
IO18 21 I/O/T RTC_GPIO18, GPIO18, U1RXD, ADC2_CH7, DAC_2, CLK_OUT3
IO19 22 I/O/T RTC_GPIO19, GPIO19, U1RTS, ADC2_CH8, CLK_OUT2, USB_D-
IO20 23 I/O/T RTC_GPIO20, GPIO20, U1CTS, ADC2_CH9, CLK_OUT1, USB_D+
IO21 24 I/O/T RTC_GPIO21, GPIO21
IO26 25 I/O/T SPICS1, GPIO26
GND 26 P Ground
IO33 27 I/O/T SPIIO4, GPIO33, FSPIHD
IO34 28 I/O/T SPIIO5, GPIO34, FSPICS0
IO35 29 I/O/T SPIIO6, GPIO35, FSPID
IO36 30 I/O/T SPIIO7, GPIO36, FSPICLK
IO37 31 I/O/T SPIDQS, GPIO37, FSPIQ
IO38 32 I/O/T GPIO38, FSPIWP
IO39 33 I/O/T MTCK, GPIO39, CLK_OUT3
IO40 34 I/O/T MTDO, GPIO40, CLK_OUT2
IO41 35 I/O/T MTDI, GPIO41, CLK_OUT1
IO42 36 I/O/T MTMS, GPIO42
TXD0 37 I/O/T U0TXD, GPIO43, CLK_OUT1
RXD0 38 I/O/T U0RXD, GPIO44, CLK_OUT2
IO45 39 I/O/T GPIO45
IO46 40 I GPIO46
EN 41 I
High: on, enables the chip.
Low: off, the chip powers off.
Note: Do not leave the EN pin floating.
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3. Pin Definitions
Name No. Type Function
GND 42 P Ground
Notice:
• By default, IO26 is connected to the CS side of the PSRAM. If PSRAM is not a must, IO26 can be used as a regular
GPIO.
• For peripheral pin configurations, please refer to ESP32-S2 Datasheet.
3.3 Strapping Pins
ESP32-S2 has three strapping pins: GPIO0, GPIO45, GPIO46. The pin-pin mapping between ESP32-S2 and the
module is as follows, which can be seen in Chapter 5Schematics:
• GPIO0 = IO0
• GPIO45 = IO45
• GPIO46 = IO46
Software can read the values of corresponding bits from register ”GPIO_STRAPPING”.
During the chip’s system reset (power-on-reset, RTC watchdog reset, brownout reset, analog super watchdog
reset, and crystal clock glitch detection reset), the latches of the strapping pins sample the voltage level as strapping
bits of ”0” or ”1”, and hold these bits until the chip is powered down or shut down.
IO0, IO45 and IO46 are connected to the internal pull-up/pull-down. If they are unconnected or the connected
external circuit is high-impedance, the internal weak pull-up/pull-down will determine the default input level of these
strapping pins.
To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or use the host
MCU’s GPIOs to control the voltage level of these pins when powering on ESP32-S2.
After reset, the strapping pins work as normal-function pins.
Refer to Table 3for a detailed boot-mode configuration of the strapping pins.
Table 3: Strapping Pins
VDD_SPI Voltage 1
Pin Default 3.3 V 1.8 V
IO45 2Pull-down 0 1
Booting Mode
Pin Default SPI Boot Download Boot
IO0 Pull-up 1 0
IO46 Pull-down Don’t-care 0
Enabling/Disabling ROM Code Print During Booting 3 4
Pin Default Enabled Disabled
IO46 Pull-down See the fourth note See the fourth note
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3. Pin Definitions
Note:
1. Firmware can configure register bits to change the settings of ”VDD_SDIO Voltage”.
2. Internal pull-up resistor (R1) for IO45 is not populated in the module, as the flash and SRAM in ESP32-S2-WROVER
work at 3.3 V by default (output by VDD_SPI). Please make sure IO45 will not be pulled high when the module is
powered up by external circuit.
3. ROM code can be printed over TXD0 (by default) or DAC_1 (IO17), depending on the eFuse bit.
4. When eFuse UART_PRINT_CONTROL value is:
0, print is normal during boot and not controlled by IO46.
1 and IO46 is 0, print is normal during boot; but if IO46 is 1, print is disabled.
2 and IO46 is 0, print is disabled; but if IO46 is 1, print is normal.
3, print is disabled and not controlled by IO46.
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