Holtek BS83A02L User manual

Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Revision: V1.10 Date: March 02, 2020

Rev. 1.10 2 March 02, 2020 Rev. 1.10 3 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
Table of Contents
Features – BS83A02L ........................................................................................... 6
CPU Features ...............................................................................................................................6
Peripheral Features.......................................................................................................................6
Features – BS83B04L ........................................................................................... 6
CPU Features ...............................................................................................................................6
Peripheral Features.......................................................................................................................7
General Description.............................................................................................. 7
Selection Table...................................................................................................... 8
Block Diagram....................................................................................................... 8
Pin Assignment..................................................................................................... 9
Pin Descriptions ................................................................................................. 10
Absolute Maximum Ratings............................................................................... 12
D.C. Electrical Characteristics........................................................................... 12
Operating Voltage Characteristics...............................................................................................12
Operating Current Characteristics...............................................................................................12
Standby Current Characteristics .................................................................................................13
A.C. Characteristics............................................................................................ 14
High Speed Internal Oscillator – HIRC – Frequency Accuracy ...................................................14
Low Speed Internal Oscillator Characteristics – LIRC ................................................................15
Operating Frequency Characteristic Curves ...............................................................................15
System Start Up Time Characteristics ........................................................................................15
Input/Output Characteristics ............................................................................. 16
Memory Characteristics ..................................................................................... 17
LVR Electrical Characteristics........................................................................... 17
Power-on Reset Characteristics........................................................................ 17
System Architecture........................................................................................... 18
Clocking and Pipelining...............................................................................................................18
Program Counter.........................................................................................................................19
Stack ...........................................................................................................................................19
Arithmetic and Logic Unit – ALU .................................................................................................20
Flash Program Memory...................................................................................... 20
Structure......................................................................................................................................20
Special Vectors ...........................................................................................................................21
Look-up Table..............................................................................................................................21
Table Program Example..............................................................................................................21
In Circuit Programming – ICP .....................................................................................................22
On-Chip Debug Support – OCDS ...............................................................................................23
Data Memory ....................................................................................................... 24
Structure......................................................................................................................................24

Rev. 1.10 2 March 02, 2020 Rev. 1.10 3 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
General Purpose Data Memory ..................................................................................................25
Special Purpose Data Memory ...................................................................................................25
Special Function Register Description............................................................. 28
Indirect Addressing Registers – IAR0, IAR1 ...............................................................................28
Memory Pointers – MP0, MP1 ....................................................................................................28
Bank Pointer – BP.......................................................................................................................29
Accumulator – ACC.....................................................................................................................29
Program Counter Low Register – PCL........................................................................................29
Look-up Table Registers – TBLP, TBHP, TBLH...........................................................................29
Status Register – STATUS..........................................................................................................30
EEPROM Data Memory – BS83B04L................................................................. 31
EEPROM Data Memory Structure ..............................................................................................31
EEPROM Registers ....................................................................................................................31
Reading Data from the EEPROM ...............................................................................................33
Writing Data to the EEPROM......................................................................................................33
Write Protection...........................................................................................................................33
EEPROM Interrupt ......................................................................................................................33
Programming Considerations......................................................................................................34
Oscillators ........................................................................................................... 35
Oscillator Overview .....................................................................................................................35
System Clock Congurations......................................................................................................35
Internal High Speed RC Oscillator – HIRC .................................................................................36
Internal 2kHz Oscillator – LIRC...................................................................................................36
Operating Modes and System Clocks .............................................................. 37
System Clocks ............................................................................................................................37
System Operation Modes............................................................................................................38
Control Registers ........................................................................................................................39
Operating Mode Switching ..........................................................................................................40
Standby Current Considerations .................................................................................................43
Wake-up......................................................................................................................................44
Watchdog Timer.................................................................................................. 45
Watchdog Timer Clock Source....................................................................................................45
Watchdog Timer Control Register ...............................................................................................45
Watchdog Timer Operation .........................................................................................................46
Reset and Initialisation....................................................................................... 47
Reset Functions ..........................................................................................................................47
Reset Initial Conditions ...............................................................................................................51
Input/Output Ports .............................................................................................. 54
Pull-high Resistors ......................................................................................................................54
Port A Wake-up ...........................................................................................................................55
I/O Port Control Registers ...........................................................................................................56
Pin-shared Functions ..................................................................................................................57
I/O Pin Structures........................................................................................................................59
Programming Considerations......................................................................................................59

Rev. 1.10 4 March 02, 2020 Rev. 1.10 5 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
Timer/Event Counter – BS83A02L..................................................................... 60
Timer/Event Counter Input Clock Source....................................................................................60
Timer/Event Counter Registers...................................................................................................60
Timer/Event Counter Operating Modes.......................................................................................62
Programming Considerations......................................................................................................64
Timer Module (TM) – BS83B04L ........................................................................ 65
Introduction .................................................................................................................................65
TM Operation ..............................................................................................................................65
TM Clock Source.........................................................................................................................65
TM Interrupts...............................................................................................................................65
TM External Pins.........................................................................................................................65
Programming Considerations......................................................................................................66
Compact Type (CTM) – BS83B04L .................................................................... 67
Compact TM Operation...............................................................................................................67
Compact Type TM Register Description......................................................................................68
Compact Type TM Operating Modes ..........................................................................................71
Touch Key Function – BS83A02L...................................................................... 77
Touch Key Structure....................................................................................................................77
Touch Key Register Denition.....................................................................................................77
Touch Key Operation...................................................................................................................85
Touch Key Scan Operation Flowchart.........................................................................................88
Touch Key Interrupts ...................................................................................................................90
Programming Considerations......................................................................................................90
Touch Key Function – BS83B04L...................................................................... 91
Touch Key Structure....................................................................................................................91
Touch Key Register Denition.....................................................................................................91
Touch Key Operation...................................................................................................................99
Touch Key Data Memory...........................................................................................................103
Touch Key Scan Operation Flowchart.......................................................................................104
Touch Key Interrupts .................................................................................................................105
Programming Considerations....................................................................................................106
I2C Interface – BS83B04L ................................................................................. 106
I2C Interface Operation..............................................................................................................106
I2C Registers .............................................................................................................................108
I2C Bus Communication ............................................................................................................ 111
I2C Time-out Control.................................................................................................................. 114
Interrupts ........................................................................................................... 116
Interrupt Registers..................................................................................................................... 116
Interrupt Operation ....................................................................................................................120
External Interrupt.......................................................................................................................121
EEPROM Interrupt ....................................................................................................................122
Timer/Event Counter Interrupt...................................................................................................122
I2C Interrupt ...............................................................................................................................122
Time Base Interrupt...................................................................................................................122

Rev. 1.10 4 March 02, 2020 Rev. 1.10 5 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
Multi-function Interrupt ..............................................................................................................124
Touch Key TKRCOV Interrupt ...................................................................................................124
Touch Key Threshold TKTH Interrupt........................................................................................124
TM Interrupt...............................................................................................................................125
Interrupt Wake-up Function.......................................................................................................125
Programming Considerations....................................................................................................125
Conguration Options – BS83B04L................................................................ 126
Application Circuits.......................................................................................... 127
Instruction Set................................................................................................... 128
Introduction ...............................................................................................................................128
Instruction Timing ......................................................................................................................128
Moving and Transferring Data...................................................................................................128
Arithmetic Operations................................................................................................................128
Logical and Rotate Operation ...................................................................................................129
Branches and Control Transfer .................................................................................................129
Bit Operations ...........................................................................................................................129
Table Read Operations .............................................................................................................129
Other Operations.......................................................................................................................129
Instruction Set Summary ................................................................................. 130
Table Conventions.....................................................................................................................130
Instruction Denition........................................................................................ 132
Package Information ........................................................................................ 141
6-pin DFN (2mm×2mm×0.35mm) Outline Dimensions .............................................................142
6-pin DFN (2mm×2mm×0.75mm) Outline Dimensions .............................................................143
6-pin SOT23-6 Outline Dimensions ..........................................................................................144
8-pin SOP (150mil) Outline Dimensions ...................................................................................145
10-pin DFN (3mm×3mm×0.75mm) Outline Dimensions ...........................................................146
10-pin MSOP (118mil) Outline Dimensions...............................................................................147
16-pin NSOP (150mil) Outline Dimensions...............................................................................148

Rev. 1.10 6 March 02, 2020 Rev. 1.10 7 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
Features – BS83A02L
CPU Features
• Operating voltage
♦fSYS=8MHz: 1.8V~5.5V
• Up to 0.5μs instruction cycle with 8MHz system clock at VDD=5V
• Power down and wake-up functions to reduce power consumption
• Oscillator types
♦Internal High Speed 8MHz RC – HIRC
♦Internal Low Speed 2kHz RC – LIRC
• Multi-mode operation: FAST, SLOW, IDLE and SLEEP
• Fully integrated internal oscillators require no external components
• All instructions executed in one or two instruction cycles
• Table read instructions
• 63 powerful instructions
• 2-level subroutine nesting
• Bit manipulation instruction
Peripheral Features
• Flash Program Memory: 1K×14
• RAM Data Memory: 64×8
• 2 touch key functions – fully integrated without requiring external components
• Watchdog Timer function
• 4 bidirectional I/O lines
• Single external interrupt line shared with I/O pin
• Single 8-bit programmable Timer/Event Counter with overow interrupt and prescaler
• Single Time-Base function for generation of xed time interrupt signals
• Low voltage reset function
• Package types: 6-pin DFN/SOT23, 8-pin SOP
Features – BS83B04L
CPU Features
• Operating Voltage
♦fSYS=2MHz: 1.8V~5.5V
♦fSYS=4MHz: 1.8V~5.5V
♦fSYS=8MHz: 1.8V~5.5V
• Up to 0.5μs instruction cycle with 8MHz system clock at VDD=5V
• Power down and wake-up functions to reduce power consumption
• Oscillator types
♦Internal High Speed 2/4/8MHz RC – HIRC
♦Internal Low Speed 2kHz RC – LIRC

Rev. 1.10 6 March 02, 2020 Rev. 1.10 7 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
• Multi-mode operation: FAST, SLOW, IDLE and SLEEP
• Fully integrated internal oscillators require no external components
• All instructions executed in one or two instruction cycles
• Table read instructions
• 63 powerful instructions
• 4-level subroutine nesting
• Bit manipulation instruction
Peripheral Features
• Flash Program Memory: 2K×16
• Data Memory: 128×8
• True EEPROM Memory: 32×8
• 4 touch key functions – fully integrated without requiring external components
• Watchdog Timer function
• 8 bidirectional I/O lines
• Single external interrupt line shared with I/O pin
• Single Timer Module for time measurement, compare match output, PWM output function
• Single Time-Base function for generation of xed time interrupt signals
• I2C interface
• Low voltage reset function
• Package types: 8-pin SOP, 10-pin DFN/MSOP
General Description
The series of devices are Flash Memory type 8-bit high performance RISC architecture
microcontrollers with fully integrated touch key functions. With all touch key functions provided
internally and with the convenience of Flash Memory multi-programming features, each device has
all the features to oer designers a reliable and easy means of implementing Touch Keyes within
their products applications.
The touch key functions are fully integrated completely eliminating the need for external
components. In addition to the flash program memory, other memory includes an area of RAM
Data Memory as well as an area of true EEPROM memory for storage of non-volatile data such
as serial numbers, calibration data etc. Protective features such as an internal Watchdog Timer and
Low Voltage Reset coupled with excellent noise immunity and ESD protection ensure that reliable
operation is maintained in hostile electrical environments.
A full choice of internal high and low speed oscillators is provided including fully integrated
system oscillators which require no external components for its implementation. The ability to
operate and switch dynamically between a range of operating modes using dierent clock sources
gives users the ability to optimise microcontroller operation and minimise power consumption.
Easy communication with the outside world is provided using the internal I2C interface, while the
inclusion of exible I/O programming features, Time-Base function, Timers and many other features
further enhance device functionality and exibility.
The touch key devices will find excellent use in a huge range of modern Touch Key product
applications such as instrumentation, household appliances, electronically controlled tools to name
but a few.

Rev. 1.10 8 March 02, 2020 Rev. 1.10 9 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
Selection Table
Most features are common to all devices and the main features distinguishing them are Oscillator
Types, Memory capacity, I/O count, Touch key count, Time Base, Timers, Interface, Stack and
Package types. The following table summarises the main features of each device.
Device Oscillator Types Program Memory Data Memory True EEPROM I/O External Interrupt
BS83A02L 8MHz HIRC
2kHz LIRC 1K×14 64×8 — 4 1
BS83B04L
2/4/8MHz HIRC
2kHz LIRC 2K×16 128×8 32×8 8 1
Device Time Base Timer Module Timer/Event Counter Touch Key Interface Stack Packages
BS83A02L 1 — 8-bit Timer×1
2 — 2 6DFN/SOT23;
8SOP
BS83B04L 110-bit CTM×1 —
4 I2C×1 48SOP;
10DFN/MSOP
Note: As devices exist in more than one package format, the table reects the situation for the package with the
most pins.
Block Diagram
BS83A02L
Bus
MUX
Reset
Circuit Stack
2-level
RAM
64×8
ROM
1K×14
Watchdog
Timer
Port A
Driver
VDD HIRC
8MHz
LIRC
2kHz
Timer
Pin-Shared
Function PA0~PA3
Clock System
Digital Peripherals
HT8 MCU Core
Time Base
I/O
VSS
Interrupt
Controller
VDD
VSS
INT
Pin- Shared
With Port A
: Pin-Shared Node
LVR
C to F
Circuit
Touch Key Module 0
Touch Key Function
MUX
Pin-Shared
with Port A
KEY1~KEY2
: Bus Entry
BS83B04L
Interrupt
Controller
Bus
MUX
Reset
Circuit
Stack
4-Level
RAM
128×8
ROM
2K×16
Watchdog
Timer
HIRC
2/4/8MHz
LIRC
2kHz
Clock System
HT8 MCU Core
Time Base
Pin-Shared
with Port A
EEPROM
32×8
LVR
Port A
Driver
Pin-Shared
Function PA0~PA7
Timer
Digital Peripherals
I/O
I2C
INT
C to F
Circuit
Touch Key Module 0
Touch Key Function
MUX
Pin-Shared
with Port A
KEY1~KEY4
: Pin-Shared Node : Bus Entry
VDD
VSS
VDD
VSS

Rev. 1.10 8 March 02, 2020 Rev. 1.10 9 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
Pin Assignment
Top View83A02L
6 54
321
VDD
PA3/KEY2
VSS
PA2/TC/ICPCK
PA1/KEY1
BS83A02L
SOT23-6
BS83A02L
6 DFN-B (2×2×0.75mm)
PA0/INT/ICPDA PA2/TC/ICPCK VDD
VSS
PA3/KEY2 PA1/KEY1
BS83A02L
6 DFN-A (2×2×0.35mm)
VSS PA2/TC/ICPCK VDD
PA0/INT/ICPDA
PA3/KEY2 PA1/KEY1
123
654
A0
2L
123
654
2L
1
2
3
4
8
7
6
5
VDD
NC
NC
VSS
BS83A02L
8 SOP-A
PA0/INT/ICPDA
PA2/TC/ICPCK
PA3/KEY2
PA1/KEY1
PA5/KEY1 VDD
PA1/KEY2
PA3/KEY3 PA2/CTPB/SDA/ICPCK
PA0/CTCK/INT/SCL/ICPDA
VSS
PA4/KEY4
BS83B04L
8 SOP-A
1
2
3
4
8
7
6
5
BS83B04L
10 MSOP-A/DFN-A
10
9
8
7
6
1
2
3
4
5
VDD
PA5/KEY1
PA1/KEY2
PA3/KEY3
PA4/KEY4
VSS
PA2/CTPB/SDA/ICPCK
PA0/CTCK/INT/SCL/ICPDA
PA6/CTCK/INT
PA7/CTP
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
OCDSCK
NC
NC
NC
NC
VSS
VDD
PA0/INT/ICPDA
OCDSDA
NC
NC
NC
NC
PA1/KEY1
PA3/KEY2
PA2/TC/ICPCK
BS83AV02L
16 NSOP-A
NC
PA6/CTCK/INT
BS83BV04L
16 NSOP-A
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
VDD
PA5/KEY1
PA1/KEY2
PA3/KEY3
PA4/KEY4
OCDSCK
NC
PA0/CTCK/INT/SCL/ICPDA
PA2/CTPB/SDA/ICPCK
PA7/CTP
OCDSDA
NC
NC
VSS
Note: 1. If the pin-shared pin functions have multiple outputs simultaneously, the desired pin-shared function is
determined by the corresponding software control bits.
2. The 16-pin NSOP package type is only for OCDS EV chips. The OCDSDA and OCDSCK pins are the
OCDS dedicated pins.
3. For less pin-count package types there will be unbonded pins which should be properly congured to
avoid unwanted current consumption resulting from floating input conditions. Refer to the “Standby
Current Considerations” and “Input/Output Ports” sections.

Rev. 1.10 10 March 02, 2020 Rev. 1.10 11 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
Pin Descriptions
With the exception of the power pins, all pins on the devices can be referenced by their Port name,
e.g. PA0, PA1 etc., which refer to the digital I/O function of the pins. However, these Port pins are
also shared with other function such as the Touch Key function etc. The function of each pin is listed
in the following table, however the details behind how each pin is congured is contained in other
sections of the datasheet.
As the Pin Description tables show the situation for the package with the most pins, not all pins in
the table will be available on smaller package sizes.
BS83A02L
Pin Name Function OPT I/T O/T Description
PA0/INT/ICPDA
PA0 PAPU
PAWU ST CMOS General purpose I/O. Register enabled pull-up and wake-up
INT — ST — External interrupt input
ICPDA — ST CMOS ICP data/address
PA1/KEY1 PA1
PAPU
PAWU
PAS0
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
KEY1 PAS0 AN — Touch key input
PA2/TC/ICPCK
PA2 PAPU
PAWU ST CMOS General purpose I/O. Register enabled pull-up and wake-up
TC — ST — Timer/Event Counter external clock input
ICPCK — ST — ICP clock
PA3/KEY2 PA3
PAPU
PAWU
PAS0
ST CMOS General purpose I/O. Register enabled pull-up and
wake-up
KEY2 PAS0 AN — Touch key input
VDD VDD — PWR — Positive power supply
VSS VSS — PWR — Negative power supply, ground
NC NC — — — No connection
For 16-pin NSOP package type only
OCDSDA OCDSDA — ST CMOS OCDS data/address pin, for EV chip only
OCDSCK OCDSCK — ST — OCDS clock pin, for EV chip only
Legend: I/T: Input type; O/T: Output type;
OPT: Optional by register option;
PWR: Power; ST: Schmitt Trigger input;
CMOS: CMOS output; AN: Analog signal.

Rev. 1.10 10 March 02, 2020 Rev. 1.10 11 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83B04L
Pin Name Function OPT I/T O/T Description
PA0/CTCK/INT/SCL/
ICPDA
PA0
PAPU
PAWU
PAS0
ST CMOS General purpose I/O. Register enabled pull-up
and wake-up
CTCK PAS0
IFS ST — CTM clock input
INT
PAS0
IFS
INTEG
INTC0
ST — External Interrupt input
SCL PAS0 ST NMOS I2C clock line
ICPDA — ST CMOS ICP data/address
PA1/KEY2 PA1
PAPU
PAWU
PAS0
ST CMOS General purpose I/O. Register enabled pull-up
and wake-up
KEY2 PAS0 AN — Touch key input
PA2/CTPB/SDA/ICPCK
PA2
PAPU
PAWU
PAS0
ST CMOS General purpose I/O. Register enabled pull-up
and wake-up
CTPB PAS0 — CMOS CTM inverted output
SDA PAS0 ST NMOS I2C data line
ICPCK — ST — ICP clock pin
PA3/KEY3 PA3
PAPU
PAWU
PAS0
ST CMOS General purpose I/O. Register enabled pull-up
and wake-up
KEY3 PAS0 AN — Touch key input
PA4/KEY4 PA4
PAPU
PAWU
PAS1
ST CMOS General purpose I/O. Register enabled pull-up
and wake-up
KEY4 PAS1 AN — Touch key input
PA5/KEY1 PA5
PAPU
PAWU
PAS1
ST CMOS General purpose I/O. Register enabled pull-up
and wake-up
KEY1 PAS1 AN — Touch key input
PA6/CTCK/INT
PA6 PAPU
PAWU ST CMOS General purpose I/O. Register enabled pull-up and wake-up
CTCK IFS ST — CTM clock input
INT
IFS
INTEG
INTC0
ST — External Interrupt input
PA7/CTP PA7
PAPU
PAWU
PAS1
ST CMOS General purpose I/O. Register enabled pull-up
and wake-up
CTP PAS1 — CMOS CTM output
VDD VDD — PWR — Power supply
VSS VSS — PWR — Ground
For 16-pin NSOP package type only
OCDSDA OCDSDA — ST CMOS OCDS data/address pin, for EV chip only
OCDSCK OCDSCK — ST — OCDS clock pin, for EV chip only
Legend: I/T: Input type; O/T: Output type;
OPT: Optional by register selection; PWR: Power;
ST: Schmitt Trigger input; CMOS: CMOS output;
NMOS: NMOS output; AN: Analog signal.

Rev. 1.10 12 March 02, 2020 Rev. 1.10 13 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
Absolute Maximum Ratings
Supply Voltage ..........................................................................................................VSS−0.3V to 6.0V
Input Voltage .................................................................................................... VSS−0.3V to VDD+0.3V
Storage Temperature..................................................................................................... -50°C to 125°C
Operating Temperature................................................................................................... -40°C to 85°C
IOH Total...................................................................................................................................... -80mA
IOL Total ....................................................................................................................................... 80mA
Total Power Dissipation ........................................................................................................... 500mW
Note: These are stress ratings only. Stresses exceeding the range specified under “Absolute
Maximum Ratings” may cause substantial damage to these devices. Functional operation of
these devices at other conditions beyond those listed in the specication is not implied and
prolonged exposure to extreme conditions may aect device reliability.
D.C. Electrical Characteristics
For data in the following tables, note that factors such as oscillator type, operating voltage,
operating frequency, pin load conditions, temperature and program instruction type, can all exert an
inuence on the measured values. Note that the 2MHz or 4MHz operating frequency is used for the
BS83B04L only.
Operating Voltage Characteristics
Ta=-40°C~85°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD
Operating Voltage – HIRC
fSYS=fHIRC=2MHz 1.8 — 5.5
VfSYS=fHIRC=4MHz 1.8 — 5.5
fSYS=fHIRC=8MHz 1.8 — 5.5
Operating Voltage – LIRC fSYS=fLIRC=2kHz 1.8 — 5.5 V
Operating Current Characteristics
Ta=-40°C~85°C
Symbol Operating Mode Test Conditions Min. Typ. Max Unit
VDD Conditions
IDD
SLOW Mode – LIRC
1.8V
fSYS=2kHz
— 4 8
μA3V — 5 10
5V — 15 30
FAST Mode – HIRC
1.8V
fSYS=2MHz
— 0.15 0.25
mA3V — 0.2 0.3
5V — 0.4 0.6
1.8V
fSYS=4MHz
— 0.3 0.5
mA3V — 0.4 0.6
5V — 0.8 1.2
1.8V
fSYS=8MHz
— 0.6 1.0
mA3V — 0.8 1.2
5V — 1.6 2.4
Note: When using the characteristic table data, the following notes should be taken into consideration:
1. Any digital inputs are set in a non-oating condition.
2. All measurements are taken under conditions of no load and with all peripherals in an o state.
3. There are no DC current paths.
4. All Operating Current values are measured using a continuous NOP instruction program loop.

Rev. 1.10 12 March 02, 2020 Rev. 1.10 13 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
Standby Current Characteristics
BS83A02L
Ta=25°C
Symbol Standby Mode Test Conditions Min. Typ. Max. Unit
VDD Conditions
ISTB
SLEEP Mode
1.8V
WDT on
— 40 100
nA
3V — 60 120
5V — 120 300
SLEEP Mode – 1 Key Wake-up 3V WDT on, fSUB on — 150 250 nA
IDLE0 Mode – LIRC
1.8V
fSUB on
— 1.2 2.4
μA3V — 1.5 3.0
5V — 2.5 5.0
IDLE1 Mode – HIRC
1.8V
fSUB on, fSYS=8MHz
— 200 400
μA
3V — 300 500
5V — 700 900
Note: When using the characteristic table data, the following notes should be taken into consideration:
1. Any digital inputs are set in a non-oating condition.
2. All measurements are taken under conditions of no load and with all peripherals in an o state.
3. There are no DC current paths.
4. All Standby Current values are taken after a HALT instruction execution thus stopping all instruction
execution.
BS83B04L
Ta=25°C
Symbol Standby Mode Test Conditions Min. Typ. Max Unit
VDD Conditions
ISTB
SLEEP Mode
1.8V
WDT on
— 90 150
nA3V — 90 150
5V — 160 320
SLEEP Mode – 1 Key Wake-up 3V WDT on, fSUB on — 150 250 nA
IDLE0 Mode – LIRC
1.8V
fSUB on
— 1.2 2.4
μA3V — 1.5 3.0
5V — 2.5 5.0
IDLE1 Mode – HIRC
1.8V
fSUB on, fSYS=2MHz
— 90 180
μA3V — 100 200
5V — 180 250
1.8V
fSUB on, fSYS=4MHz
— 100 200
μA3V — 160 250
5V — 300 600
1.8V
fSUB on, fSYS=8MHz
— 200 400
μA3V — 300 500
5V — 700 900
Note: When using the characteristic table data, the following notes should be taken into consideration:
1. Any digital inputs are set in a non-oating condition.
2. All measurements are taken under conditions of no load and with all peripherals in an o state.
3. There are no DC current paths.
4. All Standby Current values are taken after a HALT instruction execution thus stopping all instruction
execution.

Rev. 1.10 14 March 02, 2020 Rev. 1.10 15 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
A.C. Characteristics
For data in the following tables, note that factors such as oscillator type, operating voltage, operating
frequency and temperature, etc., can all exert an inuence on the measured values.
High Speed Internal Oscillator – HIRC – Frequency Accuracy
During the program writing operation the writer will trim the HIRC oscillator at a user selected
HIRC frequency and user selected voltage of either 3V or 5V.
BS83A02L
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Temp.
fHIRC 8MHz Writer Trimmed HIRC Frequency
3V/5V 25°C -1% 8 +1%
MHz
-40°C~85°C -2% 8 +2%
2.2V~5.5V 25°C -2.5% 8 +2.5%
-40°C~85°C -3% 8 +3%
1.8V~5.5V 25°C -5% 8 +3%
-40°C~85°C -10% 8 +5%
Note: 1. The 3V/5V values for VDD are provided as these are the two selectable xed voltages at which the HIRC
frequency is trimmed by the writer.
2. The row below the 3V/5V trim voltage row is provided to show the values for the full VDD range operating
voltage. It is recommended that the trim voltage is xed at 3V for application voltage ranges from 1.8V
to 3.6V and xed at 5V for application voltage ranges from 3.3V to 5.5V.
BS83B04L
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Temp.
fHIRC
2MHz Writer Trimmed HIRC Frequency
3V/5V 25°C -1% 2 +1%
MHz
-40°C~85°C -4% 2 +4%
2.2V~5.5V 25°C -6% 2 +6%
-40°C~85°C -7% 2 +7%
1.8V~5.5V 25°C -10% 2 +10%
-40°C~85°C -15% 2 +15%
4MHz Writer Trimmed HIRC Frequency
3V/5V 25°C -1% 4 +1%
MHz
-40°C~85°C -3% 4 +2%
2.2V~5.5V 25°C -2.5% 4 +2.5%
-40°C~85°C -4% 4 +4%
1.8V~5.5V 25°C -8% 4 +8%
-40°C~85°C -13% 4 +13%
8MHz Writer Trimmed HIRC Frequency
3V/5V 25°C -0.5% 8 +0.5%
MHz
-40°C~85°C -3% 8 +3%
2.2V~5.5V 25°C -3% 8 +3%
-40°C~85°C -4% 8 +4%
1.8V~5.5V 25°C -8% 8 +8%
-40°C~85°C -13% 8 +13%
Note: 1. The 3V/5V values for VDD are provided as these are the two selectable xed voltages at which the HIRC
frequency is trimmed by the writer.
2. The row below the 3V/5V trim voltage row is provided to show the values for the full VDD range operating
voltage. It is recommended that the trim voltage is xed at 3V for application voltage ranges from 1.8V
to 3.6V and xed at 5V for application voltage ranges from 3.3V to 5.5V.

Rev. 1.10 14 March 02, 2020 Rev. 1.10 15 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
3. The minimum and maximum tolerance values provided in the table are only for the frequency at which
the writer trims the HIRC oscillator. After trimming at this chosen specific frequency any change in
HIRC oscillator frequency using the oscillator register control bits by the application program will give a
frequency tolerance to within +-20%.
Low Speed Internal Oscillator Characteristics – LIRC
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Temp.
fLIRC LIRC Frequency 3V -40°C~85°C -20% 2 +20% kHz
1.8V~5.5V -40°C~85°C -40% 2 +40%
tSTART LIRC Start up Time — -40°C~85°C — — 100 μs
Operating Frequency Characteristic Curves
System Operating Frequency
Operating Voltage
8MHz
1.8V
~ ~
5.5V
~
~
~ ~
2kHz
4MHz
2MHz
Note: The 2MHz or 4MHz operating frequency for the BS83B04L only.
System Start Up Time Characteristics
Ta=-40°C~85°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
tSST
System Start-up Time
Wake-up from condition where fSYS is o󰀨 —fSYS=fH~fH/64, fH=fHIRC — 16 — tHIRC
fSYS=fSUB=fLIRC — 2 — tLIRC
System Start-up Time
Wake-up from condition where fSYS is on —fSYS=fH~fH/64, fH=fHIRC — 2 — tH
fSYS=fSUB=fLIRC — 2 — tSUB
System Speed Switch Time
FAST to SLOW Mode or
SLOW to FAST Mode
— fHIRC switches from o󰀨 → on — 16 — tHIRC
tRSTD
System Reset Delay Time
Reset Source from Power-on Reset
or LVR Hardware Reset
— RRPOR=5V/ms
42 48 54 ms
System Reset Delay Time
Reset Source from LVRC/WDTC/RSTC
Software Reset (5)
— —
System Reset Delay Time
Reset Source from WDT Overow — — 14 16 18 ms
tSRESET Minimum Software Reset Width to Reset — — 45 90 120 μs
Note: 1. For the System Start-up time values, whether fSYS is on or o depends upon the mode type and the chosen
fSYS system oscillator. Details are provided in the System Operating Modes section.
2. The time units, shown by the symbols, tHIRC, etc., are the inverse of the corresponding frequency values as
provided in the frequency tables. For example, tHIRC=1/fHIRC, etc.

Rev. 1.10 16 March 02, 2020 Rev. 1.10 17 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
3. If the LIRC is used as the system clock and if it is o when in the SLEEP Mode, then an additional LIRC
start up time, tSTART, as provided in the LIRC frequency table, must be added to the tSST time in the table
above.
4. The System Speed Switch Time is eectively the time taken for the newly activated oscillator to start up.
5. The LVRC software reset is used for the BS83A02L only while the RSTC software reset is used for the
BS83B04L only.
Input/Output Characteristics
Ta=-40°C~85°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VIL
Input Low Voltage for I/O Ports or
Input Pins
5V — 0 — 1.5 V
— — 0 — 0.2VDD
VIH
Input High Voltage for I/O Ports or
Input Pins
5V — 3.5 — 5.0 V
— — 0.8VDD — VDD
IOL
Sink Current for I/O Pins – BS83A02L
1.8V
VOL=0.1VDD
2.5 5.0 —
mA3V 5 10 —
5V 10 20 —
Sink Current for I/O Pins – BS83B04L 3V VOL=0.1VDD
16 32 — mA
5V 32 65 —
IOH
Source Current for I/O Pins – BS83A02L
1.8V
VOH=0.9VDD
-1.5 -2.0 —
mA3V -4 -5 —
5V -8 -10 —
Source Current for I/O Pins – BS83B04L
3V VOH=0.9VDD -4 -8 — mA
5V -8 -16 —
ILEAK Input Leakage Current 5V VIN=VDD or VIN=VSS — — ±1 μA
RPH Pull-high Resistance for I/O Ports (Note)
3V LVPU=0,
For BS83A02L, PAPU=0FH;
For BS83B04L, PAPU=FFH
20 60 100
kΩ
5V 10 30 50
3V LVPU=1,
For BS83A02L, PAPU=0FH;
For BS83B04L, PAPU=FFH
6.67 15.00 23.00
5V 3.5 7.5 12.0
tTC
TC Input Pin Minimum Pulse Width
– BS83A02L — — 25 — — ns
tTCK
TM TCK Input Pin Minimum Pulse
Width – BS83B04L — — 0.3 — — μs
tINT
External Interrupt Minimum Pulse
Width — — 10 — — μs
Note: The RPH internal pull high resistance value is calculated by connecting to ground and enabling the input pin
with a pull-high resistor and then measuring the pin current at the specied supply voltage level. Dividing
the voltage by this measured current provides the RPH value.

Rev. 1.10 16 March 02, 2020 Rev. 1.10 17 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
Memory Characteristics
Ta=-40°C~85°C, unless otherwise specify
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VRW VDD for Read / Write — — VDDmin — VDDmax V
Flash Program / EEPROM Memory (EEPROM is used for BS83B04L only)
tDEW
Erase / Write Cycle Time – Flash Program
Memory — — — 2 3 ms
Write Cycle Time – Data EEPROM Memory — — — 4 6
IDDPGM Programming / Erase current on VDD — — — — 5.0 mA
EP
Cell Endurance – Flash Program Memory — — 10K — — E/W
Cell Endurance – Data EEPROM Memory — — 100K — —
tRETD ROM Data Retention time — Ta=25°C — 40 — Year
RAM Data Memory
VDR RAM Data Retention Voltage — Device in SLEEP Mode 1.0 — — V
LVR Electrical Characteristics
Ta=-40°C~85°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VLVR Low Voltage Reset Voltage — LVR enable, voltage is 1.7V -5% 1.7 +5% V
ILVR Operating Current 3V LVR enable, VLVR=1.7V — — 15 μA
5V — 15 25
tLVR Minimum Low Voltage Width to Reset — — 125 750 1875 μs
Power-on Reset Characteristics
Ta=-40°C~85°C
Symbol Parameter Test Conditions Min. Typ. Max. Unit
VDD Conditions
VPOR VDD Start Voltage to Ensure Power-on Reset — — — — 100 mV
RRPOR VDD Rising Rate to Ensure Power-on Reset — — 0.035 — — V/ms
tPOR
Minimum Time for VDD Stays at VPOR to Ensure
Power-on Reset — — 1 — — ms
VDD
tPOR RRPOR
VPOR
Time

Rev. 1.10 18 March 02, 2020 Rev. 1.10 19 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
System Architecture
A key factor in the high-performance features of the range of microcontrollers is attributed to their
internal system architecture. These devices take advantage of the usual features found within RISC
microcontrollers providing increased speed of operation and enhanced performance. The pipelining
scheme is implemented in such a way that instruction fetching and instruction execution are
overlapped, hence instructions are eectively executed in one cycle, with the exception of branch
or call instructions. An 8-bit wide ALU is used in practically all instruction set operations, which
carries out arithmetic operations, logic operations, rotation, increment, decrement, branch decisions,
etc. The internal data path is simplified by moving data through the Accumulator and the ALU.
Certain internal registers are implemented in the Data Memory and can be directly or indirectly
addressed. The simple addressing methods of these registers along with additional architectural
features ensure that a minimum of external components is required to provide a functional I/O
control system with maximum reliability and exibility. This makes these devices suitable for low-
cost, high-volume production for controller applications.
Clocking and Pipelining
The main system clock, derived from either an HIRC or LIRC oscillator is subdivided into four
internally generated non-overlapping clocks, T1~T4. The Program Counter is incremented at the
beginning of the T1 clock during which time a new instruction is fetched. The remaining T2~T4
clocks carry out the decoding and execution functions. In this way, one T1~T4 clock cycle forms
one instruction cycle. Although the fetching and execution of instructions takes place in consecutive
instruction cycles, the pipelining structure of the microcontroller ensures that instructions are
effectively executed in one instruction cycle. The exception to this are instructions where the
contents of the Program Counter are changed, such as subroutine calls or jumps, in which case the
instruction will take one more instruction cycle to execute.
Fetch Inst. (PC)
(System Clock)
fSYS
Phase Clock T1
Phase Clock T2
Phase Clock T3
Phase Clock T4
Program Counter PC PC+1 PC+2
Pipelining Execute Inst. (PC-1) Fetch Inst. (PC+1)
Execute Inst. (PC) Fetch Inst. (PC+2)
Execute Inst. (PC+1)
System Clocking and Pipelining
For instructions involving branches, such as jump or call instructions, two machine cycles are
required to complete instruction execution. An extra cycle is required as the program takes one
cycle to rst obtain the actual jump or call address and then another cycle to actually execute the
branch. The requirement for this extra cycle should be taken into account by programmers in timing
sensitive applications.

Rev. 1.10 18 March 02, 2020 Rev. 1.10 19 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
Fetch Inst. 1
1 MOV A,[12H]
2 CALL DELAY
3 CPL [12H]
4 :
5 :
6 DELAY: NOP
Execute Inst. 1
Fetch Inst. 2 Execute Inst. 2
Fetch Inst. 3 Flush Pipeline
Fetch Inst. 6 Execute Inst. 6
Fetch Inst. 7
Instruction Fetching
Program Counter
During program execution, the Program Counter is used to keep track of the address of the
next instruction to be executed. It is automatically incremented by one each time an instruction
is executed except for instructions, such as “JMP” or “CALL” that demand a jump to a non-
consecutive Program Memory address. Only the lower 8 bits, known as the Program Counter Low
Register, are directly addressable by the application program.
When executing instructions requiring jumps to non-consecutive addresses such as a jump
instruction, a subroutine call, interrupt or reset, etc., the microcontroller manages program control
by loading the required address into the Program Counter. For conditional skip instructions, once
the condition has been met, the next instruction, which has already been fetched during the present
instruction execution, is discarded and a dummy cycle takes its place while the correct instruction is
obtained.
Device Program Counter
High Byte Low Byte (PCL)
BS83A02L PC9~PC8 PCL7~PCL0
BS83B04L PC10~PC8 PCL7~PCL0
Program Counter
The lower byte of the Program Counter, known as the Program Counter Low register or PCL, is
available for program control and is a readable and writeable register. By transferring data directly
into this register, a short program jump can be executed directly; however, as only this low byte
is available for manipulation, the jumps are limited to the present page of memory that is 256
locations. When such program jumps are executed it should also be noted that a dummy cycle
will be inserted. Manipulating the PCL register may cause program branching, so an extra cycle is
needed to pre-fetch.
Stack
This is a special part of the memory which is used to save the contents of the Program Counter only.
The stack is organized into up to 4 levels and neither part of the data nor part of the program space,
and is neither readable nor writeable. The activated level is indexed by the Stack Pointer, and is
neither readable nor writeable. At a subroutine call or interrupt acknowledge signal, the contents of
the Program Counter are pushed onto the stack. At the end of a subroutine or an interrupt routine,
signaled by a return instruction, RET or RETI, the Program Counter is restored to its previous value
from the stack. After a device reset, the Stack Pointer will point to the top of the stack.
If the stack is full and an enabled interrupt takes place, the interrupt request ag will be recorded but
the acknowledge signal will be inhibited. When the Stack Pointer is decremented, by RET or RETI,
the interrupt will be serviced. This feature prevents stack overow allowing the programmer to use
the structure more easily. However, when the stack is full, a CALL subroutine instruction can still
be executed which will result in a stack overow. Precautions should be taken to avoid such cases
which might cause unpredictable program branching.
If the stack is overow, the rst Program Counter save in the stack will be lost.

Rev. 1.10 20 March 02, 2020 Rev. 1.10 21 March 02, 2020
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
BS83A02L/BS83B04L
Ultra-Low Power Touch Key Flash MCU
Stack
Pointer
Stack Level 2
Stack Level 1
:
Stack Level N
Program Memory
Program Counter
Bottom of Stack
Top of Stack
Note: N=2 for BS83A02L while N=4 for BS83B04L.
Arithmetic and Logic Unit – ALU
The arithmetic-logic unit or ALU is a critical area of the microcontroller that carries out arithmetic
and logic operations of the instruction set. Connected to the main microcontroller data bus, the ALU
receives related instruction codes and performs the required arithmetic or logical operations after
which the result will be placed in the specied register. As these ALU calculation or operations may
result in carry, borrow or other status changes, the status register will be correspondingly updated to
reect these changes. The ALU supports the following functions:
• Arithmetic operations:
ADD, ADDM, ADC, ADCM, SUB, SUBM, SBC, SBCM, DAA
• Logic operations:
AND, OR, XOR, ANDM, ORM, XORM, CPL, CPLA
• Rotation:
RRA, RR, RRCA, RRC, RLA, RL, RLCA, RLC
• Increment and Decrement:
INCA, INC, DECA, DEC
• Branch decision:
JMP, SZ, SZA, SNZ, SIZ, SDZ, SIZA, SDZA, CALL, RET, RETI
Flash Program Memory
The Program Memory is the location where the user code or program is stored. For these devices
the Program Memory is Flash type, which means it can be programmed and re-programmed a large
number of times, allowing the user the convenience of code modication on the same device. By
using the appropriate programming tools, the Flash devices oer users the exibility to conveniently
debug and develop their applications while also oering a means of eld programming and updating.
Device Capacity
BS83A02L 1K×14
BS83B04L 2K×16
Structure
The Program Memory has a capacity of 1K×14 to 2K×16 bits. The Program Memory is addressed
by the Program Counter and also contains data, table information and interrupt entries. Table data,
which can be setup in any location within the Program Memory, is addressed by a separate table
pointer register.