HP Deskjet 3000 User manual

HP 3000 Computer System
Preface To The HP 30341A
H P-I B Interface Module
Diagnostic Manual Set
Flidl HEWLETT
~~ PACKARD
COMPUTER SYSTEMS DIVISION, 19447 PRUNERIDGE AVE., CUPERTINO, CALIF. 95014
Part No. 30341-90003
Index No. 3HDWR.30341-90003 Printed in U.S.A
5{81

LIST OF EFFECTIVE PAGES I
The List of Effective Paees IIives the date of the current edition and of any pages changed in updates to that edition.
Within the manual, any page changed since the iast edition
Is indicated by printing the date the changes were made
on the bottom
of the page. Changes are marked with a vertical bar In the margin. If an update is incorporated when an
edition II reprinted, these bars are removed but the dates remain.
iii

I PRINTING HISTORY
New editions are complete revisions of the DWlual. Update packqes, which are Issued between editions, contain
additional and replacement pages
to be merged Into the DWlual by the customer. The dlte of the title page of the
DWlual changes only when a new edition II pUblished. When an edition II reprinted, all the prior updates to the edition
are Incorporated.
iv

The HP 3034lA Interface Hodule Hardware Self-Test is a CPU ROf.1-
resident, microcode diagnostic that verifies correct operation of
the Interface Module's hardware. The self-test can be initiated
either by issuing the the Initiate Self test (SLFT) instruction
from software to the Interface Module's Intermodule Bus Adapter
(IMBA) PCA or by manually actuating the Bus Interface Controller
(BIC) PCA's CPU TEST Switch Sl. Switch Sl is located at center
left on the front edge of the SIC PCA.
The results of the self-test are stored in the computer system's
SLFT "mailbox" memory location MB2 and displayed by 10 LED's (A
thru I and "*") located on the left-front edge of the BIC PCA.
Termination of the self-test is indicated by the BIC PCA's "*"
LED being cleared (off) and the busy/wait flag (bit 0) in "mail-
box" memory location MB4 being set. The octal value (error code)
contained in MB2 or indicated by A thru I LED's indentify which
portion of the self-test that failed as listed in the following
tables. It should be noted that the error codes contained in the
second table pertain to specific Control Store ROM chips located
on the Processor PCA.
If the self-test is initiated with no peripheral devices attached
to the HP-IB, successful test completion is indicated by %74 in
memory location MB2 and %740 indicated by the A thru I LED's. If
the self-test is initiated with no cold-load device attached to
the HP-IB (e.g., HP 2680A only), successful test completion is
indicated by %75 in MB2 and %750 indicated by the LED's. If the
self-test is initiated with a cold-load device attached to the
HP-IB (e.g., HP7976A), successful test completion is indicated by
%00 in MB2 and %000 indicated by the LED's.
Note
The BIC LED's will momentarily flash error codes %740
and %750 before remaining lit to indicate that a hard
error does not exist and to serve as a warning that a
particular device i~ not attached to the HP-IB.
831-1

Hardware Self-Test
Table 1. Hardware Self-Test Summary
Test
Octal
Error Code
Hardware
Under
Test
Processor
J
I
I
1 __ -..,- _
IJ
I MB2 IBIC
1 I LEOs
- 1 __ ' __ - _
I
PCA
PCU
10
11
12
13
100
110
120
130
TAV, 1BV, Stackbit
Skip On Immediate,OBUS, 1NORi LINK
AV, BV, SAVEA, SAVBi JMP, JMPL,
JSB, RSB
CIR, Mapper, ATTN
Registers
Extended Registers
ALU
Shift Logic, Link Logic
Counter, STAO, 3(PRV, ROP), Fl
Comparators, BV Logic, lSRIO-13,
ATTN
PAOO Logic, C1R
Registers
STA-7 (Overflow,
Code)
14 140
15 150
16 160
17 170
20 200
21 210
22 220
23 230
24 240
RALU
RASS Unit
BlC PCA and
1MB
I
I
I
I
I
I
I
I
I
I
I
Carry, Condition I
I
I
25 250 ISR, Skip-On-Test, Int Sync Reg, I
ATTN I
26 260 CPUDOIT, CPUDONE, Timeout, Float I
State of 1MB I
27 270 Freeze Logic I
I
Processor PCAI 30- 300- CRC for each Processor PCA ROM. I
ROMs I 47 470 Refer to table 2. I
I I
tI
Memory Verify I 60 600 Verify reads and writes to %777 I
Memory
VerifYI '61 610 Verify reads and writes to %777 I
Memory Verifyl 62 620 Bandwidth verification of reads I
Memory VerifYI 63 630 Bandwidth verification of reads I
I I
GIC PCA and I 65 650 Verify GIC configuration I
1MBA PCA 1 Channel = channel with lowest I
1 channel number .. 1 I
I 66 660 MI to GIC register communication I
I 67 670 Verify ONV (data not valid) opera-I
I tion 1
- 1_- 1
831-2

Hardware Self-Test
Table 1. Hardware Self-Test Summary (Continued)
Test
Verify CSRQ from DMA circuitry,
PHI and FIFOs. Also verifies
IMBA's ability to execute memory
operations.
CSRQ due to SlOP test
CSRQ due to PHI interrupt
devices
Verify GIC interrupt
operation
I
1
I
I
I
I
I
---------- 1
I
I
for all I
I
logic and IRQI
I
I
I
I
I
Octal
Hardware Error Code
Under
Test
I
MB2
IBIC
I
LEDs
I
-----
GIC PCA and
70 700
IMBA PCA
71 710
(Con't)
72 720
73 730
HP-IB
Inter-
face
74 740 Verifies that HP-IB device exists
on channel. Device numbers 0 - 7
are tried on GIC from step 65
1. D. Verify
75 750 Verifies that HP-IB load device
exists on channel. Device numbers
o - 7 are tried on GIe from step
65
Write/Read 76 760
Write/Read loop back to device #
of step 75, assumed cold load de-
vice
------- --- --- -----------------
831-3

Hardware Self-Test
Table 2. Processor PCA ROM Error Codes
U-134
U-144
U-154
U-164
U-133
U-143
U-153
U-163
Defective
ROM
Reference
Designator
Octal
Error Code
Octal
Error Code
Defective
ROM
I Reference I
MB2 IBIC Designator MB2 IBIC
ILEOs ILEDs
__ 1 __ - 1 _
I I
30 I300 U-131 40 I 400
31 I 310 U-141 41 I 410
32 I320 U-151 42 I420
33 I 330 U-161 43 1430
I I
34 I340 U-132 44 1 440
35 I 350 U-142 45 1450
36 I360 U-152 46 I 460
37 I 370 U-162 47 I 470
__ 1 __ - 1 _
831-4

NOTES
831-5
Hardware Self-Test

Hardware Self-Test
NOTES
831-6