HP 271308 Product manual

HP 271308
EIGHT -CHANNEL MULTIPLEXER
(MUX)
HEWLETT-PACKARD COMPANY
Roseville Networks Division
8000 Foothills Boulevard
Roseville, California 95678
Technical Reference Manual
Flin- HEWLETT
.:~ PACKARD
Card Assembly: 5061-4929
Date Code: A-2318
Manual Part No.2 7132-90007
E0385
Printed in U.S.A
March 1985

PRINTING HISTORY
The Printing History below identifies the Edition of this Manual and any Updates that are
included. Periodically, update packages are distributed which contain replacement pages to
be merged into the manual, including an updated copy of this Printing History page. Also,
the update may contain write-in instructions. -
Each reprinting of this manual will incorporate all past updates; however, no new informa-
tion will be added. Thus, the reprinted copy will be identical in content to prior printings
of the same edition with its user-inserted update information. New editions of this
manual will contain new information, as well as updates.
First
Edition ................ March 1985
NOTICE
The information contained in this document is subject to change without notice.
HEWLETT-PACKARD MAKES NO WARRANTY OF ANY KIND WITH REGARD TO
THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
Hewlett-Packard shall not be liable for errors contained herein or for incidental or con-
sequential damages in connection with the furnishing, performance, or use of this material.
This document contains
proprietary information which is protected by copyright. All
rights are reserved. No part of this document may be photocopied or reproduced without
the prior written consent of Hewlett-Packard Company.
Copyright (c) 1985 by HEWLETT -PACKARD COMPANY
11

CONTENTS
-------
Section I
GENERAL INFORMATION
I nt roduct ion .............................................................. 1 -1
Physical Description 1-1
Functional Description .................................................... 1-1
Eguipment
Supplied 1-3
Options Available .......................... ' ............................... 1-3
Product and Part Identification 1-3
The Product ............................................................. 1 -3
Printed Circuit Card 1-3
r1anuals ................................................................. 1-4
Specifications 1-4
SectionII
INSTALLATION
Determining Current Requirements .......................................... 2-1
Firmware
(EPROM) Installation 2-1
Jumpers
................................................................... 2-3
Memory Configuration Jumper 2-3
Signature Analysis Jumper ............................................... 2-5
lID Channel Interface 2-5
Per ipheral Device Interface ................. 0. 0 .. 00 .. 0 ... 00 ............... 2-5
Extension Cable Fabr icat ion ........... 0 .0 .0 .. o •• 00' ... o •••• 0 ... 0 .. 00 .... 02-11
Installing the MUX 2-11
Opt ional Brackets 0 ...... o. 0 ... 00 ..... 00 ................ 00 .. 0o •••••••• o ••• 2-12
Start-up 2-16
Reshipment ............................. o. 0 ............... ' ................ 2-16
Section III
PRINCIPLES OF OPERATION
Funct ional descr ipt ion ........................................... 0. 0 ...... 3-1
System Clocks 3-3
Memory Address Space ... 0. '0' ....... 0 ....... o •••••••••••••••••••••••••••• 3-3
I/O Address Space 3-6
Z-80B Microprocessor CPU 3-6
Z-80 SIO/2 (Serial lID Controller) 3-6
CTC (Counter Timer Circuit ........... 0 ........................... 0 ..... 3-19
Interfacing to the BIC 3-19
Memory Interface Circuit (MIC) 3-24
Regi ster .......... 0 ............................... 0 ... 0 ............... 0 ... 03-24
o - MIC Configuration 3-24
1 - DMA B Upper Byte of Mem Addr 3-24
2 - DMA Lower Byte of Memory Address 3-24
3 - Dt1A B Conf igura t ion. 0. 0 .... 0 ... 0. 000 .... 0 .. 0. 00 .................. 3-24
4 - Lower Byte of Trans Byt Cnt, Channel B 3-2
5 - DMA B I/O Port Address ........ 0 .... 0 ............................. 3-25
6 - DMA A Upper Byte of Memory Address .......... 0 ..... 0 ........ 0 ..... 3-25
7 - DMA A Lower Byte of Mem Addr 3-25
8 - DMA A Configuration 3-26
9 - Lower Byte of Trans Byt Cnt, Channel A ... 0 ... 0 .............. 0 ..... 3-2
A - DMA A I/O Port Address 3-26
B - Interrupt Vector ............. 0 ...................... 0 ............ 3-26
111

CONTENTS (Cont.)
Priority Interrupt Structure ........................................... 3-27
Wait State Circuits for Interrupt Ack .................................. 3-27
Diagnostic Hood for External Loop Back 3-28
Section IV
PROGRAM1ING
MUX PROGRAf'tT1ABLE FEATURES ................................................. 4-1
Transactions 4-2
Connect Logical Channel Reguest Format .................................... 4-2
Capabi lit ies 4-3
Receive Character Processing ............................................ 4-3
Receive Error Conditions 4-5
Signal Character ........................................................ 4-5
Edit Mode 4-5
Bac k space ............................................................. 4-5
Line Deletion 4-6
Software Handshake with the Device ........................... ~ .......... 4-6
Host ENQ/ACK Handshake 4-7
Device X-ON/X-OFF Handshake ........................................... 4-7
Host X-ON/X-OFF Handshake 4-8
Si ngle Text Termi nat ion ................................................. 4-8
End-On-Count Text Termination 4-8
Aler t 1 Mo de. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-9
Type Ahead and Echoing
4-9
Receiving Transparent or Binary Data ................................... 4-10
Read Reguest Length 4-10
Host Initiated Text Termination ........................................ 4-11
Transmit Character Processing 4-11
Automatic Output Separators Appendage .................................. 4-12
Transmitting Transparent or Binary Data 4-12
Buffer Flushing 4-12
Prograrrmi ng the Receiver and Transmi tter ................................... 4-12
Parity in Transmitted or Received data 4-13
Break Detection 4-13
Handshake Timer ...................................................•...... 4-14
Additional Options 4-14
Error Handling ..................•...............................•...... 4-14
Quoting Character Mode Option 4-17
Condi tional Output Separators Appendage ................................ 4-17
Speed Sense Mode 4-17
Asynchronous Events ...................................................... 4-17
Solicited Events 4-18
Diagnostics .............................................................. 4-18
Connect Logical Channel Reguest Definitions 4-19
Read Device Data, Request Code = 1 ..................................... 4-19
Write Device Data, Reguest Code = 2 4-20
Read Card Information, Request Code = 4 ................................ 4-20
Subfunctions 0 through 33 4-20
Subfunct ion 249 -Read Data Status ................................... 4-21
Subfunction 250. Get Card RAM 4-21
Subfunction 254. Get Card Status .................................... 4-21
Write Card Configuration, Reguest Code = 5 4-22
Subfunction 0 ........................................................ 4-23
Subfunction ................................................................ 4-25
1. Configure Read Option 4-25
2. End-On-Cou nt Length .......................... ,; ................... 4-26
3. Alert 1 Read Mode 4-26
IV

CONTENTS (Cont.)
5. Transmi ss i on Mode ................................................ 4-27
6. Backspace Character 4-27
7. Line Delete Character ............................................ 4-27
8. Backspace and Other Options 4-28
9. Device Handshake Option .......................................... 4-28
10. Baud Rate 4-29
11. Character Length ................................................ 4-29
12. Number Of Stop Bits 4-30
13. Parity .......................................................... 4-30
18. Character Handshake Timer 4-31
21. Host Interrupt tv'Iask ............................................. _4-31
22. Host X-ON/X-OFF Characters 4-33
23. Device X-ON/X-OFF Characters .................................... 4-33
24. Host ENQ/ACK Characters 4-33
25. Host ENQ/ACK Pacing Counter ..................................... 4-33
27. 5i ngle Text Termi nator to Echo CR-LF ............................ 4-33
28. Output Separator ................................................ 4-33
31. Additional Options 4-34
32. 5i ngle Text Termi nator .......................................... 4-35
33. Card Write Register 4-35
34. 5et Port ID ..................................................... 4-36
Control Card, Request Code = 6 4-36
RTS and WTC Block Definitions ..................................... 0 •••••• 4-37
Event Block Description 4~38
Read Status Request Block Definitions .................................... 4-40
Identity Information Block Definitions 4-42
Defaul t MUX Configuration ................................................ 4-42
5ubfunction Assignment Summary 4-44
Read Device Data ....................................................... 4-44
Write Device Data 4-44
Read Card I nformat ion ........................................ 0 ••••••••• 4-45
Write Card Configuration 4-45
Cont rol Card ........................................................... 4-46
Section V
MAINTENANCE
Section VI
REPLACEABLE PARTS
REPLACEABLE PARTS ........................................................... 6-1
ORDERING INFORMATION 6-1
PARTS NOT IN PARTS LIST ..................................................... 6-2
Sect ion VI I
SCHEMATIC DIAGRAMS
v

GENERAL INFORMATION Ir!~IHI,
INTRODUCTION
This manual provides general information, installation, principles of operation, programming, main-
tenance' replaceable parts, and schematic diagrams for the Hewlett-'-Packard model 27130B
Eight-Channel Multiplexer (MUX). This chapter has general information about the MUX, and in-
cludes a description with specifications.
PHYSICAL DESCRIPTION
The HP 27 130B Eight -Channel Multiplexer (MUX) card is shown in Figure 2 -1. The MUX consists of
a
printed circuit card, a cable, an RS- 232 -C connection panel, a cable extender kit and an installation
manual.
FUNCTIONAL DESCRIPTION
The HP 27130B EIght-Channel Multiplexer provides multiplexed connections between a
Hewlett-Packard computer system and up to eight EIA RS-232-C, RS-423-A, RS-422-A type
devices (not including modems).
Figure
1-1 shows a Hewlett-Packard computer system using CHANNEL I/O and the MUX.
(CHANNEL I/O is a Hewlett-Packard standard defining the physical and electrical characteristics for
an I/O system consisting of an I/O channel, an I/O channel adapter, and I/O cards. The MUX is one
of the I/O cards.)
Note that the computer system CPU and memory communicate directly along a Memory/Processor
Bus (MPB). I/O data to/from peripheral devices reaches the CPU/memory through the I/O channel,
the I/O channel adapter, and an I/O card such as the MUX card. The I/O data are received from and
transmitted to peripheral devices by the I/O card, which converts device-specific data to a format
compatible with the I/O channel, and thus the computer. The I/O channel adapter (see Figure 1-1)
controls the flow of traffic between the I/O channel a·nd the memory/processor bus.
The
HP 27130B uses several of the Z-80A family of microprocessor components to relieve the host
computer of much of the overhead. This permits a wide range of configurable transmission modes and
formats, thus' allowing connections to various· CR Tterminals, printing'termina:ls,printer(-and piotters;
1-1

"HP27130B
I/O
CARD
MEMORY/PROCESSOR BUS
I/o
CHANNEL
ADAPTER
I/O
CARD
I/O CHANNEL
I/O
CARD
MUX
CARD
I/o
DEVICE
o
o
UP TO
6
o DEVICES
I/O
DE.VICE
Figure 1-1. MUX In a Typical Hewlett-Packard Computer System
1-2

HP 27130B
EQUIPMENT SUPPLIED
The standard HP 27130B Eight-Channel Multiplexer consists of the following items:
Printed Circuit Card, Part Number 5061-4929
Seventy centinleter (27.5 inch) RS-232-C Panel Cable, Part Number 28658-63001
RS-232-C Panel (connection box), Part Number 28658-60005
Extension Cable Kit, Part Number 1252-0508
EPROMs, Part Numbers 27130-80005 and 27130-80006
Installation Manual, Part Number 27130-90003
PANEL BRACKET OPTIONS AVAILABLE
The following optional RS-232-C panel mounting brackets are available with the HP 27130B.
Option 019:
Mounting Bracket, Part Number 5001-5278 (Used with for mounting RS-232-C panel in HP
19-inch rack cabinets.) NOTE: Bracket has two-panel capacity.
Option 540:
Mounting Bracket, Part Number 5001-5279 (Used for mounting RS-232-C panel on HP 9030A
and 9040A computers.)
Option 550:
Mounting Bracket, Part Number 5001-5280 (Used with HP 9000 computer, series 500, model
9050A racked in the 92211R cabinet.)
PRODUCT AND PART IDENT~FICATION
The Product
Up to five digits and a letter (27130B in this case) are used to identify Hewlett-Packard products.
The five digits identify the product; the letter indicates the revision level of the product.
Printed Circuit Card
The printed circuit card supplied with the HP 27130B product is identified by a part number marked
on the card. In addition to the part number, the card is further identified by a letter and a four-digit
1-3

HP 27130B
date code (e.g., A-230l). This designation is placed below the part number. The letter identifies the
version of the etched circuit on the card. The date code (the four digits following the letter) identifi.es
the electrical characteristics of the card with components mounted. Thus, the complete part number
on the MUX card is:
5061-4929
A-2301
If the date code stamped on the card does not agree with the date code on the title page ef this
manual,
there are differences between your card and the card described herein. These differences are
described in manual supplements available at the nearest Hewlett-Packard Sales and Service Office (a
list of Hewlett-Packard Sales and Service Offices is printed at the back of this manual).
Manuals
The Installation Manual ,supplied with the HP 27130B product, and this manual are identified by
name
and part number. (Note that this manual is part of the HP 27 132A Technical Reference
Package.)
The name, part number, and publication date are printed on the title page of each manual.
If
the manual is revised, the publication date is changed. In this manual, the "Printing History" page
(page ii) records
the reprint dates and manual update record. Reprint dates for the Installation
Manual are printed on the title page.
SPECIFICA TIONS
Table 1-1 lists the specifications of the 2713 OB MUX.
1-4

HP 27130B
Table 1-1. 27130B MUX Specifications
FEATURES
* Eight full-duplex asynchronous serial I/O ports
* EIA RS-232-C, RS-422A, RS-423-A, CCITT V.10 & V.28 compatible
* Simplex, echoplex, half-d~plex, or full-duplex mode operation
* Asynchronous baud rates from 110 baud to 19.2K baud
* Programmable character size of 7 or 8 bits
* 1 or 2 stop bits
* Parity: programmable even, odd, forced 1, forced 0, or none
* Break detection
* Parity, overrun, and framing error detection
* Firmware based self-test
* Optional device handshakes: host or device controlled X-ON/X-oFF, or
host controlled ENQ/ACK
* 16-bit parallel interface to I/O channel (backplane)
PHYSICAL CHARACTERISTICS
Size: 193.04 mm long by 171.45 mm wide
by
16.383 mm thick
(7.6 by 6.75 by 0.645 inches)
W~ight: 283.5 grams (0.625 pound)
I/O Channel Interconnects: 80-pin connector, J1
Device Interconnects: 72-pln connector, J2
PO"'ER REQUIREMENTS
Vol tage
Current (amperes)
Power Dissipation (watts)
+5 V
+12 V
-12 V
(typical)
1 .672 A
0.052 A
0.075 A
(2-sigma)
1 .890 A
0.062 A
0.085 A
(typical)
1-5
8.36 W
0.62 W
0.90 W
(2-sigma)
9.45 W
0.74 W
1.02 W

INSTALLATION 1-
~ __________________ ~[KJ
INTRODUCTION
This section has information for installing and checking the operation of the MUX.
DETERMINING CURRENT REQUIREMENTS
The MUX circuit card obtains its operating voltages from the host computer power supply through the
1/0 channel. Before installing the MUX, it is necessary to determine whether the added current will
overload
the power supply. The current requirements of the MUX are listed in the power require-
ments part of Table 1-1. Current requirements for all other I/O cards can be found in the ap-
propriate Technica: Reference Manuals.
FIRMWARE (EPROM) INST ALLA TION
I CAUTION I
SOME OF THE COMPONENTS USED IN THIS
PRODUCT
ARE SUSCEPTIBLE TO DAMAGE BY
STATIC DISCHARGE. REFER TO THE SAFETY
CONSIDERATIONS INFORMATION AT THE FRONT
OF THIS MANUAL BEFORE HANDLING THE CARD
OR REMOVING OR REPLACING COMPONENTS.
The EPROMs are installed in sockets on the MUX card as shown in Figure 2-1. Be sure that they are
installed properly, and that they have not been either damaged or loosened from their sockets during
shipping.
Additionally,
when installing or removing EPROMs, guard against either bending or breaking pins on
components. These pins also
can become folded between a component and its socket, which could
result in
intermittent operation of the MUX. In most cases, either bent or twisted pins can be
straightened with careful use of needle-nose pliers.
2-1

HP 2713GB
CPU
BIC
SID
CTC
MIC SID
CTC
EPROM SID
CTC
EPROM SID
JUMPER
Figure 2-1. Component and Jumper Locations
2-2

HP 27130B
JUMPERS
There are two jumpers on the MUX card: a Memory Configuration jumper, and a Signature Analysis
jumper. The locations of these two jumpers
are shown in Figure 2-1.
Memory Configuration Jumper
The Memory Configuration jumper, WI, is an internally-connected, 18 pin, dual in-line package (DIP)
shunt network. The jumper configures the two memory sockets (U64 and U74) to accomodate dif-
ferent kinds of EPROMs and static RAMs The pin diagram of WI is shown in Figure 2- 2; pin func-
tions are listed in Table 2-1.
16 17 16 15 14 13 12 11 10
:2 .3 4. 6 7 9
Figure 2-2. Memory Configuration Jumper

HP 27130B
JUMPER
A
B
C
D
E
F
G
H
J
table 2-1. functions of the memory configuration jumper
FUNCTION
Installed only when a 16K byte EPROM is used in socket
U64. Position A connects OCE2- of the Memory Interface
Circuit (MIC) to pin 20 (CE-) of the EPROM in socket
U64. This enables the EPROM in socket U64 whenever
the lower 16K bytes of memory are addressed.
Installed only when a 4K- or BK-byte EPROM is used in
socket U64. Position B connects OCEO- of the MIC to
pin 1B (CE-) of the 4K-byte EPROM or pin 20 (CE-) of
the BK-byte EPROM, depending on. which EPROM is installed
in socket U64. This enables the EPROM in socket U64
whenever the lower BK bytes of memory are addressed.
Installed only when a 4K-byte EPROM is used in socket
U64. Position C connects +5V power to pin 24 (VDD) of
the 4K-byte EPROM.
Installed only when a 16K-byte EPROM is used in
socket U64. Position D connects A13 of the address
bus to pin 24 (A13) of the 16K-byte EPROM.
Installed only when an BK-byte EPROM is used in
socket U74. Position E connects +5V power to pin 27
(VPP-) of the BK-EPROM.
Installed only when an BK-byte static RAM is used in socket U74.
POSition F connects WR- of the Z-BOB CPU to pin 27 (WE-) of the
static RAM, thus enabling the CPU to write to the RAM.
Installed only when a 2K-byte static RAM is used in socket U74.
Position G connects WR- of the Z-B08 CPU to pin 21 (WE-) of the
static RAM, thus enabling the CPU to write to the RAM.
Installed only when a 4K- or 8K-byte EPROM or an BK-byte static
RAM is used in socket U74. Position H connects A11 of the Z-BOB
CPU address bus to pin 23 (A11) of the 4K- or BK-byte EPROM or BK
byte RAM, depending on which device is installed in socket U74.
Installed to enable the MIC wait-state signal when slow EPROMs
(access time greater than 250 nsec) are used in U64 or U74.
2-4

HP 27130B
Signature Analysis Jumper
The Signature Analysis jumper, U 34, is a 14-pin, pre-programmed shunt network. The internal con-
nections of this jumper are set at the factory and are shown in Figure 2- 3 for informatIOn only.
14 13 12 11 10 9 8
4 5 7
Figure 2- 3. Signature Analysis 1umper Internal Connections
1/0 CHANNEL INTERFACE
All interface between the MUX and the host computer occurs on the I/O channel. An 80-pin connec-
tor (J 1) located on the MUX mates with a receptacle on the 1/0 channel. Connections to 11 are listed
in Table 2-2.
PERIPHERAL DEVICE INTERF ACE
Interface between the MUX card and up to eight peripheral devices is via a 72- pin connector (J2) to
an RS-232-C Connection Unit, and from there, via eight separate connectors and eight cables, to the
peripheral devices. A connection diagram for the RS- 23 2C panel is shown in Figure 2- 4.
Connector J2 pin assignments are shown in Table 2- 3. Pin assignments for 12 and the RS- 232C panel
are shown in Table 2-4. Note that, in Table 2-4, there are eight pairs of Send Data (SO) and Signal
Ground (SG) lines, and eight pairs of Receive Data (RD) and Signal Ground (SG) lines; that is, one pair
of Send Data lines and one pair of Receive Data lines for each of the eight connectors (JO through J7)
to the eight peripheral devices.
2-5

HP 27130B
f>,fJX
R$-232-C PANEL
25-PlN
RECEIVER
CABLE
50-PiN
ONE OF EIGHT
FEMAlE CONNECTOR
J2
___ RDXlA.)
FEMALE CONNECTOR CHANNELS St-kYWN
SO (103~
AX
RDX(S)
DSR(1071
oeD)'
OCD (109)
DTRX
DTR (108.2)
sox
RD (104)
SGX
SG (102)
AT5 (105)
CRX3
CRX2
CTS (105)
SHIELD
FG (101)
Figure 2-4. Connections From MUX-to-Panel-to-Device
2-6

PIN
NO.
A1
A2
A3
A4
AS
A6
A7
AS
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
SIGNAL
MNEMONIC
RES
DB14-
DB12-
GND
DB10-
DB8-
GND
DB6-
DB4-
GND
DB2-
DBO-
GND
AD2-
ADO-
GND
DDUT-
BPO-
CEND-
SYNC-
GND
CCLK
GND
BR-
DBYT-
MYAD-
GND
RES
PFW-
PPON
GND
AC-
AC+
-12
+12
+5S
+5P
HP 27130B
Table 2- 2. I/O Channel Connector J 1
SIGNAL DEFINITION
Not used
Data Bus,
Bit 14
Data Bus,
Bit
12
Ground
Data Bus,
Bit
10
Data Bus, Bi t 8
Ground
Data Bus,
Bit
6
Data Bus, Bit
4
Ground
Data Bus,
Bi t 2
Data Bus,
Bit 0
Ground
Address Bus,
Bi t 2
Address Bus, Bi t 0
Ground
Data
Out
Bus Primitive
Bit 0
Channel End
Synchronize
Ground
Common Clock
Ground
Burst Request
Device Byte
My Address
Ground
Not used
Not used
Not used
Not
used
Power-Fail Warning
Primary Power On
Ground
Not used
Not used
-12V
+12V
Not used
+5P
2-7

HP 27130B
Table 2-2. I/O Channel Connector 11 (Continued)
PIN
SIGNAL
SIGNAL DEFINITION
NO. MNEMONIC
I
B1
---
Not used
B2 DB15-
Data Bus, Bi t
15
B3 DB13-
Data Bus, Bi t 13
B4
GND
Ground
I
B5 DB11-
Data Bus,
Bi t 11
I
B6 DB9-
Data Bus, Bi t 9
B7 GND
Ground
B8 DB7-
Data Bus,
Bi t 7
I B9 DB5-
Data Bus, Bi t 5
I
B10 GND
Ground
B11
DB3-
Data Bus, Bit 3
B12 DB1-
Data Bus, Bi t 1
B13 GND
Ground
B14
AD3-
Address Bus, Bi t 3
B15 AD1-
Address Bus, Bi t 1
B16 GND
Ground
B17
UAD-
Unary Address
B18 BP1-
Bus Primitive Bi t 1 I
B19 CBYT-
Channel Byte
B20 POLL-
Poll
I
B21 GND
Ground I
B22
IOSB-
I/O Strobe
B23 GND
Ground
B24
ARQ-
Attention Reguest
B25 DEND-
Device End
I
B26 IFC-
Interface
Clear
I
I
B27
GND
Ground I
B28
---
i
Not
used
I
B29
---
I
Not
used
I
B30 RES
I
Not
used
B31
ISPU I
Not used
I
B32 NMI-
I Non-Maskable
Interrupt
i
B33
SPON
Secondary Power On (NOT USED BY
MUX CARD)
i
I
I
B34 GND
Ground
B35 AC-
Not used
B36
AC+
Not used I
B37 -12 -12V
B38
+12
+12V
B39
+5S
Not
used
B40
+5P
+5P
2-8