IBM 7090 User manual

II rn ~ Customer Engineering Instruction-Reference
7090 Data Processing System
System Fundamentals
7100 Central Processing Unit
7151 Console Control Unit
7606 Multiplexor

CONTENTS
1. O. 00 INTRODUCTION TO THE IBM 7090 5.3.03
Fixed-Point Arithmetic Instructions
55
DATA PROCESSING SYSTEM
5 5.3.04
Floating-Point Arithmetic Instructions
68
1.1. 00 General System Operation . 5 5.3.05
Transfer Instructions
91
1. 2. 00 Functional Parts of a Computer System 5
5.3.06
Trap Mode Instructions
97
-1.3.00 7090 System Make-up
6 5.3.07
Skip Instructions
99
1.
4.00
7090 General Logic
9 5.3.08
Control Instructions
107
1. 4.
01 The Stored Program 10
5.3.09
Sense Indicator Instructions
111
1.
4.02 Exercises 10 5.3.10
Index Transmission Instructions
119
5.3.11 AND and OR Instructions
128
2.0.00 COMPUTER OPERATIONS 12 5.3.12
Convert Instructions
132
2.1. 00 Storage Word Designation
12
5.3.13
Floating-Point Trap
141
2.2.00
The 7090 Word 12
2.2.01 Numeric Quantity (Data) Word
12
6.0.00 IBM 7151 CONSOLE CONTROL UNIT
144
2.2.02
CPU Instruction Word
12
6.1.00 Operator's Panel
146
2.2.03 Data Channel Command Word
14
6.1.01 Indicators
146
2.3.00 Fundamental Components
14
6.1.02
Manual Controls
149
2.4.00 A + B = C, Print C 17 6.1.03
Manual Control Keys
151
2.5.00 Other Components, Instructions and 6.2.00
Customer Engineer's Test Panel
158
Commands
21
6.2.01 Indicators
158
6.2.02
Switches
162
3.0.00
CPU INTERNAL FUNCTIONS
23
6.3.00
Marginal Check Panel
165
3.1. 00 Functional Components
23
3.1.01 Storage Register (SR) 28
7.0.00
REFERENCE INFORMATION
166
3.1.02
Accumulator Register (AC) 28
7.1.00
Condensed Logic
166
3.1.03
Multiplier-Quotient Register (MQ) 28
7.1.01
Adders
166
3.1.04 Sense Indicator Register (SI) 28 7. 1. 02 Address Register
166
3.1.05 Index Registers (XR) 28
7.1.03
Program Register
166
3.1.06 Program Register (PR) 29
7.1.04
Sense Indicators
166
3.1.07 Shift Counter (SC) 29
7.1.05
Sh ift C ounte r 168
3.1.08 Program Counter (PC) 30
7.1.06
Program Counter
168
3.1.09 Address Register (AR) 32
7.1.07
Accumulator
168
3.1.10 Address Switches (AS) 32
7.1.08
Multiplier Quotient
168
3.1.11
Tag Registers
32
7.1.09
Index Registers
170
3. 1. 12
Adders (AD) 32
7.1.10
Storage Register
170
3.2.00
Instruction Decoding and Processing 36
7.2.00
Service Aids
170
3.2.01 Operation Decoders
36
7.2.01
One Card Programs
170
3.2.02 Control Circuits 36
7.2.02
Voltage
174
3.2.03 Pulses
36
7.2.03
Adjustment of C Pulse Set
174
3.3.00
Basic Cycle
36
7.3.00
Operator's Panel
176
7.3.01
Console Indicators
176
4.0.00
IBM 7606 MULTIPLEXOR
38
7.3.02
Indicator Lights
177
4.1. 00 Multiplexor Functional Units
38
7.3.03
Unitized Assembly Lights & Keys
178
4.1. 01 Multiplexor Clock
38
7.3.04
Switches and Keys
178
4.1.02 Multiplexor Storage Bus 41
7.3.05
Plastic Rocker
178
4.1. 03 Multiplexor Storage Bus OR'ing 43
7.3.06
Reset Motor
178
4.1.04 Multiplexor Address Switches 43
7.4.00
CE Panel
179
4.2.00
Data Flow and Control
43
7.4.01
Indicator Lights
179
4.2.01
CPU to C ore Storage . 43
7.4.02
Switches and Receptacles
179
4.2.02 Core Storage to CPU .
44
7.5.00
Marginal Check Panel
180
7.5.01
MC Switches
180
5.0.00
CPU DATA FLOW AND TIMING
45
7.5.02
MC Meters
180
5.1.00 I Cycle 45
7.6.00
Tailgate
181
5.2.00 Indirect Addressing
45
7.6.01
Signal Connectors
181
5.3.00 Instructions 47
7.6.02
Power Connector s 181
5.3.01
Word Transmission Instructions
47
5.3.02
Shifting Instructions
53
APPENDIX
183

IBM 7090 DATA PROCESSING SYSTEM
MAJOR REVISION--September, 1961
Thi s editio n, Form 223-6895-1 , obsoletes Form 223 -6 895
and all earlier editions . Till s edition has been revised
throu9hout and should be reviewed completely .
Address comments concerning this manual to:
IBM Corporation
CE Manual s, D epa rtment 296
P .O. Bo x 390
Pou9hkeepsie, New York
© 19 61 by International Bu siness Machines Corpor atio n
Printed in U.S.A.

CORE STORAGE
CARD MACHINES
To Channels B-D
CENTRAL PROCESSING UNIT
MULTIPLEXOR
DATA CHANNEL A
TAPE UNIT
FIGURE 2.5-2. 7090 SYSTEM COMPONENTS -- REGISTERS, SWITCHING FUNCTIONS, AND DATA PATHS

1. O. 00 INTRODUCTION TO THE IBM 7090 DATA PROCESSING SYSTEM
The IBM 7090 Data Processing System is a solid-state digital computer that is approx-
imately six times faster than its vacuum tube predecessor, the IBM 709. Along with
increased speed, the 7090 is also mbre versatile. It can perform more than 200 distinct
operations.
The 7090 is used in such fields as airplane, rocket, and missile design, atomic
research, weather, and missile tracking. Using this computer, calculations in these
fields can be done in much more detail and with greater accuracy than ever before.
Much of the need for experimental testing is also eliminated; rapid, detailed calcula-
tions during design can foresee many troubles that formerly would be indicated only by
testing an assembly.
The IBM 7090 is also advantageous and economically feasible for business paper
work such as payroll, billing, and sales analysis. Management, with the aid of such
a computer, can base business decisions on more up-to-date information than was ever
before possible.
1.1.00 GENERAL SYSTEM OPERATION
A computer system may be made to add, subtract, multiply or divide. According
to its make-up, a system may also print, read cards, punch cards, read or write mag-
netic tape, or perform many logic operations. Shifting numbers right or left, setting
the algebraic sign, and comparing the size of two numbers are examples of logic oper-
ations.
To solve a problem, a sequence of arithmetic and logic operations and the required
data are needed. A computer does one operation at a time. When one operation is
complete, the next one in sequence begins. Executing operations continues until the
sequence has run its course and the final answer to the problem has been computed.
The sequence of operations for solving a problem is called a program.
1. 2. 00 FUNCTIONAL PARTS OF A COMPUTER SYSTEM
The normal make-up of a computer system consists of five functional parts:
1. Input
4. Control of all sections
2. Storage for data and instructions
5. Output
3. Arithmetic for actual computing
These parts work together to accept data and instructions into the system, compute
the solution to the problem, and send the solution back out of the system. This all takes
place under the direction of the program.
5

The input section of a computer system accepts information from any outside source
and places it in the storage section. This information may come from punched cards,
magnetic tape, or manually operated keys. The information may be instructions, data
(numbers for arithmetic calculations), or alphabetic characters for printing page
headings, comments, and so forth.
The storage unit accepts and stores information that com es into the system through
the input section. When any portion of the information in storage is needed, that por-
tion is located and sent out to the section that requested it. All information in the sys-
tem is at one time or another, in storage; therefore, computer speed depends on
storage speed. The storage scheme of most computer systems today is random access--
any portion of information can be located directly without searching other locations.
The arithmetic section is the calculating section of the computer system. Here,
portions of information ~ either instructions or data, can be transformed, combined,
or altered.
The control section directs the other sections. It tells them what to do and when to
do it. Instructions come into the control section from storage. The control section
also controls itself in that it keeps account of the instruction it is using and the one that
it will use next.
The output section takes calculated information from storage and presents it to an
outside user. Commonly used forms of output are: information on magnetic tape,
punched cards, printed reports, or indicator lights.
1. 3. 00 7090 SYSTEM MAKE-UP
The 7090 system includes all five of the sections previously mentioned. Figure
1. 3-1 shows the general grouping of these sections in the 7090 system; arrows indicate
the general flow of information. Although the functional sections can be neatly separ-
ated, in practical application it is more likely that some will be combined and others ~
separated. Input and output are combined with a portion of control in a data channel,
and arithmetic with another portion of control in the central processing unit (CPU).
Storage is the only functional section that is a separate machine unit. The mUltiplexor
controls the routing of information into and out of storage.
The arrangement shown in Figure 1. 3-1 allows input-output to operate somewhat
independently, sharing storage with CPU. The highest order of controls is in the CPU,
where control is delegated to the lower order controls in the data channel and multi-
plexor.
A representative 7090 system appears in Figure 1. 3-2; the physical grouping of
7090 functions is shown, with machine types. The tBM 7100 Central Processing Unit
is contained in two cabinets, or frames, CPU1 and CPU2. The 7151 Console Control
Unit provides manual controls for the system operated as a whole. The IBM 7606
Multiplexor and IBM 7302 Core Storage correspond to the same units shown in Figure
1. 3-1. The number of machines available for 7090 input-output (1-0) operations is
variable, but only seven types are ordinarily used:
6

CPU
7607
Data
Chan
I
CD
MPX}
f
Storage
7607
Data
Chan
II
Data
Channel
CPU
Control
and
Arithmetic
Storage
Data Channel
Input -Output
and
Control
FIGURE 1.3-1. 7090 SYSTEM FUNCTIONAL ARRANGEMENT
7607
II
7100
CPU
I
Up to Ten 729 II's or IV's per Data Channel
7607
II
7100
CPU
2
7151
Console
721
Card Punch ..
7607
II
7606
Multi-
plexor
711
Card
Reader
716 I
--I
7607
II
7302
Core
Stor
7607
II
7607
II
Print~r
I Power
(400 208v, 3¢) to All Frames
~
.....
FIGURE 1.3-2. BLOCK REPRESENTATION OF 7090 SYSTEM
Card
Reader
CPU
Storage
Data
Channel
CPU
Storage Printer
Run Card Reader and Read A and B Add A and
B, Store Sum C Start
the Pri nter and Print C
FIGURE 1.4-1. ADD A AND B, PRINT C
7

7607 Data Channel Modell
716 Printer
721 Card Punch
711 Card Reader
7607 Data Channel Model 2
729 II
Magnetic Tape Unit
729 IV Magnetic Tape Unit
The reader, punch, and printer can be used only with the 7607 Data Channel Modell.
The 729 II and 729 IV tape units can be intermixed on either model data channel.
The IBM 7100 CPU is the control center of the 7090 system. In addition, all arith-
metic and logic circuits are located in the CPU. The CPU receives information from
storage, decodes it, and performs the necessary operation. Even though 1-0 is an
independently functioning section, its operation must be initiated from the CPU.
The IBM 729 II and 729 IV Magnetic Tape Units write information on magnetic tape
or read information from magnetic tape. The two models perform indentical functions,
but the 729 IV moves tape at a higher rate than the 729 II.
The IBM 711 Card Reader reads information from punched cards at 250 cards per
minute.
The IBM 716 Printer prints information from core storage at 150 lines per minute.
The typewheel echo pulses are available to the 7090 system, where they mayor may
not be used to check the accuracy of printing.
The IBM 721 Card Punch punches information from core storage at 100 cards per
minute.
The IBM 7607 Data Channel Models 1 and 2 control the flow of information between
the 1-0 units and core storage. A 7607 Modell can control any combination of ten
729 II and 729 IV tape units and up to one each of reader, punch, and printer. The
printer must be present if either a reader or punch are to be used. A 7607 Model 2
can control ten tape units, but neither card machines nor printer. The 7090 system
may include up to eight data channels.
Each data channel can be regarded as a subsystem, with its own manual control
console and indicator panel. Once a data channel is set in operation by an instruction
in the CPU program, it can call in its own instructions (called commands in channel
operations). These commands make up what is known as an 1-0 program. This pro-
gram controls the operation of the 1-0 unit that is selected and also provides informa-
tion to or receives information from that 1-0 unit. Information received from an 1-0
unit is placed in core storage, or information is taken from core storage to be supplied
to a selected 1-0 unit.
The CPU handles instructions that select a particular data channel and the 1-0 device
on that channel. The CPU is also responsible for supplying the channel with its first
command. This first command can be the first of a series of commands (1-0 program)
that will sustain the selected channel and device in operation independently of the CPU.
\Vhen this 1-0 program has run its course, the selected device stops and the operation
is complete.
8

It is possible for a 7090 with the full eight data channels to have eight 1-0 programs
and the CPU program in operation simultaneously --each independent of the others and
all sharing core storage.
The IBM 7302 Core Storage is a fast, random-access storage unit. A unit of informa-
tion can be read into (or out of) anyone of its 32,768 storage locations in 2.18 micro-
seconds. Read-out is spoken of as being nondestructive in that the information remains
intact in core storage after read-out.- Storage serves both the CPU and data channels.
The only restriction is that no two units can be using storage at exactly the same time.
If a data channel calls for storage while CPU is using storage, the channel waits until
CPU permits. storage priority to pass to the channel.
The IBM 7606 Multiplexor is a time sharing and switching device. It provides a path
to and from storage for the CPU and data channels. The multiplexor also performs
certain anticipatory, or look-ahead functions associated with data channel operations.
The IBM 7151 CPU Console Control Unit provides the means to manually control the
system and to display, in indicator lights, the contents of various registers, or anyone
of the storage locations. Several registers are continually displayed. The console also
houses the CE test panel and the marginal voltage check panel.
1. 4. 00 7090 GENERAL LOGIC
The 7090 system operation can be compared to a 407 -514 summary punch operation.
The card feed in the 407 is input; storage, arithmetic, and control are in the 407; the
407 print wheels and 514 punch are output. The 514 punches a card only when instructed
to do so by the 407 and information to be punched must be in storage and wired to the 514.
The 407 waits for a signal from the 514 before proceeding to another operation. Similar
requirements for control exist in the 7090 system. Input waits in a ready status until
called for by the control section; the control section manipulates information in a pre-
determined manner and sequence; output operates when called for by the control section.
Again--as in the accounting machine, summary punch system--the control section is
continually informed of the progress of events in all sections so that another operation
can be initiated as soon as the current operation is complete.
An example of information flow and control in the 7090, is the sequence taken by the
system in solving the following problem:
Given:
Problem:
The quantities A and B punched in a card.
Add B to A and print the result, C.
(A+B = C, print C)
1. Cause the card reader to run and feed the card.
2. Read the information from the card and place it in storage.
3. Bring A from storage into the arithmetic section.
4. Bring B from storage and add it to A.
5. Place the result, C, in storage.
6. Cause the printer to run.
7. Bring C from storage and send it to the print wheels for printing.
9

The program for this problem is made up of instructions and data channel commands
that control the 7090 to perform the operations outlined. These instructions and com-
mands progress step-by-step and the control section recognizes each in turn when the
previous operation is complete.
Because the control section of the system operates at electronic speed and the card
reader and printer are relatively slow, it is apparent that much communication is nec-
essary between the mechanical functions and the control section. The control section
must wait until A and B have been read from the card before adding them together. The
sum C can be developed and stored at electronic speed, but must wait in storage until
the printer is ready to receive it for printing.
Figure 1. 4-1 shows the progression of the steps in the foregoing program. Not
shown
in Figure 1.4-1 are the instructions and commands that initiate each of the oper-
ations depicted. These are also in storage along with the factors A and B and constitute
the stored program. As each instruction ends its operation, the next instruction is
called out and initiates its operation. In this manner, the 7090 system progresses
through the solution according to the program in storage.
1. 4.01 The Stored Program
The program previously described used CPU instructions and data channel commands
from storage. These instructions controlled other information going to and from stor-
age. But how did the instructions and commands get into storage? In the beginning,
the author of the program decides what instructions and commands to use and in what
order to use them. There are several ways to get these instructions and commands in-
to storage without a stored program already in the system. Among these ways are
direct manual entry from the operator's keys on the IBM 7151 Console Control Unit *,
entry from cards or tape caused by a command manually entered into a data channel
from the IBM 7617 Data Channel Console *, and forced automatic operation of a card
reader or tape unit caused by depression of a load key on the CPU console.
\Vh.atever the means of entry, both the stored program instructions and the data to
be processed must be previously translated into machine language in the form of binary
words. A binary word, as used in the 7090, consists of 36 binary positions. The bin-
ary number system is explained in Appendix A of IBM 7090 Data Processing System
Reference Manual, Form A22-6528. Also explained there are processes for conversion
of decimal numbers to binary numbers, and binary numbers to decimal numbers. A
third system (called octal) provides a quicker and less cumbersome means of expressing
binary numbers.
1. 4. 02 Exercises
The following equivalent numbers in binary, octal, and decimal provide an opportun-
ity to practice conversion from one number system to another. Do the conversions and
check your results against those given. (Decimal and octal fractions are rounded to
three places and binary fractions are rounded to nine places.)
* The CPU console (IBM 7151) is a separate machine type, and there is only one on each 7090 system.
Each 7607 Data Channel has a manual console of its own (IBM 7617).
10

Whole Numbers
1.
510 58 1012
2. 112510 21458 10 001 100 1012
3. 1778 1 111 1112 12710
4. 13258 1 011 010 1012 72510
5. 77778 111 111 111 1112 409510
6. 1 101 0102 '1528 10610
7. 1 111 1112 1778 12710
8. 1 010 1012 1258
85
10
9. 409610 100008 1 000 000 000 0002
10. 333310 64058 110 100 000 1012
Fractions
1.
0.710
0. 5468
0.101 100 1102
2. 0. 2510
0.28
0.012
3.
0.33
10 0. 2518
0.010 101 0012
4. 0.145
10 0. 1128
0.001 001 012
5.
0.915
10
0.
7248
0.111 010 12
6.
0.48
0.12 0.510
7. 0. 578 O. 101 1112 0. 73410
8. 0. 7158
0.111 001 1012
0.910
9. 0. 1012
0.58
0. 62510
10.
0.101 0102 0. 528 0. 65610
Improper Fractions
1.
17. 0510 21. 0318 10 001. 000 011 012
2.
40.96
10 50. 7538 101
000.111 101 0112
3.
17.
058 1
111. 000 1012 15. 07810
4.
77.778
111 111 . 111 1112 63.984
10
5. 11. 112
3.38
3. 37510
6.
10.012
2.2
8 2. 2510
11

2. 0.00 COMPUTER OPERATIONS
A more detailed study of 7090 operations requires additional information about the sys-
tem. This section of the manual deals with the designation of each word location in
storage, the 36-position 7090 binary word, and the fundamental components of system
logic. Again, these will be applied to the problem, A+B = C, print C. In this descrip-
tion of the problem, the importance of the central processing unit (CPU) becomes more
apparent.
2.1. 00 STORAGE WORD DESIGNATION
The storage unit in the 7090 system contains 32,768 locations. Each of these word
locations is made up of 36 binary positions. Ordinarily, all 36 positions of anyone
word are moved to or from storage at one time. This is known as parallel data trans-
mission and allows the moving of a large numeric factor each time that storage reads
in or out.
Think of storage as a large double square of pigeon-holes as shown in Figure 2.1-1.
Each pigeon-hole has the capacity of a full 36-bit word. When a word is to be stored in
or taken from any location, this location must be designated. Obviously, there must be
32,768 of these designations, or addresses, one for each location. Because all opera-
tions in the 7090 system are done in binary notation, there are 15 binary positions used
for addressing storage locations. Only 15 are required because storage addresses are
expressed in octal numbers ranging from 00000 to 77777, rather than from 00001 to
100000. An address of all zeros designates the first word location in storage. Every
storage operation, whether directed by the CPU or a data channel, must be addressed.
2.2.00 THE 7090 WORD
A 7090 word may be a numeric quantity, a CPU instruction, or a data channel com-
mand. In all cases, the word is a full 36 positions. The logic format of a word differs
according to its use.
2.2.01 Numeric Quantity (Data) Word
Numbers, usually referred to as data, normally appear in true form in 35 of the 36
binary positions in the 7090 word. The remaining position is the algebraic sign of the
number (Figure 2.2-1). A binary bit, one, in the sign position is a negative sign. No
binary bit, zero, in the sign position of the word is a positive sign. The sign position
and the 35 numeric magnitude positions make up the format of the data word.
2.2.02 CPU Instruction Word
The CPU instruction word (Figure 2.2-2) has a different logic format. The CPU
instruction word gains its distinctive format because it is called for by CPU at a time
12

12
16,257
2 Sections, 16,384
Word Locations Per Section
FIGURE 2.1-1. STORAGE LOCATIONS
IS 11 : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : : ~51
FIGURE 2.2-1. DATA WORD
FIGURE 2.2-2. INSTRUCTION WORD
FIGURE 2.2-3. COMMAND WORD
13

when one operation is about finished and an instruction is needed. The author of the
program must provide the proper instruction word in storage and must build his program
so that the CPU has the address for that instruction when it is needed.
Each field of the instruction word has its particular significance because the CPU
brings the word in as an instruction. The sign position is always a part of the operation
code. Along with the sign, either the remainer of the prefix field or the decrement field
dictates what operation is to be done. If there is nothing in the remainder of the prefix,
the sign and decrement contain the operation code. If either of the two remaining posi-
tions of the prefix contains a bit, the prefix contains the entire operation code and the
decrement field is used for another purpose.
The address field usually contains the address of a data word in storage. This data
word is brought into the CPU as a part of whatever arithmetic or logic function is called
for by the operation code. Thus, the instruction not only dictates the operation to be
performed, but also specifies the address of the data to be used. In some instances, the
address field is a part of the operation code. When this is the case, the address field is
not used to address data in storage.
The tag field is a means of causing the CPU to calculate a storage address that is
different from the address field of the instruction.
2.2.03 Data Channel Command Word
Similar in format and application to the CPU instruction word, the data channel com-
mand word gains its special significance by being called out of storage by the control
function in the data channel. This, as in CPU, occurs when one operation is finished
and the data channel needs to be directed what to do next. The two major differences
are that:
1. The prefix is always the operation code in the data channel.
2. Positions 3-17 are a word counter. Whether the operation is reading or writing,
once the command is in channel, the word count becomes one less each time a
word is handled. Thus, when the word count becomes zero, the channel must
ask for a new command.
Data channel operations always start by unit selection from a CPU instruction.
Independent operation continues on the same unit as long as successive commands re-
quire it. Once the succession of commands is broken by a command to disconnect,
that unit and the channel that was operating have completed their assignment. This is
all planned in advance by the author of the program, and commands are stored where
the data channel will call for them at the proper time.
2.3.00 FUNDAMENTAL COMPONENTS
-The fundamental components described in this section are the operating features
(Figure 2.3-1) used in the operation A+B = C, print C. For the most part, these are
groups of binary storage positions where information may be placed outside of the stor-
age unit itself. These groups are commonly called registers.
14

Multiplexor
3-17
Storage
FIGURE 2.3-1. FUNDAMENTAL SYSTEM COMPONENTS USED IN A + B= C, PRINT C
15

Besides performing a temporary storage function, the registers described also offer
the ability to break the 36-position word into lesser groups. You will see that particu-
lar ly the operation code and the address are extracted from the whole instruction word
and placed in separate registers. You will also see the use of the address field of the
instruction word as a part of the operation code.
Note that the descriptions in this section are elementary and only as complete as is
required for the problem A +B = C, print C. Other registers and switching functions
will be described in later sections.
The calculator entry and calculator exit handle information coming from or going to
the card machines (reader, punch, or printer). There is no storage here, but informa-
tion waits at these points until the data register is ready to receive the information from
calculator entry or the card punch is ready to receive the information from calculator
exit.
The data register is the receiving and distributing point for data passing to and from
the data channel. Data words are received here from input units for forwarding to
storage. Data words also come from storage to this register for forwarding to output
units.
The channel address counter, word counter, and operation register (with the com-
mand location counter) are the operating controls in the data channel. Because the lo-
cation counter is not needed in A+B = C, print C, it has been omitted from Figure 2.3-1.
The channel address counter holds the storage address for the data word being cur-
rently handled in the data channel. As a register, this counter receives a beginning
address from the address field of a command coming into a channel. As each word is
handled, the channel address counter advances one count. Thus, words are stored from
channel input in consecutive ascending locations in storage. Likewise, words withdrawn
from storage for output come from consecutive ascending locations.
The word counter, as a register, receives a word count from a command coming into
a data channel. As 'a counter, it is reduced by one each time a word is handled. The
data channel recognizes zero in the word counter as a signal that the command has been
completely executed.
The operation register receives the prefix portion of a command word coming into a
data channel. This register is decoded to dictate what operation is to be performed.
The memory address register receives, through the multiplexor, the address of a
storage word location to be entered or read out. This address may originate in the
CPU or in the data channel.
The memory data register receives a word either from a storage location, or
(through the multiplexor) from the CPU or the data channel. The latter case is for the
purpose of storing the word at the addressed location; the former is a read-out to the
CPU or data channel from the addressed location.
16

The circuits in the multiplexor are actually switching circuits rather than registers.
These switching functions allow either the CPU or the data channel to use storage for
purposes of addressing and data transmission. The multiplexor also signals storage
whether the operation is to be stored or read out, governed by control from the CPU or
data channel.
The storage register accepts a word from storage for use by the CPU, or from the
CPU for forwarding to the memory data register. This is true for both instructions
and data. The storage register also plays a part in certain arithmetic and logic opera-
tions that are not used in A+B = C, print C.
The address register and program counter are the addressing registers of the CPU.
The address register, in every CPU operation involving storage, contains the storage
address. This address is sent to the memory address register when CPU is using stor-
age.
The program counter keeps account of the progress of the program. This counter
normally advances by one after each instruction has been called for. Thus, the normal
course of events is to call for instructions from ascending addresses in storage. When
one operation is complete, the current reading in the program counter goes to the ad-
dress register for forwarding to the memory address register. The author of the pro-
gram is responsible for having the next instruction stored at this address.
The adders and accumulator are the main arithmetic components of the entire sys-
tem. Although the adders are not registers and have no capacity for holding numbers,
they play such a prominent part in almost every CPU operation that they cannot be con-
sidered as an ordinary switching circuit.
The adders perform a merging function, having the capacity for operating on an
entire word at one time. Numbers from two sources can be added together and carries
simultaneously added in. Two full words can be sent to the adders, and the complete
answer can be taken almost immediately to a register. In addition, the adders provide
the only means of entry to the accumulator and the only direct route from the address
field of the storage register to the address register.
The major use of the accumulator is to receive the output of the adders. The name
accumulator, although not completely appropriate for a noncounting, nonadding register,
is applicable in that this register receives and holds sums from the adders.
The program register receives and holds the operation code of each CPU instruction.
Decoding the configuration of binary bits in the positions of this register establishes the
controls for the operation to be done. Each time that an operation is ended and a new
one is to begin, the old operation code is cleared from the program register and the
new code is set in. Thus, the controls for the operation completed are dropped and the
controls for the new operation are brought into effect.
2.4.00 A+B = C, PRINT C
The following explanation of 7090 's operation in performing A+B = C, print C is more
detailed than the general sequence in Section 1. 4.1. Review that section before proceeding.
17

Assume that the necessary instructions and commands are in storage before the
program starts. Figure 2.4-1 shows the locations and binary bit configurations of the
words in storage when the program begins. The following discussion follows these
words sequentially as the program progresses to completion.
Before starting the program, the card with A and B punched in it is placed in the
card reader and the card reader start key is depressed. This action causes the card to
feed down to the reading brushes and the reader to go into ready status. It is now pos-
sible for the CPU to direct a data channel (let us say channel A) to run the card reader
and read the card.
The operation of the CPU starts with the depression of the start key on the CPU
console. First, the CPU must have an instruction for the very first operation. Storage
must have an address for this instruction word to locate it for the CPU. The program
counter (PC), initially zeros, contains this address, which goes to the address register
(AR) and then to the memory address register (MAR). The word in storage is now lo-
cated by its address (00000), set into the memory data register (MDR) , and sent to the
storage register (SR). At the same time that this first instruction goes to the SR, the
operation code goes to the program register (PR). Because positions 1 and 2 of the
word contain no bits, S(sign) and 3 through 11 constitute the operation code, going to S
and 1 through 9 of the PRo
The function of the PC for the first instruction is finished when the PR receives the
operation code. It then advances one to 00001 in preparation for calling in the next
instruction when the first has completed its operation.
The function of the first instruction is to select the card reader on channel A. De-
coding PR (S-9) indicates only a read select, so CPU looks to the SR (23-35) for a
channel and unit selection. Here, the reader on channel A is indicated. Channel A
acknowledges the selection of its reader if the reader is ready to run, and the CPU is
free to go on to another instruction.
The program counter (PC) now reads 00001, so that when the CPU requests a word
from storage, the second instruction comes to the SR and PRo This occurs in the same
manner described for the first instruction, and the PC advances to 00002.
Decoding the new bit configuration in PR (S-9) at this time indicates that the channel
registers are to be reset and a command is to be received. The CPU has the address
of the command in SR (21-35), so this address goes through adders 3-17 to the AR and
MAR. At the same time, PR decoding in the CPU causes the word at this address,
00012 (Figure 2.4-1), to go to channel A rather than to the CPU. Channel A receives
the operation code of the word (S, 1, 2) in its operation register, the word count (3-17)
in its word counter (WC), and the first storage address (21-35) in its channel address
counter (CAC).
At this point in the program, all operations have occurred at electronic speed within
a few microseconds. Channel A has its reader selected for a reading operation, a
disconnect-type operation code, a word count of two, and a beginning address where the
first of the two words is to be stored. The reader feeds and reads the card, and channel
A stores the first word at 00014 according to the CAC. The WC decreases to 1 and the
18

S 1 234 5 678 91011121314151617181920212223242526272829303132333435
10001111:110;01 oio 0 0:0 0 010 0 010 0 0:001;011;01 oio 011
00000- Read
Select
Channel A Card Reader
10 0 011 0 1 i1 0 0:0 0 oio 0 0;0 0 010 0 010 0 0;0 0 0;0 0 0;0 0 1:0 01
00001- Reset
Channel A Registers and Load a Command From Location 00012
10 0 010 0 0:1 1 oio 0 0;0 0 0;0 0 010 0 010 0 0;0 0 0:0 0 010 0 oio 01
00002-
While Channel A is In Operation, Take the Next Instruction From Location 00002
10 0 011 0 110 0 0:0 0 0:0 0 0;0 0 010 0 010 0 0:0 0 0;0 0 0:0 0 1: 1 0 01
00003-
Clear the AC and Enter the Contents of Location 00014 (A)
10 0 011 0 0;0 a 0;0 a 0iO a 0;0 a 010 a 010 a 0;0 a 0;0 a 010 a 1: 1 a 1I
00004- Add
to the Contents of the AC From Location 00015 (B)
10 a a 11
0;0 a oio a 1 :0 0 0;0 a 010 a 010 a 0;0 a 0:0 0 oio a 1:0 a 1I
00005- Store
the Contents of the AC at Location 00011 (C)
10 0 a 11 oio a oio a 010 a 010 a 0;0 a 1:0 1 1:1
0;0 01
00006-
Write Select
Channel A Printer
10 a 01101110 oio 0 010 a 0:0 0 010 a 010 0 0:0 0 oio 0 olo 01:0 11
00007- Reset
Channel A Registers and Load a Command From Location 00013
10 0 010 0 oio 0 0:0 0 oio 0 oio 0 010 0 010 0 oio 0 oio 0 0;0 0 0:0 a 01
00010- Halt CPU Operation. When Started Again, Take the Next Instruction From Location 00000
00011- This Location is Reserved for C.
10 0 010 0 OiO 0 0:0 0 0:0 0 0;0 1 010 a 010 a ala 0 oio 0 0:0 0 1: 1 a 01
00012- Run the Selected I/o Unit for Only Two Words, Starting at Location 00014 (Read A and B)
10 0 010 0 0;0 a 0:0 a 0;0 0 0:0 a 110 a 010 0 0;0 a 0:0 a 0;0 a 1io a 1I
00013-
Run the Selected I/O Unit for Only One Word, Located at 00011 (Print C)
FIGURE 2.4-1. PROGRAM WORDS FOR A + B= C, PRINT C
19