IEPC EPC9067 User manual

Development Board
EPC9067
Quick Start Guide
EPC8009
65 V Half Bridge with Sync FET Bootstrap Gate Drive

QUICK START GUIDE
EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2017 | | 2
Demonstration System EPC9067
DESCRIPTION
The EPC9067 development board is a 65 V maximum device voltage,
2.7 A maximum output current, half bridge with onboard gate drives,
featuring the EPC8009 enhancement mode (eGaN®) eld eect transistor
(FET). The gate driver has been congured with a synchronous FET
bootstrap circuit featuring the EPC2038 eGaN FET that eliminates high
side device losses induced by the reverse recovery losses of the internal
bootstrap diode of the gate driver. The purpose of this development
board is to simplify the evaluation process of the EPC8009 eGaN FET by
including all the critical components on a single board that can be easily
connected into any existing converter. The inclusion of the synchronous
FET bootstrap circuit enables signicant increase in operating frequency
capability of the half bridge circuit.
The EPC9067 development board is 2” x 1.5”and has two EPC8009 eGaN
FETs in a half bridge conguration using Texas Instruments LM5113 gate
driver with supply and bypass capacitors. The board contains all critical
components and layout for optimal switching performance. There are
also various probe points to facilitate simple waveform measurement
and eciency calculation. The board includes pads for the inclusion of
customer components to facilitate testing in a Buck converter or ZVS
class-D amplier congurations. A complete block diagram of the circuit
is given in gure 1.
For more information on the EPC8009 and EPC2038 eGaN FETs please
refer to the datasheet available from EPC at www.epc-co.com. The
datasheet should be read in conjunction with this quick start guide.
Table 1: Performance Summary (TA= 25°C) EPC9067
Symbol Parameter Conditions Min Max Units
VDD Gate Drive Input Supply
Range 7.5 12 V
VIN Bus Input Voltage Range 52* V
VOUT Switch Node Output Voltage 65 V
IOUT Switch Node Output Current 2.7* A
VPWM PWM Logic Input Voltage
Threshold
Input ‘High’
Input ‘Low’
3.5
0
6
1.5
V
V
Minimum ‘High’State Input
Pulse Width
VPWM rise and
fall time < 10ns 40 ns
Minimum ‘Low’ State Input
Pulse Width
VPWM rise and
fall time < 10ns 160#ns
*Assumes inductive load, maximum current depends on die temperature – actual maximum current
with be subject to switching frequency, bus voltage and thermals.
# Limited by time needed to ‘refresh’ high side bootstrap supply voltage.
QUICK START PROCEDURE
Development board EPC9067 is easy to set up to evaluate the performance
of the EPC8009 eGaN FET. Refer to gure 2 for proper connect and
measurement setup and follow the procedure below:
1. Congure the board for either ZVS class-D operation OR Buck converter
operation.
2. With power o, connect the input power supply bus to +VIN (J1) and
ground / return to –VIN (J4).
3. For ZVS class-D operation, with power o, connect a HF load to the HF
output (RF-J2 OR Vsw-J3 and GND-J4). For Buck converter operation,
with power o, connect a DC load to the DC output (+VOUT -J5 and
GND-J4).
4. With power o, connect the gate drive input to +VDD (J90, Pin-1) and
ground return to –VDD (J90, Pin-2).
5. With power o, connect the input PWM control signal to PWM (J70,
Pin-1) and ground return to either Pin-2 or Pin-4 of J70.
6. Turn on the gate drive supply – make sure the supply is within the
7.5 V and 12 V range.
7. Turn on the controller / PWM input source and probe switching node to
observe switching operation.
8. Turn on the bus voltage to the required value (do not exceed the
absolute maximum voltage of 52 V on VOUT). Increase voltage slowly
while monitoring operation to ensure the FETs are operating within
their datasheet parameters.
9. Once operational, adjust the bus voltage and load PWM control
within the operating range and observe the output switching
behavior, eciency and other parameters.
10. For shutdown, please follow steps in reverse.
NOTE. When measuring the high frequency content switch node, care
must be taken to avoid long ground leads. Measure the switch node by
placing the oscilloscope probe tip through the large via on the switch
node (designed for this purpose) and grounding the probe directly
across the GND terminal provided. See gure 3 for proper scope probe
technique.
EPC9067 development board

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EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2017 | | 3
Demonstration System EPC9067
Figure 2: Proper connection and measurement setup
Figure 3: Proper measurement of the switch node
Figure 1: Block diagram of EPC9067 development board
Q1
V
IN
Q2
CBypass
Level shift
PGND
Gate drive
regulator
Logic and
dead-time
adjust
VDD
GND
PWM
LBuck
COUT
CZVS
DC output
LZVS
HF output
7.5 – 12 V
DC
VIN supply
(note polarity)
High frequency
connection
Switch-node
oscilloscope probe
Ground post
Dead-time
setting
(if installed)
+
DC output
measurement
V
+
Main voltage
measurement
V
52 VDCmax
VMain supply
(note polarity)
DC output
Control signal
inputs
SMA(optional)
Do not use
probe ground lead
Ground probe
against post
Place probe tip
in large via Minimize loop

QUICK START GUIDE
EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2017 | | 4
Demonstration System EPC9067
Table 2: Bill of Materials - Amplier Board
Item Qty Reference Part Description Manufacturer/Part Number
1 1 C40 Capacitors, Ceramic, 4.7 µF, 10 V, ±20%, X5R Samsung, CL05A475MP5NRNC
2 3 C4, C5, C6 Capacitors, Ceramic, 1.0 µF, 100 V, ±10%, X7S TDK, C2012X7S2A105K125AB
3 3 C95, C96, C97 Capacitors, Ceramic, 1.0 µF, 25 V, ±10%, X5R Murata, GRM188R61E105KA12D
4 2 C71, C72 Capacitors, Ceramic, 100 nF, 25 V, ±10%, X7R TDK, C1005X7R1E104K050BB
5 2 C41, C44 Capacitors, Ceramic, 100 nF, 16 V, ±10%, X7R Murata, GRM155R71C104KA88D
6 1 C45 Capacitors, Ceramic, 22 nF, 25 V, ±10%, X7R TDK, C1005X7R1E223K050BB
7 3 C1, C2, C3 Capacitors, Ceramic, 10 nF, 100 V, ±20%, X7S TDK, C1005X7S2A103M050BB
8 2 C42, C43 Capacitors, Ceramic, 22 pF, 50 V, ±5%, NPO TDK, C1005C0G1H220J050BA
9 1 R46 Resistors, 27 KΩ, ±1%, 1/10 W Panasonic, ERJ-2RKF2702X
10 1 R70 Resistors, 10.0 KΩ, ±1%, 1/10 W Panasonic, ERJ-6ENF1002V
11 1 R74 Resistors, 191 Ω, ±1%, 1/10 W Panasonic, ERJ-2RKF1910X
12 1 R75 Resistors, 56 Ω, ±1%, 1/10 W Panasonic, ERJ-2RKF56R0X
13 1 R45 Resistors, 20 Ω, ±1%, 1/16 W Stackpole, RMCF0402FT20R0
14 1 R44 Resistors, 4.7 Ω, ±1%, ±/16 W Yageo, RC0402FR-074R7L
15 3 D45, D74, D75 Diodes, Schottky Diode, 30 V, VF=370 mV @ 1 mA, 30 mA Diodes Inc, SDM03U40-7
16 1 D40 Diodes, Schottky, 100 V, 0.2 A, VF=1 V @ 200 mA ST Microelectronics, BAT41KFILM
17 1 D41 Diodes, Zener, 5.1 V, 150 mW ±5% Bourns Inc., CD0603-Z5V1
18 1 Q44 eGaN® FET, 100 V, 500 mA, RDS(on) =2.1 Ω @ 50 mA, 5 V EPC, EPC2038
19 2 Q1, Q2 eGaN® FET, 65 V, 4.1A, RDS(on) =138 mΩ @ 500 mA, 5 V EPC, EPC8009
20 1 U95 IC's, 5 V LDO, 250 mA, up to 16VIN, Vdropout=0.33 V @ 250 mA Microchip, MCP1703T-5002E/MC
21 1 U40 IC's, Gate driver, 5.2 VDC, 1.2 A, 4.5 V to 5.5 V
Texas Instruments, LM5113TME/NOPB
22 1 U72 IC's, Logic 2 NAND Gate, 1.65 V to 5.5 V, ± 24 mA
Fairchild, NC7SZ00L6X
23 1 U71 IC's, 2 Input AND Gate, Tiny Logic, 1.65 V to 5.5 V, ± 32 mA Fairchild, NC7SZ08L6X
24 4 TP1, TP2, TP3, TP4 Test Point, Test Point Subminiature
Keystone, 5015
25 0.19 J70, J90, GP1 (See Note 1) Headers, Male Vertical, 36 Pin. 230" Contact Height, .1" Center Pitch FCI, 68001-236HLF
26 4 J1, J3, J4, J5 Headers, 2 Rows by 2 Pins .1" Male Vertical, .1" Center Pitch TE Connectivity, 5-146256-2
Optional Components
Item Qty Reference Part Description Manufacturer/Part Number
1 1 C7 Capacitors, DNP, Ceramic, 1.0 µF, 100 V, ±10%, X7S TDK, C2012X7S2A105K125AB
2 1 C46 Capacitor, DNP, Ceramic, 100 nF, 16 V, ±10%, X7R Murata, GRM155R71C104KA88D
3 3 R71, R72, R73 Resistor, DNP, 0 Ω, 1/10 W, Jumper Panasonic, ERJ-3GEY0R00V
4 2 P74, P75 Potentiometer, DNP, Multi-turn Potentiometer, 1 kΩ, ±10%, 1/4 W, 12 Turn
Top Adjustment Small Murata, PV37W102C01B00
5 1 Lbuck Inductor, DNP, 10 μH, ±20%, 3.5 A, 33 mΩ, Resonance=40 MHz, Frequency
Tested=100 KHz Wϋrth, 744314101
6 1 Lzvs Inductor, DNP, 500 nH, , Q=180, 50 MHz, DCR=16.5 mΩ, IRMS=4.3 A Coilcraft, 2929SQ-501JEB
7 1 D44 Diodes, DNP, Schottky Diode, 30 V, VF=370 mV @ 1 mA, 30 mA Diodes Inc, SDM03U40-7
8 1 J2 Connector, DNP, RP-SMA Plug, 50 Ω Linx, CONREVSMA013.062
9 1 HS1 Hardware, DNP, W= (0.590") 15 mm, by L= (0.590") 15 mm, H=(0.374")
9.5 mm, 26.2°C/W @ 200 LFM Advanced Thermal Solutions, ATS-54150D-C2-R0
Note 1 (36 pin Header to be cut as follows) J70 cut 4 pins used, J90 cut 2 pins used, GP1 cut 1 pin used
THERMAL CONSIDERATIONS
The EPC9067 development board showcases the EPC8009 eGaN FET.
Although the electrical performance surpasses that for traditional
Si devices, their relatively smaller size does magnify the thermal
management requirements. The EPC9067 is intended for bench
evaluation with low ambient temperature and convection cooling.
The addition of heat-sinking and forced air cooling can signicantly
increase the current rating of these devices, but care must be taken to
not exceed the absolute maximum die temperature of 125°C.
NOTE. The EPC9067 development board does not have any current or thermal
protection on board.

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EPC – EFFICIENT POWER CONVERSION CORPORATION | WWW.EPC-CO.COM | COPYRIGHT 2017 | | 5
Demonstration System EPC9067
Figure 4: EPC9067 - Schematic
GRH1
5 VHS 1
5 VHS 1
5 V
GL H1
U40
L M5 113T M
GRH1
GL H1
C4
D74
SDM03U4 0
D75
SDM0 3U4 0
C72
5 V
5 V
C71
5 V
10 K
12
R70
Deadtime Right
Deadtime Left
A
B
U72
NC 7S Z00L 6X
A
B
Y
U71
NC 7S Z08L 6X
5 V
5 V
.1” Male Vert.
.1” Male Vert.
2 x 2 .1” Male Vert.
2 x 2 .1” Male Vert.
.1” Male Vert.
2 x 2 .1” Male Vert.
2 x 2 .1” Male Vert.
1
2
J90
Logic Supply Regulator
V7 in
C95
1 μF, 25 V
1 μF, 25 V
100 nF, 25 V
100 nF, 25 V
1 μF, 25 V
C96
U95
MCP1703T-5002E/MC
5.0 V, 250 mA DFN
OUT
GND
IN
C97
Logic Supply
7.5 VDC - 12 VDC
GRre t1
PWM1
L _Sig
H_Sig
C1
PGND
DNP 500 nH
Lzvs
GRre t1
SMA Board Edge
J2
H_Sig
L _Sig
C42
C43
1
GP1
1
ProbeHole
PH1
1
T P1
1
T P2
Vmain
Q1GRre t1
PGND
PGND
PGND
PGND
PGND
PGND
PGND
GRH1
GL H1
Vmain
Vmain Vma in
Vmain
Vmain
1
2
3
4
J70
PWM1
PWM2
DNP
12
R73
1 2
R72
PWM2
PWM2
PWM1
PWM1
DNP 0 Ω
DNP 0 Ω
1 2
R71
PWM1
Q2
EPC8009
EPC8009
DNP
L buck
D40
BAT5 4 K F IL M
PGND
C6
Vmain
C5
PGND
Vmain
5 V
4.7 V
4.7 V
GL H1
PGND
PGND
C7
C40
HS 1
DNP
C2 C3
Output
HF
Gbtst
Q44
EPC2038
100 V, 2.8 Ω
1
2
R45
SDM0 3U4 0
D44
E MP T Y
C46
E MP T Y
D41
CD 0603-Z5V1
D45
SDM0 3U4 0
C45
C41
27 K
12
R46
4E 7
1 2
R44
100 nF, 16 V
100 nF, 16 V
C44
1
2
3
4
J3
1
2
3
4
J4
1
2
3
4
J1
SW Output
Buck Output
ZVS Tank Circuit
HF Output
Main Supply Input
GND
1
2
3
4
J5
1
T P4
PGND
1
T P3 Output
V7 in
DNP 220 Ω
20 Ω
DNP 100 Ω
1 2
R75
1 2
R74
P75
DNP 1 K
DNP 1 K
P74
Gate Driver
Ground Post
22 pF, 50 V
22 pF, 50 V
4.7 μF, 10 V
1 μF, 100 V
1 μF, 100 V
10 nF, 100 V 10 nF, 100 V
100 nF, 16 V
10 nF, 100 V
1 μF, 100 V
1 μF, 100 V
22 nF, 25 V
SMD probe loop
SMD probe loop
SMD probe loop
SMD probe loop
Synchronous Bootstrap Power Supply

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Demonstration Board Warning and Disclaimer
The EPC9067 board is intended for product evaluation purposes only and is not intended for commercial use. Replace components on the Evaluation Board only with those parts shown on
the parts list (or Bill of Materials) in the Quick Start Guide. Contact an authorized EPC representative with any questions.
This board is intended to be used by certied professionals, in a lab environment, following proper safety procedures. Use at your own risk.
As an evaluation tool, this board is not designed for compliance with the European Union directive on electromagnetic compatibility or any other such directives or regulations. As board
builds are at times subject to product availability, it is possible that boards may contain components or assembly materials that are not RoHS compliant. Ecient Power Conversion
Corporation (EPC) makes no guarantee that the purchased board is 100% RoHS compliant.
The Evaluation board (or kit) is for demonstration purposes only and neither the Board nor this Quick Start Guide constitute a sales contract or create any kind of warranty, whether express
or implied, as to the applications or products involved.
Disclaimer: EPC reserves therightatanytime,without notice, to makechanges to anyproducts describedhereintoimprovereliability, function, or design. EPCdoes notassume any liability
arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, or other intellectual property whatsoever, nor the
rights of others.
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