Intel MCS48 User manual

ImMCS-48™ Family
of Single Chip Microcomputers
USER'S MANUAL
April 1979
©Intel Corporation, 1979
9800270E

MCS-48 "Pin Configurations
P26 Ci40 J
P27 C239 3
AVccC 336 J
Varef C437 ]
AN1 C536 J
ANO C635
AVssC 734
TOC B33
VihC 932 2
POO C10 8022 31 H
P01 C11 30 D
P02 C12 29 J
P03 C13 26 2
P04 C14 27 t
P05C 16 26 -!
P06 C16 25,
P07 C17 20
ALE C18 23
TlC 19 22 3
VssC 20 21 J
VCC
P25
P24
PROG
P23
P22
P21
P20
Pi 7
P16
PIS
P14
P13
P12
P11
P10
RESET
XTAL2
XTAL 1
SUBST
P22 Ciw28 ]
F>23 c227 2
PROG r: 326 2
POO c425 h
P01 c524 3
PD2 c623 b
P03 c78021 22 2
P04 ca21 2
P06 c920 2
P06 c10 19 -
PC 7c11 18 2
ALE !- 12 17 2
T1 •~ 13 16
vss c14 15 J
VCC
P21
P20
P17
P16
P15
P14
P13
P12
P11
P10
RESET
XTAL 2
XTAL 1
PROG AND CE C140 :vcc
CEC 239 DPB 7
CLK C336 -jps 6
RESET C437 DPBs
VDnC 536 DPB4
READY £635 UPB3
io/m C34 DPB2
ior C833 DpBi
RD C922 2p%
iow C10 8355 31 -JPA7
ALEC 11 8755A 3DPAS
adql: 12 29 I] PA6
fl0lC 13 28 J™4
AD2[: 14 ?:i DPA3
AD3EIB 23 -JPA2
AD4Q16 25 3™i
AD5C17 Z4 3PAo
AD6[I IB 23 3Aio
AD?C 19 22 DAg
vssC 20 21 HA8
PCj C140 2vcc
pc„ C239 2PC2
TIMER IN C336 2PC,
RESET C437 Upc
pcsC536 1PBj
TIMER OUT C63Si Dpe6
IO/M C734 2PB5
*c833 "1 PB,
RD E932 3PB3
WR C10 8155 31 2PB ?
ALE C11 8156 30 HPB,
AD C12 2a 2pb
AD, C13 28 DPA,
ADj Q14 27 HPA6
AD3C15 ZS. 3PA^
AD4C16 25 I] PA,
AD5C17 24 1PA3
AD6C18 23 3PA2
AD7C19 22 Dpa,
VSS C20 21 3PA„
8
166"
156
CE
CE
P5t>C
P40C
P41L
P42 C
P43T
csC
progC
P23C
P22C
P21 C
P20C
gndC
8243
24 3VCc
23 3P51
22 I)P52
21 ^P53
20 It P60
IS UP61
IS 2P62
17 JP63
11, "I P73
15 JP72
141 "'J 171
12 DP70
INTEL COfiPOfWTlOH, 197S

MCS-48™
MICROCOMPUTER
USERS MANUAL
The following are trademarks of Intel Corporation and may be used only to describe
Intel products: Intel, ICE, INSITE, InteJIec, iSBC, Library Manager, MCS, Megachas-
sis, MICROMAP, MULTIBUS, PROMPT, RMX, UPI, uScope, PROMWARE, ICS and
the combination of MCS, ICE, iSBC, iCS or RMX with anumerical suffix.
Copyright ®1 978-1 979 by Intel Corporation. All rights reserved, no part of this
publication including any mnemonics contained herein may be reproduced without
the prior written permission of Intel Corporation, 3065 Bowers Avenue, Santa Clara,
CA 95051

MOIXCVII

TABLE OF CONTENTS
Chapter 1Introduction
1.0 Introduction to MCS-48™ 1-1
1.
1
The Functions of aComputer ...... 1-5
Typical Computer System 1-5
Architecture of aCPU 1-5
Computer Operations . . 1-8
1,2 Programming aMicrocomputer
Machine Language Programming
Assembly Language Programming
1.3 Developing an MCS-48™ Based Product
Education
Function Definition
Hardware Configuration
Code Generation
Prompt 48
Intellec Development System
Production
Chapter 2The Single Component MCS-48™ System
8048/8748/8035 and 8049/8039
2.0 Summary ,2-1
2.
1
Architecture 2-1
2.2 Pin Description 2-14
2.3 Programming, Verifying and Erasing EPROM 2-16
2.4 Test and Debug 2-18
8021
25Program Memory 2-20
2,6 Data Memory 2-20
21 Oscillator and Clock ,2-21
2.8 Timer/Event Counter ,2-21
2.9 Input/Output Capabilities 2-22
2.10 CPU ,2-24
2. 1
1
Reset 2-24
8022
2. 1
2
Program Memory ,2-25
2. 13 Data Memory ,2-25
2. 14 Oscillator and Clock 2-26
2. 15 Timer/Event Counter 2-26
2. 16 Input/Output 2-26
2. 17 Test and Interrupt Inputs .
.
2.18 Analog to Digital Converter
2.19 CPU
2.20 8022 Testing ......,..,
2-27
2-28
2-29
2-29

Chapter 3The Expanded MCS-48™ System
3.0 Summary 3-1
3.
1
Expansion of Program Memory 3-1
Instruction Fetch Cycle -3-1
Extended Addressing ...3-1
Restoring Port Information 3-2
Expansion Examples ....3-2
3.2 Expansion of Data Memory ,.,,...,,. 3-4
Read Write Cycle .3-4
Addressing External Memory 3-5
Examples of Data Memory Expansion 3-5
3.3 Expansion of Input/Output 3-5
I/O Expander Device 3-6
Expansion with Standard Peripherals 3-7
Combination Memory and I/O Expanders 3-7
Expansion Examples 3-8
3.4 Multi-Chip MCS-48** Systems 3-9
3.5 Bank Switching ..... 3-10
3.6 Control Signal Summary 3-11
3.7 Port Characteristics 3-11
Chapter 4Instruction Set
4.0 Introduction 4-1
Data Transfers 4-1
Accumulator Operations 4-2
Register Operations 4-2
Flags 4-2
Branch Instructions 4-2
Subroutines 4-3
Timer Instructions —4-3
Control 4-3
input/Output Instructions 4-4
4.
1
instruction Set Description 4-4
Summary 4-5
Symbols and Abbreviations 4-8
Alphabetic Listings by Mnemonic 4-9
Chapter 5Application Examples
5.0 Introduction 5-1
5. 1Hardware Examples .... . 5-1
Frequency Reference Options 5-1
Stand Alone 8048/8049 5-2
Stand Alone 8021 5-3
Stand Alone 8022 5-4
Multiple Interrupt Sources 5-5
Multiple Prioritized Interrupts 5-6
External Program Memory 5-7
Program Memory and I/O Expansion 5-8
Data Memory and I/O Expansion 5-9
II

Chapter 5Continued
5.0 Introduction (continued)
AThree Chip System ,,,.5-10
I/O Expansion Techniques 5-11
8049 Emulator Circuit 5-17
General Application Examples 5-19
5.2 Software Examples 5-22
Chapter 6MCS-
8048
8748
8035/8035L
18048/ 18748/ 18035
M8048 M8748 M8035
8049/8039/8039-6
8021
8022
8243
18243
8355
8755
8155/56
8185/8185-2
48™ Component Specifications
ROM Microcomputer 6-1
EPROM Microcomputer 6-1
Microcomputers 6-1
Industrial Temperature Microcomputers 6-10
Military Temperature Microcomputers 6-19
Microcomputers 6-28
Microcomputer ,6-33
Microcomputer 6-36
I/O Expander 6-42
Industrial Temperature 8243 6-48
ROM and I/O Expander ,6-54
EPROM and I/O Expander 6-59
RAM and I/O Expander 6-67
1024X 8-Bit Static RAM for MCS-85™ 6-81
Chapter 7Compatible MCS-48™ Components
2101A/8101A-4 1024 Bit Static MOS RAM with Separate I/O 7-1
211 1A-4 1024 Bit Static MOS RAM with Common I/O 7-5
2316E 16,384 Bit Static MOS ROM 7-9
2708 8192 1K x8EPROM 7-13
2716 16K UV Erasable PROM 7-16
5101 1024 Bit Static CMOS RAM 7-21
8205 High Speed 1Out of 8Binary Decoder 7-25
8212 Eight-Bit Input/Output Port ,7-31
8214 Priority Interrupt Control Unit 7-41
8216/8226 4-Bit Parallel Bi-Directional Bus Driver ,7-45
iii

Chapter 8Peripherals
8251 AProgrammable Communication Interface 8-1
8253/8253-5 Programmable Interval Timer 8-9
8255A/8255A-5 Programmable Peripheral Interface 8-20
8259A Programmable Interrupt Controller .... ,8-41
8273 Programmable HDLC/SOLC Controller 8-59
8278 Programmable Keyboard Interface ,..,8-62
8279/8279-5 Programmable Keyboard Display Interface ...,.».,,, 8-72
8291 QPIB Talker/ Listener 8-84
8292 GPtB Controller 8-108
8294 Data Encryption Unit ,8-110
8295 Dot Matrix Printer Controller 8-111
8041/ 8741 AUniversal Peripheral Interface 8-Bit Microcomputer 8-112
Chapter 9Support Products
Model 220 Intellec Series 11Microcomputer 9-1
Development System
Model 230 Intellec Series 11Microcomputer ..
.
9-5
Development System
Intellec Prompt 48 MCS-48 Microcomputer 9-9
Design Aid
ICE-49 MCS-48 In-Circuit Emulator 9-15
EM1 8021 Emulation Board 9-20
EM2 8022 Emulation Board --,;9-23
UPP-103 Universal PROM Programmer 9-26
Appendices
Packing Information ,A1-1
Ordering Information ,,A2-
1
iv

Chapter 1
INTRODUCTION

INTRODUCTION
1.0 Introduction to MCS-48™ -m
1.1 Functions of aComputer 1.5
1.2 Programming aMicrocomputer 1-10
1.3 Developing An MCS-48™ Based Product 1-13

MCS-48™
MICROCOMPUTER
USER'S MANUAL
The following are trademarks of Intel Corporation and may be used only to describe
Intel products: Intel, ICE, INSITE, Intellec, iSBC, Library Manager, MCS, Megachas-
sis, MICROMAP, MULTIBUS, PROMPT, RMX, UPI, uScope, PROMWARE, ICS and
the combination of MCS, ICE, iSBC, iCS or RMX with anumerical suffix.
Copyright ©1978-1979 by Intel Corporation. All rights reserved, no part of this
publication including any mnemonics contained herein may be reproduced without
the prior written permission of Intel Corporation, 3065 Bowers Avenue, Santa Clara
CA 95051

TABLE OF CONTENTS
Chapter 1Introduction
1.0 Introduction to MCS-48™ 1-1
1.1 The Functions of aComputer 1-5
Typical Computer System 1-5
Architecture of aCPU 1-5
Computer Operations 1-8
1.2 Programming aMicrocomputer 1-10
Machine Language Programming 1-10
Assembly Language Programming 1-11
1.3 Developing an MCS-48™ Based Product 1-13
Education 1-13
Function Definition 1-13
Hardware Configuration 1-13
Code Generation 1-13
Prompt 48 '1-14
Intellec Development System 1-15
Production 1-15
Chapter 2The Single Component MCS-48™ System
8048/8748/8035 and 8049/8039
2.0 Summary 2-1
2.
1
Architecture 2-1
2.2 Pin Description 2-14
2.3 Programming, Verifying and Erasing EPROM 2-16
2.4 Test and Debug 2-18
8021
2.5 Program Memory 2-20
2.6 Data Memory 2-20
2.7 Oscillator and Clock 2-21
2.8 Timer/Event Counter 2-21
2.9 Input/Output Capabilities 2-22
2. 10 CPU 2-24
2. 1
1
Reset 2-24
8022
2. 12 Program Memory 2-25
2.13 Data Memory 2-25
2. 14 Oscillator and Clock 2-26
2. 15 Timer/Event Counter 2-26
2. 16 Input/Output 2-26
2. 17 Test and Interrupt Inputs 2-27
2.18 Analog to Digital Converter 2-28
2.19 CPU 2-29
2.20 8022 Testing 2-29
i

Chapter 3The Expanded MCS-48™ System
3.0 Summary 3-1
3.
1
Expansion of Program Memory 3-1
Instruction Fetch Cycle 3-1
Extended Addressing 3-1
Restoring Port Information 3-2
Expansion Examples 3-2
3.2 Expansion of Data Memory 3-4
Read Write Cycle 3-4
Addressing External Memory 3-5
Examples of Data Memory Expansion 3-5
3.3 Expansion of Input/Output 3-5
I/O Expander Device 3-6
Expansion with Standard Peripherals 3-7
Combination Memory and I/O Expanders 3-7
Expansion Examples 3-8
3.4 Multi-Chip MCS-48™ Systems 3-9
3.5 Bank Switching 3-10
3.6 Control Signal Summary 3-11
3.7 Port Characteristics 3-11
Chapter 4Instruction Set
4.0 Introduction 4-1
Data Transfers 4-1
Accumulator Operations 4-2
Register Operations 4-2
Flags 4-2
Branch Instructions 4-2
Subroutines 4-3
Timer Instructions 4-3
Control 4-3
Input/Output Instructions 4-4
4.
1
Instruction Set Description 4-4
Summary 4-5
Symbols and Abbreviations 4-8
Alphabetic Listings by Mnemonic 4-9
Chapter 5Application Examples
5.0 Introduction 5-1
5.
1
Hardware Examples 5-1
Frequency Reference Options 5-1
Stand Alone 8048/8049 5-2
Stand Alone 8021 5-3
Stand Alone 8022 5-4
Multiple Interrupt Sources 5-5
Multiple Prioritized Interrupts 5-6
External Program Memory 5-7
Program Memory and I/O Expansion 5-8
Data Memory and I/O Expansion 5-9
ii

Chapter 5Continued
5.0 Introduction (continued)
AThree Chip System 5-10
I/O Expansion Techniques 5-11
8049 Emulator Circuit 5-17
General Application Examples 5-19
5.2 Software Examples 5-22
Chapter 6MCS-48™ Component Specifications
8048 ROM Microcomputer 6-1
8748 EPROM Microcomputer 6-1
8035/8035L Microcomputers 6-1
18048/18748/18035 Industrial Temperature Microcomputers 6-10
M8048/M8748/M8035 Military Temperature Microcomputers 6-19
8049/8039/8039-6 Microcomputers 6-28
8021 Microcomputer 6-33
8022 Microcomputer 6-36
8243 I/O Expander 6-42
I8243 Industrial Temperature 8243 6-48
8355 ROM and I/O Expander 6-54
8755 EPROM and I/O Expander 6-59
8155/56 RAM and I/O Expander 6-67
8185/8185-2 1024X 8-Bit Static RAM for MCS-85™ 6-81
Chapter 7Compatible MCS-48™ Components
2101A/8101A-4 1024 Bit Static MOS RAM with Separate I/O 7-1
211 1A-4 1024 Bit Static MOS RAM with Common I/O 7-5
2316E 16,384 Bit Static MOS ROM 7-9
2708 8192 1K x8EPROM 7-13
2716 16K UV Erasable PROM 7-16
5101 1024 Bit Static CMOS RAM 7-21
8205 High Speed 1Out of 8Binary Decoder 7-25
8212 Eight-Bit Input/Output Port 7-31
8214 Priority Interrupt Control Unit 7-41
8216/8226 4-Bit Parallel Bi-Directional Bus Driver 7-45
in

Chapter 8Peripherals
8251A Programmable Communication Interface 8-1
8253/8253-5 Programmable Interval Timer 8-9
8255A/8255A-5 Programmable Peripheral Interface 8-20
8259A Programmable Interrupt Controller 8-41
8273 Programmable HDLC/SDLC Controller 8-59
8278 Programmable Keyboard Interface 8-62
8279/8279-5 Programmable Keyboard Display Interface 8-72
8291 GPIB Talker/Listener 8-84
8292 GPIB Controller 8-108
8294 Data Encryption Unit 8-110
8295 Dot Matrix Printer Controller 8-111
8041/8741A Universal Peripheral Interface 8-Bit Microcomputer 8-112
Chapter 9Support Products
Model 220 Intellec Series 11Microcomputer 9-1
Development System
Model 230 Intellec Series 1 1 Microcomputer 9-5
Development System
Intellec Prompt 48 MCS-48 Microcomputer 9-9
Design Aid
ICE-49 MCS-48 In-Circuit Emulator 9-15
EM1 8021 Emulation Board 9-20
EM2 8022 Emulation Board 9-23
UPP-103 Universal PROM Programmer 9-26
Appendices
Packing Information A1-1
Ordering Information A2-1
IV

Chapter 1
INTRODUCTION

INTRODUCTION
1.0 Introduction to MCS-48™ 1-1
1.1 Functions of aComputer 1-5
1.2 Programming aMicrocomputer 1-10
1.3 Developing An MCS-48™ Based Product 1-13

INTRODUCTION
1.0 Introduction to MCS-48™
Recent advances in NMOS technology
have allowed Intel for the first time to place
enough capability on asingle silicon die to
create atrue single-chip microcomputer
containing all the functions required in a
digital processing system. Aset of such
microcomputers on single chips, their
variations, and optional peripherals are
collectively called the MCS-48 micro-
computer family. These products are fully
described in this manual.
The head of the family is the 8048
microcomputer which contains the following
functions in asingle 40 pin package:
8-Bit CPU
1K x8ROM Program Memory
64 x8RAM Data Memory
27 I/O Lines
8-Bit Timer/Event Counter
A2.5 or 5.0 microsecond cycle time and a
repertoire of over 90 instructions, each
consisting of either one or two cycles,
makes the single chip 8048 the equal in
performance of most presently available
multi-chip NMOS microprocessors. The
8048 is, however, atrue "low-cost"
microcomputer. Asingle 5V supply re-
quirement for all MCS-48 components
assures that "low cost" also applies to
the power supply in your system.
New Family Members
The MCS-48 family of microcomputers
which began with the 8048 and 8748 has
now been expanded with new members
which provide either more capability or
lower cost than the original family mem-
bers. While broadening the applications
possible with asingle chip microcomputer,
these new microcomputers share both the
instruction set and development support of
the 8048.
The 8049 is asingle-chip microcomputer
which is completely interchangeable with
the 8048, but contains twice the program
memory and twice the data memory of the
8048.
The 8022 is an 8021-based microcomputer
with additional memory, I/O, and an A/D
converter.
The 8021 is anew very low cost MCS-48
family member which contains asubset of
8049
2Kx8
128x8
27
8048
1Kx8
64x8
27
8021
IS
1Kx8
64x8
21
8022
2Kx8
64x8
28
FEATURES
8-BIT CPU
PROGRAM MEMORY
DATA RAM
I/O LINES
TIMER COUNTER
OSCILLATOR AND CLOCK
RESET CIRCUIT
INTERRUPT
ON CHIP FEATURES
1-1

INTRODUCTION
the 8048's instruction set and incorporates
several new features critical in low cost
applications.
Even with low component costs, however, a
project may be jeopardized by high develop-
ment and rework costs resulting from an
inflexible production design. Intel has solved
this problem by creating two pin-compatible
versions of the 8048 microcomputer: the
8048 with mask Programmable ROM pro-
gram memory for low cost production and
the 8748 with user programmable and
erasable EPROM program memory for
prototype development. The 8748 is essen-
tially asingle chip microcomputer "bread-
board" which can be modified over and over
again during development- and pre-produc-
tion then replaced by the low cost 8021*,
8048, or 8049 ROM for volume production.
The 8748 provides avery easy transition
from development to production and also
provides an easy vehiclefortemporaryfield
updates while new ROMs are being made.
SPECIAL FEATURES
SINGLE 5V SUPPLY
40 PIN DIP OR 28 PIN DIP
PIN COMPATIBLE ROM AND EPROM
2.5, 5.0 AND 10.0 /xsec CYCLE VERSIONS
ALL INSTRUCTIONS 1OR 2CYCLES
SINGLE STEP
8LEVEL STACK
2WORKING REGISTER BANKS
LC, XTAL, OR EXTERNAL
FREQUENCY SOURCE
OPTIONAL CLOCK OUTPUT
POWER DOWN STANDBY MODE
To allow the MCS-48 to solve awide range
of problems and to provide for future
expansion, all 8048 and 8049 functions
have been made externally expandable
using either special expanders or standard
memories and peripherals. An efficient low
cost means of I/O expansion is provided by
either the 8243 I/O Expander or standard
TTL or CMOS circuits. The 8243 provides
16 I/O lines in a24 pin package. For sys-
tems with large I/O requirements, multiple
8243s can be used.
*The 8021 is code compatible but
1-2
For such applications as Keyboards, Dis-
plays, Serial communication lines, etc.
standard MCS-80/85 peripheral circuits
may be added. Program and data memory
may be expanded using standard memories
or the 8355 and 8155 memories that also
include programmable I/O lines and timing
functions.
For applications which require amore
custom tailored interface, the 8041 or 8741
Universal Peripheral Interface (UPI-41)
devices can be used. The UPI-41 devices
are available in both ROM and EPROM
versions and are essentially slave versions
of the 8048/8748 which are designed to
interface directly with expandable MCS-48
processors and provide flexible intelligent
I/O capability. The 8041/8741 share the
instruction set of the MCS-48 family of
processors.
The 8035 and 8039 are an 8048 or 8049
respectively without internal program
memory that allows the user to match his
program memory requirements exactly by
using awide variety of external
memories. The 8035 and 8039 allow the
user to select aminimum cost system no
matter what his program memory re-
quirements. The 8035L is an 8035 with the
powerdown mode of the 8048.
The MCS-48 processors are designed to be
efficient control processors as well as
arithmetic processors. They provide an
instruction set which allows the user to
directly set and reset individual lines within
its I/O ports as well as test individual bits
within the accumulator. Alarge variety of
branch and table look-up instructions
make these processors very efficient in
implementing standard logic functions.
Also, special attention has been given to
code efficiency. Over 70% of the instruc-
tions are asingle byte long and all others
are only two bytes long. This means many
functions requiring 1.5K to 2. OK bytes in
other computers may very well be com-
pressed into the 1K words resident in the
8048 or up to 3K to 4K equivalent bytes may
be compressed into the 8049.
not pin compatible with the 8748.