Intersil ISL71218MEVAL1Z User manual

UG139 Rev.0.00 Page 2 of 14
Aug 17, 2017
UG139
Rev.0.00
Aug 17, 2017
ISL71218MEVAL1Z
Evaluation Board
USER’S MANUAL
1. Overview
The ISL71218MEVAL1Z evaluation platform is designed to evaluate the ISL71218M. The ISL71218M is a single
supply, rail-to-rail output, dual amplifier with ground sensing inputs that allow the common-mode input voltage to
swing 0.5V below the V- rail. The ISL71218M can operate from a single or dual supply with a 3V to 40V supply
range. The ISL71218M features very low power, low offset voltage, and low temperature drift, making it ideal for
applications for precision instrumentation, current sensing, and power supply and industrial process controls.
1.1 Key Features
•Wide V
IN range single or dual supply operation
• +1.8V/-1.2V to ±20V
• 3.0V to 40V
• Singled-ended or differential input operation
• External VREF input
• Banana jack connectors for power supply and VREF inputs
• BNC connectors for op amp input and output terminals
• Convenient PCB pads for op amp input/output impedance loading
1.2 Specifications
• V+ range: 1.8V to 20V
• V- range: -1.2V to -20V
1.3 Ordering Information
1.4 Related Literature
• For a full list of related documents, visit our website
•ISL71218M product page
Part Number Description
ISL71218MEVAL1Z ISL71218MEVAL1Z evaluation board

UG139 Rev.0.00 Page 3 of 14
Aug 17, 2017
ISL71218MEVAL1Z 1. Overview
Figure 1. Basic Differential Amplifier Configuration
VREF
IN+
GND
100kΩ
OPEN
OUT
ISL71218MBZ
V-
0Ω
VCM
IN-
IN+
VREF
V+
10kΩ
10kΩ
OPEN
R39, R47, R49, R50
R14, R16,
R32
R51 TO R54
R67 TO R70
IN-A
IN-B 6
2
4
11
OUT_A 1
OUT_B 7
OUT_C 8
OUT_D 14
IN-C
IN-D 13
9
IN+A
IN+B 5
3
IN+C
IN+D 12
10
R5, R7,
R9, R35
R18, R40
100kΩ
R33
-
+

UG139 Rev.0.00 Page 4 of 14
Aug 17, 2017
ISL71218MEVAL1Z 2. Functional Description
2. Functional Description
2.1 Power Supply Connections
Figure 2. Power Supply Circuit
Figure 2 shows the power supply connections, decoupling and protection circuitry. External power connections are
made through the V+, V-, VREF, and GND banana jack connections on the evaluation board. Decoupling
capacitors, C2 and C26, provide low-frequency power-supply filtering, while additional capacitors (C1, C3, C4, and
C5, connected close to the part) filter out high-frequency noise, and are connected to their respective supplies
through R37 and R48 resistors. These resistors are 0Ω but can be changed by the user to provide additional power
supply filtering, or to reduce the supply voltage rate-of-rise time. Anti-reverse diodes, D1 and D2, protect the
circuit in case of momentarily reversing the power supplies accidentally to the evaluation board. The VREF pin can
be connected to ground to establish a ground referenced input for split supply operation.
2.2 Amplifier Configuration
A simplified schematic of the evaluation board is shown in Figure 1 on page 3. The input stage with the
components supplied is shown in Figure 3. The circuit implements a Hi-Z differential input with unbalanced
common-mode impedance. The differential amplifier gain is expressed in Equation 1:
For a single-ended input with an inverting gain G = -10V/V, the IN+ input is grounded and the signal is supplied to
the IN- input. VREF must be connected to a reference voltage between the V+ and V- supply rails. For a
non-inverting operation with G = 11V/V, the negative input (IN-) is grounded and the signal is supplied to the
positive input (IN+). The non-inverting gain is strongly dependent on any resistance from IN- to GND. For good
gain accuracy, a 0Ω resistor should be installed on the empty R11 pad.
R37
D1D2 R48
C2C26
J1
J2
J4
J3
0Ω
0Ω
1µF 1µF
VREF
V+
V-
C4
0.1µF
C3
0.1µF
GND
V- V+
R44
0Ω
R1
0Ω
V- AND V+
IC SUPPLY PINS
C1
0.01µF
C5
0.01µF
VOUT VIN+
VIN-RF
RIN–VREF
+=
(EQ. 1)

UG139 Rev.0.00 Page 5 of 14
Aug 17, 2017
ISL71218MEVAL1Z 2. Functional Description
2.3 User-Selectable Options
Component pads are included to enable a variety of user-selectable circuits to be added to the amplifier inputs, the
VREF input, outputs, and the amplifier feedback loops.
A voltage divider can be added to establish a power supply-tracking common-mode reference using the VREF
input. The inverting and noninverting inputs have additional resistor and capacitor placements for adding input
attenuation or feedback capacitors (Figure 3).
The outputs (Figure 4) also have additional resistor and capacitor placements for filtering and loading.
Note: Operational amplifiers are sensitive to output capacitance and may oscillate. In the event of oscillation,
reduce output capacitance by using shorter cables, or add a resistor in series with the output.
Figure 3. Input Stage
Figure 4. Output Stage
R11
R6
R2
R5
R39
R14
10kΩ
DNP
DNP
0Ω
10kΩ
100kΩ
OPEN
TO IN-A
TO IN+A
FROM OUT_A
OPEN
C6
R20
DNP
C23
OPEN
C7
R15
0Ω
DNP
R21
IN+A
IN-A
OUT A
R51 J13
C15
R59
DNP
OPEN
0Ω
C14
OPEN
R55
DNP
R63
0Ω
R67
DNP
OUT_A

UG139 Rev.0.00 Page 6 of 14
Aug 17, 2017
ISL71218MEVAL1Z 3. PCB Layout Guidelines
3. PCB Layout Guidelines
Analog circuits can conduct noise through paths that connect it to the “outside world”. To minimize the effects of any
noise through the power lines, it is recommended to decouple the power supply pins (V+ and V-). If the trace lines to
the power supply pins are long, it is recommended to place high frequency decoupling capacitors (such as 0.1µF) right
next to the power supply in, and a larger capacitor value (such as 1µF) at the point of entry for the power supply.
3.1 ISL71218MEVAL1Z Evaluation Board
Figure 5. ISL71218MEVAL1Z Evaluation Board

UG139 Rev.0.00 Page 7 of 14
Aug 17, 2017
ISL71218MEVAL1Z 3. PCB Layout Guidelines
3.2 ISL71218MEVAL1Z Schematic Diagram
Figure 6. ISL71218MEVAL1Z Schematic
RELEASED BY:
DRAW N BY: DATE:
DATE:
ENGINEER:
TITLE:
08/01/2017
TIM KLEMANN
ISL71218SR
KIRAN BERNARD
OUT A
OUT B
C3 AND C5 CLOSE TO PART
IN- A
IN+ A
IN- B
IN+ B
V-
VREF
V+ VREF
DNP
R20
DNP
R8
DNP
R24
J9
J4
C6
0.1UF
R11
100
0
R21
DNP
R7
V+
-IN_B
OUT_B
OUTA
V- +IN_B
+IN_A
-IN_A
U1
ISL71218MBZ
1
2
3
4 5
6
7
8
R23
DNP
R5
DNP
R17
10K
J3
DNP
R14
J5
OPEN
C8
DNP
R2
J11
10K
R4
J2
0.01UF
C7
100K
R12
R22
0
DNP
R1
D1
1
2
3
10K
R10
10K
R18
J1
R15
100
0.01UF
C5
OPEN
C9
J12
J8
0.1UF
C3
OPEN
C12
100K
R13
DNP
R6
J10
OPEN
C11
J7
OPEN
C1
R19
0
OPEN
C10
1UF
C2
1UF
C4
100K
R9
J6
0
R3
100K
R16
UNNAMED_1_BNC 4G_I87_IN1
UNNAMED_1_BNC 4G_I88_IN1
UNNAMED_1_BNC 4G_I89_IN1
UNNAMED_1_BNC 4G_I90_IN1
UNNAMED_1_SMC AP_I101_AUNNAMED_1_SMC AP_I102_B
UNNAMED_1_SMC AP_I127_AUNNAMED_1_SMCAP_I127_BUNNAMED_1_SMC AP_I133_B
UNNAMED_1_SMC AP_I27_A
UNNAMED_1_SMC AP_I29_B
UNNAMED_1_SMR ES_I111_BUNNAMED_1_SMRES_I120_B
UNNAMED_1_SMRES_I129_A
UNNAMED_1_SMRES_I12_B
UNNAMED_1_SMR ES_I13_B

UG139 Rev.0.00 Page 8 of 14
Aug 17, 2017
ISL71218MEVAL1Z 3. PCB Layout Guidelines
3.3 Bill of Materials
3.4 Board Layout
Figure 7. Silkscreen
Table 1. ISL71218SRHMEVAL1Z Components Parts List
Device # Description Comments
C2, C4 CAP, SMD, 1210, 1µF, 50V, 10%, X7R, ROHS Power supply decoupling
C3, C6 CAP, SMD, 0805, 0.1µF, 50V, 10%, X7R, ROHS Power supply decoupling
C5, C7 CAP, SMD, 0603, 0.01µF, 50V, 10%, X7R, ROHS Power supply decoupling
C1, C8-C12 CAP, SMD, 0603, DNP-PLACE HOLDER, ROHS User selectable capacitors - not
populated
D1 DIODE-RECTIFIER, SMD, SOD-123, 2P, 40V, 0.5A,
ROHS
Reverse power protection
U1 ISL71218MBZ, DUAL OP-AMP, 8Ld. SOIC
R1, R2, R5-R8, R14, R20, R23,
R24,
RESISTOR, SMD, 0603, 0.1%, MF, DNP-PLACE
HOLDER
User selectable resistors - not populated
R3, R20-R22 RES, SMD, 0603, 0, 1/10W,TF, ROHS Zero ohm user selectable resistors
R4, R10, R17, R18 RES, SMD, 0603, 10k, 1/10W, 1%, TF, ROHS Gain resistors
R10, R12, R13, R16 RES, SMD, 0603, 100k, 1/10W, 1%, TF, ROHS Gain resistors

UG139 Rev.0.00 Page 10 of 14
Aug 17, 2017
ISL71218MEVAL1Z 4. Typical Performance Curves
4. Typical Performance Curves
Figure 10. Gain vs Frequency vs RL, VS = ±15V Figure 11. Gain vs Frequency vs RL, VS = ±5V
Figure 12. Output Voltage Swing vs Load Current,
VS = ±15V
Figure 13. Output Voltage Swing vs Load Current,
VS = ±5V
Figure 14. Large Signal 10V Step Response, VS= ±15V Figure 15. Large Signal 4V Step Response, VS= ±5V
Frequency (Hz)
Normalized Gain (dB)
100k 1M 10M10k1k
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
100
VS = ±15V
AV = +1
VOUT = 100mVP-P
CL = 4pF
RL = 1k
RL = 499
RL = 100
RL = 49.9
RL = OPEN, 100k, 10k
Frequency (Hz)
Normalized Gain (dB)
100k 1M 10M10k1k
-9
-8
-7
-6
-5
-4
-3
-2
-1
0
1
100
VS = ±5V
AV = +1
VOUT = 100mVP-P
CL = 4pF
RL = OPEN, 100k, 10k
RL = 1k
RL = 499
RL = 100
RL = 49.9
V
OH
0
V
OL
I-Force (mA)
11
12
13
14
15
-15
-14
-13
-12
-11
2218161412108642
10
-10
0°C
-40°C
+25°C
+75°C
+125°C
20 24
-55°C
VS = ±15V
AV = 2
VIN = ±7.5V-DC
RF = RG = 100k
V
OH
V
OL
I-Force (mA)
1
2
3
4
5
-5
-4
-3
-2
-1
VS = ±5V
AV = 2
VIN = ±2.5V-DC
RF = RG = 100k
0°C
-40°C
+25°C
+75°C
+125°C
-55°C
022181614121086422024
-6
-4
-2
0
2
4
6
0 102030405060708090100
V
OUT
(V)
Time (µs)
VS = ±15V
AV = 1
RL = 2k
CL = 4pF
0 102030405060708090100
V
OUT
(V)
Time (µs)
-2.4
-2.0
-1.6
-1.2
-0.8
-0.4
0
0.4
0.8
1.2
1.6
2.0
2.4
VS = ±5V
AV = 1
RL = 2k
CL = 4pF

Corporate Headquarters
TOYOSU FORESIA, 3-2-24 Toyosu,
Koto-ku, Tokyo 135-0061, Japan
www.renesas.com
Contact Information
For further information on a product, technology, the most
up-to-date version of a document, or your nearest sales
office, please visit:
www.renesas.com/contact/
Trademarks
Renesas and the Renesas logo are trademarks of Renesas
Electronics Corporation. All trademarks and registered
trademarks are the property of their respective owners.
IMPORTANT NOTICE AND DISCLAIMER
RENESAS ELECTRONICS CORPORATION AND ITS SUBSIDIARIES (“RENESAS”) PROVIDES TECHNICAL
SPECIFICATIONS AND RELIABILITY DATA (INCLUDING DATASHEETS), DESIGN RESOURCES (INCLUDING
REFERENCE DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND
OTHER RESOURCES “AS IS” AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS OR IMPLIED,
INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
PARTICULAR PURPOSE, OR NON-INFRINGEMENT OF THIRD PARTY INTELLECTUAL PROPERTY RIGHTS.
These resources are intended for developers skilled in the art designing with Renesas products. You are solely responsible
for (1) selecting the appropriate products for your application, (2) designing, validating, and testing your application, and (3)
ensuring your application meets applicable standards, and any other safety, security, or other requirements. These
resources are subject to change without notice. Renesas grants you permission to use these resources only for
development of an application that uses Renesas products. Other reproduction or use of these resources is strictly
prohibited. No license is granted to any other Renesas intellectual property or to any third party intellectual property.
Renesas disclaims responsibility for, and you will fully indemnify Renesas and its representatives against, any claims,
damages, costs, losses, or liabilities arising out of your use of these resources. Renesas' products are provided only subject
to Renesas' Terms and Conditions of Sale or other applicable terms agreed to in writing. No use of any Renesas resources
expands or otherwise alters any applicable warranties or warranty disclaimers for these products.
(Rev.1.0 Mar 2020)
© 2020 Renesas Electronics Corporation. All rights reserved.
Table of contents
Other Intersil Computer Hardware manuals

Intersil
Intersil ISL6423B User manual

Intersil
Intersil ISL37101P User manual

Intersil
Intersil ISL37305P User manual

Intersil
Intersil ISL37106P User manual

Intersil
Intersil ISL97671 User manual

Intersil
Intersil ISL39000C User manual

Intersil
Intersil ISL37105P User manual

Intersil
Intersil ISL705ARH User manual

Intersil
Intersil ISL28113 User manual

Intersil
Intersil HIP6302EVAL1 Installation and operating instructions