Intersil ISL97656IRTZEVALZ Instructions for use

1
®ISL97656IRTZEVALZ Evaluation Board
Application Manual
Description
The ISL97656IRTZEVALZ is an evaluation kit for evaluating
the ISL97656, a step-up voltage regulator that operates with
high frequency and high efficiency. This evaluation kit is
designed to deliver up to 2A output current for portable
equipment and TFT-LCD display.
The ISL97656IRTZEVALZ evaluation kit provides a dip
switch that allows users to select either 620kHz or 1.2MHz
frequency.
Key Features
• A Complete Evaluation Platform for the ISL97656
Evaluation
• Input Voltage: 2.3V to 5.5V
• Proven Evaluation Board Layout
• Pb-Free (RoHS Compliant)
What is Needed
The following instruments will be needed to perform testing:
• Power Supplies
• DC Electronic Load
• Multimeters
• Oscilloscope
• Cables and Wires
Pinout
ISL97656
(10L ΜTDFN)
TOP VIEW
Quick Setup Guide
1. Connect power supply between headers of VIN and
VIN_GND. The positive output of the power supply should
be connected to VIN header. Set power supply voltage
between 2.3V and 5V, and current limit at 4A.
2. Connect E-load between headers of VOUT and
OUT_GND. The positive input of the E-load should be
connected to VOUT header. Set E-load current. The load
current should not exceed the maximum output current in
Table 1.
3. Close pins 1 and 4 of S1 to tie FREQ pin to VIN to set
1.25MHz switching frequency. Open pins 1 and 4 to pull
FREQ to ground with R4to set 620kHz.
4. Close pins 2 and 3 of S1 to tie EN pin to VIN to enable the
part. Open pins 2 and 3 to pull EN to ground with R3to
disable the part.
5. Make sure all the connections on the evaluation board
are correct, then turn on power supply and E-load. The
part starts to operate.
Maximum Output Current
The MOSFET current limit is normally 4A and guaranteed
3.8A. This restricts the maximum output current that the
ISL97656 can drive.Table 1 shows typical maximum IOUT
values for 1.2MHz switching frequency and 10µH inductor.
Ordering Information
PART NUMBER DESCRIPTION
ISL97656IRTZEVALZ Evaluation Board for ISL97656
2
3
4
1
9
8
7
10
COMP
FB
EN
GND
SS
FREQ
IN
LX
56LX
GND
TABLE 1. TYPICAL MAXIMUM IOUT VALUES
VIN
(V)
VOUT
(V)
IOMAX
(mA)
2.5 5 1790
2.5 9 990
2.5 12 750
3.3 5 2370
3.3 9 1300
3.3 12 970
5 9 1970
5 12 1470
Application Note
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2009, 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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Board Design Schematic
FIGURE 1. SCHEMATIC
C1
22µF
C6
4700pF
R1
88.7k
R2
10k
C4
27nF
C3
22µF
D1
FY0504SA
L1
10µH
1
VIN (2.3V to 5.5V)
CON1
1
GNDIN
CON1
R3
1k
C2
0.1µF
1
VOUT (12V)
CON1
1
2
4
3
S1
SW DIP-2
R4
10k
R5
10k
COMP
1
FB
2
EN
3
GND
4
GND
5LX 6
LX 7
IN 8
FREQ 9
SS 10
ISL97656
ISL97656
C7
CAP
NOTE: The thermal pad should connect to signal ground. Both grounds should connect at pins 4 and 5.
TABLE 2. ISL97656IRTZEVALZ BILL OF MATERIALS (BOM)
ITEM QTY REFERENCE PART DESCRIPTION PCB FOOTPRINT PART NUMBER VENDOR
1 1 C4 27nF 603 TDK
2 1 C6 4700pF 603 TDK
3 1 C2 0.1µF/16V 603 C1068X7R1H104K TDK
4 1 R1 88.7k 603 WALSIN
5 3 R2, R4, R5 10k 603 WR06W1002JTL WALSIN
6 1 R3 1k 603
8 1 C3 22µF 1206 GRM31CR61C226KE15L MURATA
9 1 C1 22µF 1206 GRM31CR61C226KE15L MURATA
10 1 L1 10µH SLF12575 SLF12575T-100M5R4-PF TDK
11 1 U1 IC TDFN-10 ISL97656 INTERSIL
12 OPEN C7 CAP
13 1 VOUT (12V) CON1 Powerpost
14 1 VIN (2.3V to 5.5V) CON1 Powerpost
15 1 GNDIN CON1 Powerpost
16 1 D1 FYD054SA DPAK FYD0504SATM Fairchild
17 1 ISL97656 ISL97656 TDFN-10 INTERSIL
18 1 S1 SW DIP-2 DIP4 CKN3001-ND
Application Note 1473

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May 10, 2010
PCB Layout
FIGURE 1. EVALUATION BOARD ASSEMBLY LAYER
FIGURE 2. TOP LAYER
Application Note 1473

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Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to
verify that the Application Note or Technical Brief is current before proceeding.
For information regarding Intersil Corporation and its products, see www.intersil.com
AN1473.1
May 10, 2010
PCB Layout (Continued)
FIGURE 3. BOTTOM LAYER
Application Note 1473