IXYS zilog Z8051 Series User manual

PS030302-0212
PRELIMINARY
Copyright ©2012 Zilog®, Inc. All rights reserved.
www.zilog.com
Product Specification
Z8051 Series 8-Bit Microcontrollers
Z51F6412

PS030302-0212 P R E L I M I N A R Y
Z51F6412
Product Specification
ii
DO NOT USE THIS PRODUCT IN LIFE SUPPORT SYSTEMS.
LIFE SUPPORT POLICY
ZILOG’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE
SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS PRIOR WRITTEN APPROVAL OF
THE PRESIDENT AND GENERAL COUNSEL OF ZILOG CORPORATION.
As used herein
Life support devices or systems are devices which (a) are intended for surgical implant into the body, or (b)
support or sustain life and whose failure to perform when properly used in accordance with instructions for
use provided in the labeling can be reasonably expected to result in a significant injury to the user. A criti-
cal component is any component in a life support device or system whose failure to perform can be reason-
ably expected to cause the failure of the life support device or system or to affect its safety or effectiveness.
Document Disclaimer
©2012 Zilog, Inc. All rights reserved. Information in this publication concerning the devices, applications,
or technology described is intended to suggest possible uses and may be superseded. ZILOG, INC. DOES
NOT ASSUME LIABILITY FOR OR PROVIDE A REPRESENTATION OF ACCURACY OF THE
INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED IN THIS DOCUMENT. ZILOG ALSO
DOES NOT ASSUME LIABILITY FOR INTELLECTUAL PROPERTY INFRINGEMENT RELATED
IN ANY MANNER TO USE OF INFORMATION, DEVICES, OR TECHNOLOGY DESCRIBED
HEREIN OR OTHERWISE. The information contained within this document has been verified according
to the general principles of electrical and mechanical engineering.
Z8051 is a trademark or registered trademark of Zilog, Inc. All other product or service names are the
property of their respective owners.
Warning:

PS030302-0212 P R E L I M I N A R Y Revision History
Z51F6412
Product Specification
iii
Revision History
Each instance in this document’s revision history reflects a change from its previous edi-
tion. For more details, refer to the corresponding page(s) or appropriate links furnished in
the table below.
Date
Revision
Level Description Page
Feb
2012 02 Removed references to 14mm x 14mm 64-pin LQFP package. All
Jan
2012 01 Original Zilog issue. All

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 1
Table of Contents
1. Overview................................................................................................................................................................8
1.1 Description ......................................................................................................................................................8
1.2 Features ...........................................................................................................................................................8
1.3 Ordering Information......................................................................................................................................9
1.4 Development Tools.......................................................................................................................................10
2. Block Diagram .....................................................................................................................................................13
3. Pin Assignmnet ....................................................................................................................................................14
4. Package Diagram .................................................................................................................................................16
5. Pin Description.....................................................................................................................................................18
6. Port Structures......................................................................................................................................................21
6.1 General Purpose I/O Port..............................................................................................................................21
6.2 External Interrupt I/O Port............................................................................................................................22
7. Electrical Characteristics .....................................................................................................................................23
7.1 Absolute Maximum Ratings .........................................................................................................................23
7.2 Recommended Operating Conditions...........................................................................................................23
7.3 A/D Converter Characteristics......................................................................................................................24
7.4 Voltage Dropout Converter Characteristics .................................................................................................24
7.5 Power-On Reset Characteristics ...................................................................................................................25
7.6 Brown Out Detector Characteristics.............................................................................................................25
7.7 Internal RC Oscillator Characteristics..........................................................................................................25
7.8 Ring-Oscillator Characteristics.....................................................................................................................26
7.9 PLL Characteristics.......................................................................................................................................26
7.10 DC Characteristics ......................................................................................................................................27
7.11 AC Characteristics ......................................................................................................................................28
7.12 SPI Characteristics......................................................................................................................................29
7.13 Typical Characteristics................................................................................................................................30
8. Memory................................................................................................................................................................31
8.1 Program Memory ..........................................................................................................................................31
8.2 Data Memory.................................................................................................................................................32
8.3 XSRAM Memory..........................................................................................................................................33
8.4 SFR Map........................................................................................................................................................34
9. I/O Ports ...............................................................................................................................................................37
9.1 I/O Ports ........................................................................................................................................................37
9.2 Port Register..................................................................................................................................................37
9.3 Px Port...........................................................................................................................................................39
10. Interrupt Controller............................................................................................................................................42
10.1 Overview .....................................................................................................................................................42
10.2 External Interrupt ........................................................................................................................................43
10.3 Block Diagram ............................................................................................................................................44
10.4 Interrupt Vector Table.................................................................................................................................45
10.5 Interrupt Sequence ......................................................................................................................................46
10.6 Effective Timing after Controlling Interrupt bit.........................................................................................47
10.7 Multi Interrupt.............................................................................................................................................48
10.8 Interrupt Enable Accept Timing.................................................................................................................49

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 2
10.9 Interrupt Service Routine Address..............................................................................................................49
10.10 Saving/Restore General-Purpose Registers..............................................................................................49
10.11 Interrupt Timing........................................................................................................................................50
10.12 Interrupt Register Overview .....................................................................................................................51
10.13 Interrupt Register Description ..................................................................................................................52
11. Peripheral Hardware ..........................................................................................................................................58
11.1 Clock Generator ..........................................................................................................................................58
11.2 BIT...............................................................................................................................................................62
11.3 WDT............................................................................................................................................................64
11.4 WT...............................................................................................................................................................67
11.5 Timer/PWM ................................................................................................................................................70
11.6 Buzzer Driver..............................................................................................................................................92
11.7 USART........................................................................................................................................................94
11.8 SPI .............................................................................................................................................................112
11.9 I2C..............................................................................................................................................................117
11.10 12-Bit A/D Converter..............................................................................................................................134
11.11 CALCULATOR_AI................................................................................................................................140
12. Power Down Operation....................................................................................................................................145
12.1 Overview ...................................................................................................................................................145
12.2 Peripheral Operation in IDLE/STOP Mode .............................................................................................145
12.3 IDLE mode................................................................................................................................................146
12.4 STOP mode ...............................................................................................................................................147
12.5 Release Operation of STOP1, 2 Mode .....................................................................................................148
13. RESET..............................................................................................................................................................150
13.1 Overview ...................................................................................................................................................150
13.2 Reset source...............................................................................................................................................150
13.3 Block Diagram ..........................................................................................................................................150
13.4 RESET Noise Canceller............................................................................................................................151
13.5 Power ON RESET.....................................................................................................................................151
13.6 External RESETB Input............................................................................................................................154
13.7 Brown Out Detector Processor .................................................................................................................155
14. On-chip Debug System....................................................................................................................................158
14.1 Overview ...................................................................................................................................................158
14.2 Two-pin external interface........................................................................................................................159
15. Memory Programming.....................................................................................................................................163
15.1 Overview ...................................................................................................................................................163
15.2 Flash Control and status register...............................................................................................................163
15.3 Memory map .............................................................................................................................................167
15.4 Serial In-System Program Mode...............................................................................................................169
15.5 Parallel Mode ............................................................................................................................................174
15.6 Mode entrance method of ISP and byte-parallel mode............................................................................177
15.7 Security......................................................................................................................................................178
16. Configure option ..............................................................................................................................................179
16.1 Configure option Control Register ...........................................................................................................179
17. APPENDIX......................................................................................................................................................180

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 3
List Of Figures
Figure 1-2 Single Programmer................................................................................................................12
Figure 1-3 Gang Programmer..................................................................................................................12
Figure 2-1 Z51F6412 block diagram.......................................................................................................13
Figure 3-1 Z51GF64 80-Pin LQFP assignment......................................................................................14
Figure 3-2 Z51GF64A 64 pin LQFP assignment....................................................................................15
Figure 4-1 80 pin LQFP package ............................................................................................................16
Figure 4-2 64 pin LQFP package ............................................................................................................17
Figure 6-1 General Purpose I/O Port.......................................................................................................21
Figure 6-2 External Interrupt I/O Port.....................................................................................................22
Figure 7-1 AC Timing .............................................................................................................................28
Figure 7-2 SPI Timing.............................................................................................................................29
Figure 8-1 Program memory ...................................................................................................................31
Figure 8-2 Data memory map..................................................................................................................32
Figure 8-3 Lower 128 bytes RAM..........................................................................................................33
Figure 8-4 XDATA memory area ...........................................................................................................33
Figure 10-1 External Interrupt Description.............................................................................................43
Figure 10-2 Block Diagram of Interrupt .................................................................................................44
Figure 10-3 Interrupt Vector Address Table...........................................................................................46
Figure 10-4 Effective time of interrupt request after setting IEx registers.............................................47
Figure 10-5 Execution of Multi Interrupt................................................................................................48
Figure 10-6 Interrupt Response Timing Diagram...................................................................................49
Figure 10-7 Correspondence between vector Table address and the entry address of ISP....................49
Figure 10-8 Saving/Restore Process Diagram & Sample Source...........................................................49
Figure 10-9 Timing chart of Interrupt Acceptance and Interrupt Return Instruction ............................50
Figure 11-1 Clock Generator Block Diagram.........................................................................................58
Figure 11-2 BIT Block Diagram .............................................................................................................62
Figure 11-3 WDT Block Diagram...........................................................................................................64
Figure 11-4 WDT Interrupt Timing Waveform......................................................................................66
Figure 11-5 Watch Timer Block Diagram ..............................................................................................67
Figure 11-6 Bit Timer/Event Counter2, 3 Block Diagram.....................................................................71
Figure 11-7 Timer/Event Counter0, 1 Example......................................................................................72
Figure 11-8 Operation Example of Timer/Event Counter0, 1................................................................72
Figure 11-9 16 Bit Timer/Event Counter0, 1 Block Diagram................................................................73
Figure 11-10 8-bit Capture Mode for Timer0, 1.....................................................................................74
Figure 11-11 Input Capture Mode Operation of Timer 0, 1...................................................................75
Figure 11-12 Express Timer Overflow in Capture Mode.......................................................................75
Figure 11-13 16-bit Capture Mode of Timer 0, 1 ...................................................................................76
Figure 11-14 PWM Mode........................................................................................................................77
Figure 11-15 Example of PWM at 4MHz...............................................................................................78
Figure 11-16 Example of Changing the Period in Absolute Duty Cycle at 4Mhz.................................78
Figure 11-17 Timer4 16-bit Mode Block Diagram.................................................................................83
Figure 11-18 16-bit Capture Mode of Timer x .......................................................................................84
Figure 11-19 PWM Mode........................................................................................................................85

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 4
Figure 11-20 Example of PWM at 8MHz...............................................................................................86
Figure 11-21 Buzzer Driver Block Diagram...........................................................................................92
Figure 11-22 USART Block Diagram.....................................................................................................95
Figure 11-23 Clock Generation Block Diagram.....................................................................................96
Figure 11-24 Synchronous Mode XCKn Timing....................................................................................97
Figure 11-25 frame format.......................................................................................................................98
Figure 11-26 Start Bit Sampling............................................................................................................102
Figure 11-27 Sampling of Data and Parity Bit......................................................................................102
Figure 11-28 Stop Bit Sampling and Next Start Bit Sampling.............................................................103
Figure 11-29 SPI Clock Formats when UCPHA=0..............................................................................104
Figure 11-30 SPI Clock Formats when UCPHA=1..............................................................................105
Figure 11-31 SPI Block Diagram..........................................................................................................112
Figure 11-32 SPI Transmit/Receive Timing Diagram at CPHA = 0....................................................114
Figure 11-33 SPI Transmit/Receive Timing Diagram at CPHA = 1....................................................114
Figure 11-34 I2C Block Diagram ..........................................................................................................117
Figure 11-35 Bit Transfer on the I2C-Bus.............................................................................................118
Figure 11-36 START and STOP Condition..........................................................................................118
Figure 11-37 Data Transfer on the I2C-Bus ..........................................................................................119
Figure 11-38 Acknowledge on the I2C-Bus..........................................................................................119
Figure 11-39 Clock Synchronization during Arbitration Procedure ....................................................120
Figure 11-40 Arbitration Procedure of Two Masters............................................................................120
Figure 11-41 Formats and States in the Master Transmitter Mode......................................................123
Figure 11-42 Formats and States in the Master Receiver Mode ..........................................................125
Figure 11-43 Formats and States in the Slave Transmitter Mode ........................................................127
Figure 11-44 Formats and States in the Slave Receiver Mode.............................................................129
Figure 11-45 ADC Block Diagram .......................................................................................................134
Figure 11-46 A/D Analog Input Pin Connecting Capacitor .................................................................135
Figure 11-47 A/D Power(AVDD) Pin Connecting Capacitor..............................................................135
Figure 11-48 ADC Operation for Align bit...........................................................................................135
Figure 11-49 Converter Operation Flow...............................................................................................136
Figure 11-50 Calculator Block Diagram...............................................................................................140
Figure 12-1 IDLE Mode Release Timing by External Interrupt ..........................................................146
Figure 12-2 IDLE Mode Release Timing by /RESET..........................................................................146
Figure 12-3 STOP Mode Release Timing by External Interrupt..........................................................147
Figure 12-4 Mode Release Timing by /RESET....................................................................................147
Figure 12-5 STOP1, 2 Mode Release Flow ..........................................................................................148
Figure 13-1 RESET Block Diagram .....................................................................................................150
Figure 13-2 Reset noise canceller time diagram...................................................................................151
Figure 13-3 Fast VDD rising time.........................................................................................................151
Figure 13-4 Internal RESET Release Timing On Power-Up ...............................................................152
Figure 13-5 Configuration timing when Power-on...............................................................................152
Figure 13-6 Boot Process Waveform ....................................................................................................153
Figure 13-7 Timing Diagram after RESET...........................................................................................154
Figure 13-8 Oscillator generating waveform example .........................................................................154
Figure 13-9 Block Diagram of BOD.....................................................................................................155

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 5
Figure 13-10 Internal Reset at the power fail situation.........................................................................155
Figure 13-11 Configuration timing when BOD RESET.......................................................................156
Figure 14-1 Block Diagram of On-chip Debug System .......................................................................159
Figure 14-2 10-bit transmission packet.................................................................................................160
Figure 14-3 Data transfer on the twin bus.............................................................................................160
Figure 14-4 Bit transfer on the serial bus..............................................................................................161
Figure 14-5 Start and stop condition.....................................................................................................161
Figure 14-6 Acknowledge on the serial bus..........................................................................................161
Figure 14-7 Clock synchronization during wait procedure ..................................................................162
Figure 14-8 Connection of transmission...............................................................................................162
Figure 15-1 Flash Memory Map............................................................................................................167
Figure 15-2 Address configuration of Flash memory...........................................................................168
Figure 15-3 The sequence of page program and erase of Flash memory.............................................169
Figure 15-4 The sequence of bulk erase of Flash memory...................................................................170
Figure 15-5 Pin diagram for parallel programming..............................................................................174
Figure 15-6 Parallel Byte Read Timing of Program Memory..............................................................175
Figure 15-7 Parallel Byte Write Timing of Program Memory.............................................................176
Figure 15-8 ISP mode............................................................................................................................177
Figure 15-9 Byte-parallel mode.............................................................................................................177

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 6
List Of Tables
Table 1-1 Ordering Information for the Z51F6412 MCU........................................................................9
Table 5-1 Normal Pin description ...........................................................................................................18
Table 7-1 Absolute Maximum Ratings...................................................................................................23
Table 7-2 Recommended Operation Conditions.....................................................................................23
Table 7-3 A/D Converter Characteristics................................................................................................24
Table 7-4 Voltage Dropout Converter Characteristics ...........................................................................24
Table 7-5 Power-On Reset Characteristics .............................................................................................25
Table 7-6 Brown Out Detector Characteristics.......................................................................................25
Table 7-7 Internal RC Oscillator Characteristics....................................................................................25
Table 7-8 Ring-Oscillator Characteristics...............................................................................................26
Table 7-9 PLL Characteristics.................................................................................................................26
Table 7-10 DC Characteristics ................................................................................................................27
Table 7-11 AC Characteristics ................................................................................................................28
Table 7-12 SPI Characteristics ................................................................................................................29
Table 8-1 SFR Map Summary.................................................................................................................34
Table 9-1 Register Map...........................................................................................................................38
Table 10-1 Interrupt Group Priority Level..............................................................................................42
Table 10-2 Interrupt Vector Address Table ............................................................................................45
Table 10-3 Register Map .........................................................................................................................52
Table 11-1 Register Map .........................................................................................................................59
Table 11-2 VDC current consumption....................................................................................................61
Table 11-3 Register Map .........................................................................................................................62
Table 11-4 Register Map .........................................................................................................................64
Table 11-5 Register Map .........................................................................................................................67
Table 11-6 Operating Modes of Timer....................................................................................................70
Table 11-7 PWM Frequency vs. Resolution at 8 Mhz............................................................................77
Table 11-8 Register Map .........................................................................................................................79
Table 11-9 PWM Frequency vs. Resolution at 8 Mhz............................................................................85
Table 11-10 Register Map.......................................................................................................................86
Table 11-11 Buzzer Frequency at 16MHz..............................................................................................92
Table 11-12 Register Map.......................................................................................................................93
Table 11-13 Equations for Calculating Baud Rate Register Setting ......................................................96
Table 11-14 CPOL Funtionality............................................................................................................103
Table 11-15 Register Map.....................................................................................................................105
Table 11-16 Examples of UBAUD Settings for Commonly Used Oscillator Frequencies.................111
Table 11-17 Register Map.....................................................................................................................114
Table 12-1 Peripheral Operation during Power Down Mode...............................................................145
Table 12-2 Register Map .......................................................................................................................149
Table 13-1 Reset state............................................................................................................................150
Table 13-2 Boot Process Description....................................................................................................153
Table 13-3 Register Map .......................................................................................................................156
Table 15-1 Register Map .......................................................................................................................163
Table 15-2 Program/erase Time............................................................................................................165

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 7
Table 15-3 Operation Mode ..................................................................................................................173
Table 15-4 The selection of memory type by ADDRH[7:4]................................................................174
Table 15-5 Security policy using lock-bits ...........................................................................................178

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 8
Z51F6412
CMOS SINGLE-CHIP 8-BIT MICROCONTROLLER
WITH 12-BIT A/D CONVERTER
1. Overview
1.1 Description
The Z51F6412 MCU is advanced CMOS 8-bit microcontroller with 64K bytes of Flash. This is
powerful microcontroller which provides a highly flexible and cost effective solution to many
embedded control applications. This provides the following features : 64K bytes of Flash, 256 bytes of
SRAM, 3K bytes of XRAM, general purpose I/O, 8/16-bit timer/counter, watchdog timer, watch timer,
SPI, USART, I2C, Calculator, on-chip POR and BOD, 12-bit A/D converter, buzzer driving port, 16-bit
PWM output, on-chip oscillator, and clock circuitry. The Z51F6412 MCU also supports power saving
modes to reduce power consumption.
Device Name Flash XRAM SRAM ADC Package
Z51F6412ATX
64KB 3KB 256 bytes 15 channel
80-pin LQFP
Z51F6412ARX 64-pin LQFP
1.2 Features
•CPU
-8 Bit CISC Core (8051 Compatible,2 clock
per cycle)
•64K Bytes On-chip Flash
-Endurance : 100,000 times
-Retention : 10 years
•256 Bytes SRAM(IRAM)
•3K Bytes XRAM
•General Purpose I/Os
-66 Ports (P0[7:0], P1[7:0], P2[7:0], P3[7:0],
P4[7:0], P5[7:0], P6[7:0], P7[7:0],
P8[1:0]) : 80 Pin
-52 Ports (P0[7:0], P1[7:0], P2[7:0], P3[7:0],
P4[7:0], P5[7:0], P6[3:0]) : 64 Pin
-Support TTL compatible PADs (P3[7:0],
SPI0, USART1)
•Basic Interval Timer
•Six Timers/Counters
-8Bit×2ch(16Bit×1ch) + 16Bit×4ch
•One 10-bit PWM (using Timer1)
•Four 16-bit PWMs (using Timer2,3,4,5)
•Watch Dog Timer
•Watch Timer
•2 SPIs
•4 USARTs
•I2C
•Buzzer Driving Port
•Calculator
-Multiplier mode : 16bits x 16bits
-Divider mode : 32bits / 16bits
•12 Bit A/D Converter

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 9
-15 Input channels
•Interrupt Sources
-External (8)
-Pin Change Interrupt (P0, P7) (2)
-USART (8)
-SPI (2)
-Timer (6)
-I2C (1)
-ADC (1)
-WDT (1)
-WT (1)
-BIT (1)
-NVM(Flash) (1)
•On-Chip RC-Oscillator
-16MHz (±2% after tuning)
•On-Chip PLL
-1.38MHz to 14.75MHz (max)
•Power On Reset
-1.4V
•Programmable Brown-Out Detector
-1.6V / 2.5V / 3.6V / 4.2V
•Minimum Instruction Execution Time
-125ns (@16MHz, NOP Instruction)
•Power down mode
-IDLE, STOP1, STOP2 mode
•Sub-Active mode
-System used external 32.768KHz crystal
•Operating Frequency
-1MHz ~ 10MHz (crystal oscillator)
- 2, 4, 8, 16MHz (internal RC oscillator)
-1.38MHz ~ 14.75MHz (PLL)
•Operating Voltage
-3.0V ~ 5.5V (@ 1 ~ 16 MHz)
-2.0V ~ 5.5V (@ 1 ~ 10 MHz)
•Operating Temperature : -40 ~ +85℃
•Package Type
-80 LQFP
-64 LQFP
-Pb free package
1.3 Ordering Information
Table 1-1 Ordering Information for the Z51F6412 MCU
Device Name ROM Size SRAM Size XRAM Size Package
Z51F6412ATX
64KB Flash 256 bytes 3KB
80-pin LQFP
Z51F6412ARX 64-pin LQFP

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 10
1.3.1 Part Number Suffix Designation
Zilog part numbers consist of a number of components, as indicated in the following example.
Example: Part number Z51F6412ATX is an 8-bit MCU with 64 KB of Flash memory and 3.25 KB of RAM in
an 80-pin LQFP package and operating within a –40°C to +85°C temperature range. In accordance with RoHS
standards, this device has been built using lead-free solder.
Z51 F 64 12 A T X
Temperature Range
X = –40°C to +85°C
Pin Count
R = 64 pins
T = 80 pins
Package
A = LQFP
Device Type
Flash Memory Size
64 = 64 KB Flash
Flash Memory
F = General-Purpose Flash
Device Family
Z51 = Z8051 8-Bit Core MCU
1.4 Development Tools
1.4.1 Compiler
We do not provide the compiler. Please contact third parties.
The Z51F6412 MCU core is Mentor 8051. Device ROM size of standard 8051 is smaller than 64KB.
Developer can use all kinds of third party’s standard 8051 compiler.
1.4.2 OCD emulator and debugger
The OCD (On Chip Debug) emulator supports Zilog’s 8051 series MCU emulation.
The OCD interface uses two wires interfacing between PC and MCU which is attached to user’s
system. The OCD can read or change the value of MCU internal memory and I/O peripherals. And
also the OCD controls MCU internal debugging logic, it means OCD controls emulation, step run,
monitoring, etc.

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 11
The OCD Debugger program works on Microsoft-Windows NT, 2000, XP, Vista (32bit) operating
system.
If you want to see more details, please refer OCD debugger manual. You can download debugger
S/W and manual from our web-site.
Connection:
- SCLK (Z51F6412 DSCL pin)
- SDATA (Z51F6412 DSDA pin)

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 12
1.4.3 Programmer
Single programmer:
PGMplus USB: It programs MCU device directly.
Figure 1-1 Single Programmer
OCD emulator: It can write code in MCU device too.
Because of, OCD debugging supports ISP (In System Programming).
It does not require additional H/W, except developer’s target system.
Gang programmer:
It programs 8 MCU devices at once.
So, it is mainly used in mass production line.
Gang programmer is standalone type, it means it does not require host PC.
Figure 1-2 Gang Programmer

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 13
2. Block Diagram
“*” means that the function is not included in Z51F6412A. Check APPENDIX B.
Figure 2-1 Z51F6412 block diagram
On –Chip
Debug
nTEST
M8051
CORE
SFRs SRAM
(256B)
Flash
(64K byte)
Power on
Reset
Brown Out
Detector
INT-RC OSC
16MHz
Voltage
Down
Convertor
P0
PORT
BIT
WDT
WT
CLOCK/
SYSTEM
CON
TIMER
&
PWM
12-BIT
ADC
DSCL / DSDA
P31/AN9
P30/AN8
P27/AN7
P26/AN6
P25/AN5
P24/AN4
P23/AN3
P22/AN2
P21/AN1
P20/AVREF/AN0
P51/EC0
P52/T0
P53/T1(PWM1)
P54/T2(PWM2)
P55/T3(PWM3)
P56/T4(PWM4)
P57/T5(PWM5)
SPI0
P37/MISO0
P36/MOSI0
P35/SCK0
P34/SSS0
I2C
P07/SDA
P06/SCL
P07~P00
SUBXIN/P04
SUBXOUT/P05
XIN/P62
XOUT/P63
nRESET
VDD VSS
USART0
P03/RxD0
P02/TxD0
P01/ACK0
P00/USS0
P50/BUZ
BUZZER
P32/AN10
P33/AN11
P34/AN12
P36/AN14
XRAM
(3KB)
VDD18
P1
PORT P17~P10
P2
PORT
P3
PORT
P4
PORT
P5
PORT
P27~P20
P37~P30
P47~P40
P57~P50
P6 *
PORT P67~P60
P7 *
PORT P77~P70
P8 *
PORT P81~P80
USART1
P33/RxD1
P32/TxD1
P31/ACK1
P30/USS1
USART2
P43/RxD2
P42/TxD2
P41/ACK2
P40/USS2
SPI1
P47/MISO1
P46/MOSI1
P45/SCK1
P44/SSS1
Calculator
P60/EC2
P61/EC3
P65/EC5
P64/EC4
Interrupt
Controller
P00 ~ P07/ PCI0
P70 ~ P77/ PCI7 *
P10/INT0
P11/INT1
P12/INT2
P13/INT3
P14/INT4
P15/INT5
P16/INT6
P17/INT7
PLL
14.75MHz
P35/AN13
USART3
P24/USS3
P25/ACK3
P26/RxD3
P26/TxD3

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 14
3. Pin Assignmnet
P14/INT4
P15/INT5
P42/TxD2
P41/ACK2
1
2
3
4
5
6
7
8
9
15
21
10
Z51F6412
P17/INT7
P16/INT6
12
13
14
11
20
16
17
18
19
22 23
P21/AN1
P20/AN0/AVREF
24 25
P23/AN3
P22/AN2
26 27
P25/ACK3/AN5
P24/USS3/AN4
28 29
P75/PCI75
P74/PCI74
30 31
P77/PCI77
P76/PCI76
32 33
VSS
34 35
P27/RxD3/AN7
P26/TxD3/AN6
36 37
P31/ACK1/AN9
P30/USS1/AN8
38 39
P33/RxD1/AN11 P32/TxD1/AN10
40
60
59
58
57
56
50
55
53
52
51
54
45
49
48
47
46
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
nTEST
VDD18
DSCL
DSDA
LPF
VDD
P63/XOUT
VSS
P62/XIN P66
P67
P65/EC5
nRESET
P64/EC4
P60/EC2
P61/EC3
P56/T4(PWM4)
P57/T5(PWM5)
P54/T2(PWM2)
P55/T3(PWM3)
P70/PCI70
P71/PCI71
P72/PCI72
P73/PCI73
VSS
VDD
P10/INT0
P11/INT1
P12/INT2
P13/INT3
P53/T1(PWM1)
P52/T0
P51/EC0
P50/BUZ
P47/MISO1
P46/MOSI1
P45/SCK1
P44/SSS1
VDD
VSS
P81
P80
P43/RxD2
P40/USS2
P37/MISO0
P36/MOSI0/AN14
P35/SCK0/AN13
P34/SSS0/AN12
41
43
42
44
P00/PCI00/USS0
P01/PCI01/ACK0
P02/PCI02/TxD0
P03/PCI03/RxD0
P04/PCI04/SUBXIN
P05/PCI05/SUBXOUT
P06/PCI06/SCL
P07/PCI07/SDA
VDD
Figure 3-1 Z51GF64 80-Pin LQFP assignment

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 15
P00/PCI00/USS0
P01/PCI01/ACK0
P02/PCI02/TxD0
P03/PCI03/RxD0
P04/PCI04/SUBXIN
P05/PCI05/SUBXOUT
P06/PCI06/SCL
P07/PCI07/SDA
P14/INT4
P15/INT5
P42/TxD2
P41/ACK2
1
2
3
4
5
6
7
8
11
17
Z51F6412
P17/INT7 P16/INT6
9
10
16
12
13
14
15
18 19
P21/AN1
P20/AN0/AVREF
20 21
P23/AN3
P22/AN2
22 23 24 25
VDD
VSS
26 27 28 29
P31/ACK1/AN9
P30/USS1/AN8
30 31
P33/RxD1/AN11 P32/TxD1/AN10
32
48
47
46
45
44
43
41
42
37
40
39
38
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
nTEST
VDD18
DSCL
DSDA
LPF
VDD
P63/XOUT
VSS nRESET
P62/XIN
P60/EC2
P61/EC3
P56/T4(PWM4)
P57/T5(PWM5)
P54/T2(PWM2)
P55/T3(PWM3)
VSS
VDD
P10/INT0
P11/INT1
P12/INT2
P13/INT3
P53/T1(PWM1)
P52/T0
P51/EC0
P50/BUZ
P47/MISO1
P46/MOSI1
P45/SCK1
P44/SSS1
P43/RxD2
P40/USS2
P37/MISO0
P36/MOSI0/AN14
P35/SCK0/AN13
P34/SSS0/AN12
33
35
34
36
P25/ACK3/AN5
P24/USS3/AN4
P27/RxD3/AN7
P26/TxD3/AN6
Figure 3-2 Z51GF64A 64 pin LQFP assignment

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 16
4. Package Diagram
Figure 4-1 80 pin LQFP package

Z51F6412
Product Specification
PS030302-0212 P R E L I M I N A R Y 17
Figure 4-2 64 pin LQFP package