Kenwood Ts-850s User manual

1

HF

TRANSCEIVER

TS-8508

SERVICE

MANUAL

Knob

(K29-4512-04) x 4

Knob

(K23-0794-04l

TS-8508

KENWOOD

Knob

(K29-4513-04) (K29-4515-04) x 3 Metallic cabinet {Top)

(A01-2014-01)

Knob

(K29-3109-14) x 2

Knob

(K29-4518-04) x 5

Knob

(K29-4636-04) Cover

{F07-1327-04)

Knob

(K29-4516-04) x 3 A B

Knob

(K29-4513-04l x 4

Cylindrical receptacle

(E06-0858-15)

Phone jack

(E11-0437-05)

Knob

(K29-4518-04) x 3

Knob

(K29-4507-04)

Front glass

(B10-1159-03)

Knob

(K29-4610-04) x 2

Knob

(K21-0790-02)

B c

I

Knob

I (K29-4633-03)

I

Knob

{K29-4634-03)

Knob

(K29-4635-03)

Knob

(K29-4627-03)

Knob

(K29-4628-03)

Knob

(K29-4626-03)

c

Knob

(K29-4609-04)

Knob

(K29-3109-14) x 3

Foot

(J02-0423-04) x 2

Knob

(K29-3200-03l ,

Knob

(K29-4610-04) x 3

(K29-3200-03) (K29-3200-03l

Knob

(K29-4629-03) (K29-4630-03)

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TS-8508

CONTENTS

CIRCUIT DESCRIPTION

Frequency

Configuration

.......•......................•......• 3

Local

Oscillator

Circuit ..............•..........•.......•.•...... 5

CAR

Unit

...........................................................•.•.... 6

Receiver

Circuit

Description................................. 9

Transmitter

Circuit

...............................................

13

Filter

Unit

...............................................................

16

AT

Unit

...................................................................

17

Standby

Control

Timing

.....................................

19

Digital

Control

Unit

.............................................. 24

DESCRIPTION OF COMPONENTS ......................... 36

SEMICONDUCTOR

DATA

........................................

45

PARTS LIST ................................................................

53

EXPLODED VIEW ......................................................

91

PACKING ....................................................................

95

ADJUSTMENT

........................................................... 96

TERMINAL FUNCTION...........................................

109

CIRCUIT DIAGRAMS/PC BOARD VIEWS

DC-DC (X59-1100-00) ......................................... 116

FM MIC (X59-3000-03) ....................................... 116

AIP

SW

(X59-3900-00) ....................................... 116

NB2 (X59-3910-00) .............................................

116

RF

UNIT

(X44-3120-00) ................·......................

117

FINAL

UNIT

(X45-1470-02) ...............................

127

DIGITAL

UNIT

(X46-308X-XX) .........................

129

IF

UNIT

{X48-3080-00) .......................................

141

VOX (X59-1080-00) ............................................

145

TRX (XS9-3680-01 ) .

......

......................................

145

AGC (X59-3820-00) .............................................

145

SM AMP (X59-3830-00) .....................................

145

MIC

SW

(X59-3840-00) ......................................

145

MIC AMP (X59-3850-00) ....................................

145

DELAY (X59-3860-00) ........................................

146

BK

IN (X59-3870-00) ...........................................

146

BK

SW

(X59-3880-00) ........................................

146

PLL

UNIT (XS0-3130-00) ....................................

155

VC02

(XSS-3390-03) ...........................................

157

CAR

UNIT (XS0-3140-00) ...................................

161

FIL

TEA UNIT (X51-3100-00) ..............................

165

AT UNIT/AT-850 (XSJ-3340-00) .......................

169

LCD

ASSY (B38-0350-15) ..................................

173

SWITCH UNIT A (X41-3130-00) .......................

175

SWITCH UNIT B (X41-3140-00) ........................

177

SCHEMATIC DIAGRAM .........................................

179

BLOCK DIAGRAM ...................................................

187

LEVEL DIAGRAM ....................................................

189

DRU-2 (DIGITAL RECORDING UNIT) ...................

191

PS-52

(DC

POWER

SUPPLY) .................................

198

SP-31

(EXTERNAL SPEAKER) ...............................

205

VS-2 (VOICE SYNTHESIZER) ................................

207

S0-2

(TCXO UNIT) ..................................................

208

SPECIFICATIONS ....................................................

209

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TS-8508

CIRCUIT

DESCRIPTION

Frequency Configuration

The TS-850 utilizes

triple

conversion in receive

mode, double conversion in

CW

and

FM

transmit

modes, and triple conversion

in

SSS,

AM,

and

FSK

transmit modes.

When the

DSP-J

00 (digital signal processor)

is

in-

stalled, the 36.89-kHz

IF

(fourth

IF)

signal goes to the

DSP

unit during reception; during transmission, the

ANT

10kHz-30MHz

TX

MIX3

73.0SMHz

MIX2

flN

f

LOl

f L02

fl03

LOl

73.06-103.0SMHz 64.22MHz 8.375MHz

L03

input signal from the microphone or key goes to the

DSP

unit, and a 455-kHz signal goes to the main unit

according to the mode.

The

DSP

only produces a 455-

kHz

carrier

in

FM

mode, the

VCOs

operate

in

the same

way

as

when there

is

no

DSP.

455kHz DISCRI

CAR

!CW

PITCH)

455kHz

f CAR

491.892kHz (OSP ON)

--.-,.______~~MIC

OUTPUT

8.83MHz

USB

: +1.5kHz

LSB

:-1.5kHz

USB:

+1.SkHz (DSPON} (TX)

LSB:

-1.SkHz (DSP ON} (TX)

USB

: -1.SkHz

USB

: +1.SkHz

LSB : -1.SkHz

CWW

: +0.7kHz (RX)

FSK :

OHz

f L01 : Local frequency 1

f L02 : Local frequency 2

f L03 : Local frequency 3

f

CAR

:

CAR

frequency

LSB : +1.SkHz

CW (RX) :

+O.SkHz

AMR.

FMR : STOP

DSP (TX)

FSK-RX

: +2.125kHz

Fig.

1 Signal system frequency configuration

1)

Frequency configuration

The

receiver frequency

in

the

SSB

mode

is

given by

the following equation

when

the receiver tone pro-

duced by the input frequency

(flN)

from the antenna

is

zero

beat (when

an

SSB

signal with a carrier point of

f1N

is

zeroed

in):

flN

= f

L01

- f

L02

- f

L03

- f

CAR

. . .. .. .

(1)

Since all these frequencies are generated by the

DDS (Direct Digital Synthesis) system and the PLL

(Phase

Locked Loop) circuits

(as

shown

in

Fig.

2),

the

receiver frequency

is

determined only by the reference

fsTO,

the PLL divide ratio, and DDS data. Therefore,

the stability/accuracy of the reference frequency deter-

mines the overall frequency stability/accuracy

of

the

transceiver.

The stability/accuracy of the reference crystal oscil-

lator used

in

the

TS-850

is

10

ppm {-10 to +50°C).

The

stability/accuracy of the optional temperature-compen-

sated crystal oscillator

(TCXO,

S0-2}

is

0.5 ppm (-1 O

to

+50°C).

The

TS-850

local

oscillator

and

'the

CAR

DDS

circuits

are

independent of

each

other. However, they

can

be

operated

in

a way similar to a "cancel loop" configura-

tion, by changing the

CAR

and

local oscillator

data

si-

multaneously

by means

the

microprocessor. This

function allows changes

in

the fear

and

fL01

lines

when

the mode changes, and also allows the bandwidth

of

the slope tune circuits to

be

varied

(fCAR

and

fL03,

fL03

and

fL01).

4

TS-8508

CIRCUIT

DESCRIPTION

In

the transmit

SSS

or other modes, the frequency

is

determined by the reference frequency,

{fSTD),

and

the PLL divide ratio. The display frequencies

in

the

various

modes

are

listed

in

Table

1.

{In

the

FSK

mode,

the

TS-850

displays the mark transmitter frequency.)

The

pitch of the incoming signal

in

the CW mode

can

be

varied

without

changing

the center frequency of

the

IF

filter

(variable

CW

pitch system).

Since

changes

in

the receiving pitch are directly related to the side-

tone, zero-beating

is

easily done

by

receiving the de-

sired signal

so

that the receiving pitch

is

the same

as

the sidetone.

Transmission

in

the

FM

mode

is

carried out by

ap-

plying the audio

signal

from the microphone to VC02

and

modulating

fL02.

ANT

3rd

73.0SMHz 2nd

1st

73.0SMHz 2nd

VC03

73.08-103.0SMHz

The

CAR

signal

is

stopped

by

the

DSP

unit during

reception

in

the AM

and

FM

modes

and

during trans-

mission. When the

DSP

unit

is

connected, fCAR

is

switched to the signal output from the

DSP,

and

the

carrier point

is

fixed at 455kHz during transmission.

Therefore, a shift

in

the

IF

frequency

is

done

by

fL01

and

fL03

by changing the modes.

Since the reference for the

DSP

is

based

on

fsm,

the stability/accuracy

of

the operating frequency

is

unchanged

even

when the

DSP

is

connected.

8.83MHz

Mode

Display frequency

USS,

LSB

Carrier point frequency

cw

Transmit carrier frequency

FSK

Mark transmit frequency

AM. FM

IF

filter center frequency

Table 1 Display frequency

in

each mode

1st

455kHz

DSP

TIF

BM

MIC

(OSP

RX

:

491.892kHz)

AF

OUT

DSP

RIF

(36.891kHz)

FSK

SIDE

TONE

Fig.

2

PLL

system frequency configuration

5

TS-8508

CIRCUIT

DESCRIPTION

Local

Oscillator Circuit

The

TS-850 PLL circuit uses a reference frequency

of 20MHz,

and

consists of a

PLL

loop which includes

the

DDS

unit, covering 30kHz to 30MHz

in

10-Hz

or

1-

Hz

steps, a

DDS

circuit that generates other

local

oscil-

lator signals (L03,

(YlCAR,

STON).

and

a

PLL

loop that

generates

L02.

Figure 2 shows the frequency con-

figuration of the local oscillator circuit.

The divide ratio

and

DDS

data to the

PLL

loop

are

controlled by the microprocessor,

and

all

the frequen-

cies

are

based

on

the reference frequency

(fSTD).

Fig-

ure

3

is

the

PLL

block

diagram

.

012

73.08-

014

73.08-

103.05MHz

2SC2714(Y} 103.05MHz 2SC2996(Y)

015,16

013

2SC2714(Y)

09,10,11

IC3 2SC2712(Y) IC6

017

2SC3324(G) x 3

CXD1225M

2SC2714(Y)

18-48MHz

SN76514N

2SC2954(QKJ

64.22MHz

4.45-4.95MHz

DL01

20MHz

DATA

023

2SC2712(Y}

IC1

SN16913P

55.05-55.55MHz

IC7 : µPD74HC390G

018,

19,20

2SC3324(G) x 3

IC4

CXD1225M

DATA

ICS

: µPD74HC390G

026

2SC2712(Y)

Fig.

3

PLL

block diagram

1)

Refererwe oscillator circuit

The

reference frequency

(fSTD),

used for frequency

control,

is

generated by 20-MHz crystal oscillator,

X1

and

021 {2SC2714). Three outputs

are

provided; one

is

used

as

the reference for the

CAR

unit, the other

is

divided

by

three by

024

to produce a 60-MHz signal,

and

the other

is

amplified by 025,

and

divided by

IC7

and

IC8.

A 500-kHz marker

signal

appears at

TP5,

and

the 10-kHz signal passes through the active low-pass

filter, 026,

and

is

output

as

the reference

signal

for the

external

DSP

unit.

The

10-MHz

signal

is

halved

by

IC7,

and

input to

IC3

and

IC4

(CXD1225M}.

The crystal oscillator circuit

can

be replaced

by

an

optional

TCXO

(S0-2).

The

TS-850

can

be

switched to

the

TCXO

by

removing jumper resistors

W1

and

W2.

L01

L02

10kHz

20MHz

6

TS-8508

CIRCUIT

DESCRIPTION

2)L02

01 (2SK508NV)

of

VC02 (X58-3390-03) is used to

generate a

signal

of 64.22MHz.

The

10-MHz reference

frequency

(fREF)

is

applied to

5 of

IC4

(CXD1225M)

and

is

divided internally

by

500

(2000

in

FM

mode), to

produce a 20-kHz

(5-kHz

in

FM

mode) comparison fre-

quency.

The

output from VC02

is

applied to

11

of

IC4.

and

is

divided internally

by

3211

(12844

in

FM

mode). It is then compared with the 20-kHz

(5-kHz

in

FM

mode) reference

signal

by

the

phase

comparator to

lock the VC02 frequency. Divide

ratio

data

is supplied

by

the digital unit.

The output

is

amplified to about 5dBm by amplifier

017

and

passes through a low-pass filter. The imped

ance

is

converted

and

the

signal

is

output.

3)

L01

PLL

loop

Four

VCOs,

01 to

04

(2SK210

x

4),

generate 73.08-

to 103.05-MHz signals. The reference signal

of

1

OM

Hz

is

applied to

5 of

IC3

{CXD

1225M)

and

is

di-

vided by 20 internally to produce a 500-kHz compari-

son frequency. The

output

signal passes through

amplifier

012

and

a

band-pass

filter,

and

is

divided into

two

signals.

One

signal

passes

through the buffer

and

low-pass filter of

014

(2SC2996)

and

is

output to the

RF

unit.

The other signal

is

applied to pin 5

of

mixer

IC6

(SN76514N).

The

DL01 signal of 4.45 to 4.95MHz

is

input

to

5 of mixer

IC

from the carrier unit,

and

a 60-

MHz signal

(3

times the 20-MHz reference signal) is

input to

1.

The

signal

of 55.05 to 55.55MHz signal

from mixer

IC1

is

applied to

11

of mixer

IC6,

and

becomes a signal of 18.03 to 48.0MHz.

The

signal

is

output from

13,

passes through the high-pass and

low-pass filters, amplifiers

016

(2SC2714) and

015

(2SC2712),

and

is

applied

to

11

of

IC3

(CXD1225M).

This signal

is

divided by N1 internally, compared

with a 500-kHz signal

by

the phase comparator. and

the mixer output frequency

is

locked

in

500-kHz steps.

Divide

ratio

N1

is

sent from the digital unit

as

data

(76

to

136)

that covers 30kHz to 30MHz

in

500-kHz steps.

One

of the four

VCOs

is

selected according to the

VCO

switching

data

from the digital unit.

DLO1 sweeps 4.45 to 4.95MHz

in

10-Hz or 1-Hz

steps.

The

L01 output covers 73.08 to 103.05MHz

in

10-Hz

or

1-Hz

steps,

.3nd

is

output

to

the

RF

unit.

4)

PLL

data

The

TS-850

has

two

PLLs

as

shown below,

to

which

the

main

microprocessor sends

PLL

data

based

on

the

frequency indicated for each of the

PLLs

..

·

VFO

PLL

·

Local

oscillator PLL for frequency conversion

The

VCOs

are

selected depending upon conditions:

·Main

encoder changes

~

VC01

· Mode changes

~

VC02

When

each

PLL

IC

outputs

an

unlock

signal

and

one;

of the PLLs is unlocked, the display is changed to

•

.....

• (decimal points only) to indicate that a

PLL

is

unlocked.

Unlocking of

each

PLL

can

be

confirmed

by

the fact

that the status

is

output to the

AO

terminal of

8 of

the

PLL

IC

(CXD1225M)

as

UL

data.

Loop

VCO

No.

i

IC

No.

Comparison

freq'/

Variable Frequency

Divide ratio

divide

ratio

(MHz)

L01

VC01

I

IC3

SOOk/20

36-96 73.08-103.0

L02 I VC02 j

IC4

20k/500 I

3211

I

64.22

Sk/2000

(FM)

12844

(FM)

CAR

Unit

The

TS-850

CAR

unit

has

four newly developed

DDS

!Cs,

and

generates small

PLL

steps

(DLO

1)

that cover

1

OkHz

to

30MHz

in

1-Hz

steps, the third

local

oscillator

{L03),

CAR

(CAR,

MCAR), sidetone

(STON),

and

sub-

carrier signals. Kenwood's original

DDS

IC

frequency

modulation function

is

provided for

FSK

and subtone

modulation.

1)

Reference signal

The 20-MHz reference signal from the

PLL

unit

is

amplified by

03,

buffered

by

CMOS inverter

IC9,

and

supplied

to

the

DDS

!Cs

(IC1

to

IC4)

and

IC5.

This

sig-

nal

is

halved

by

IC1

to

IC4

to

produce a

DDS

reference

signal.

It

is

divided

by

5

by

ICS,

and

a 4-MHz

signal

is

supplied

to

the mixer that converts the

IC1

output to

DL01.

2) DL01 generation

Digital signals from 0.95 to 0.45MHz

are

generated

by

IC1,

converted to analog signals by the digital-to-

analog

(D/A)

converter consisting of

CP1,

CP2.

and

01,

passed through a low-pass filter,

and

are

then applied

to mixer

IC6.

Here

they

are

mixed with a 4-MHz

signal

from

IC5.

The

resulting signal

is

filtered

by

a combina-

tion of high-pass

and

low-pass filters

to

produce a

sig-

nal

in

the

range

of 4.95 to 4.45MHz.

This

signal

is

out-

put from buffer

02

to the

PLL

unit

as

DLO

1.

7

TS-8508

CIRCUIT

DESCRIPTION

3)

L03

generation

IC2

generates a digital signal with a basic frequency

of about 1.625MHz. The signal

is

converted to

an

ana-

log

signal by the D/A converter consisting

of

CP3, CP4,

and

04,

and

chopped by a circuit consisting

of

05,

06,

and

07

to

extract

the

first

harmonic

component

of

about 8.375MHz. ·undesired components

of

this sig-

nal

are removed by ceramic filters

CF1

and

CF2.

The

resulting signal is amplified by

08

and

09,

and output

as

the

L03

signal. During FM transmission, digital data

from

IC3

is

input

to

the modulator to perform sub-tone

modulation.

4)

~AR

generation

8 digital signal

of

about 455kHz

is

generated by

IC4,

coa,verted

to

an analog signal by

the

D/A

converter

consisting

of

CP7,

CPS,

and

017,

buffered by

018,

passed through a low-pass filter, and

output

as

the

CAR

signal.

In

the

FSK

mode,

FSK

modulation

is

performed di-

rectly by IC4 using the

RTK

signal supplied via digital

transistor

019

for

level

conversion.

INPUT DATA SELECT&LATCH

j(

FSK

ADDER

*

112

NRES----

DATA FORMAT

ISO

ISC

PHASE

CALC.

5)

MCAR

generation

When transmitting

in

the

SSB

and

FSK

modes,

IC3

generates a digital signal

with

a basic frequency

of

about 1.17MHz. The signal is converted to

an

analog

signal by the D/A converter consisting

of

CP3,

CP4,

and

04,

and chopped by a circuit consisting

of

011,

012,

and

013

to extract the first harmonic component

of

about

8.83MHz. Undesired

components

are re-

moved

by

ceramic filters

CF3

and

CF4,

and

the result-

ing signal is amplified by

014

and

015,

and output

as

the MCAR signal.

6) STON generation

In

the

CW

mode, a digital signal

of

the CW pitch

is

generated

by IC3,

converted

to

an

analog signal,

passed through buffer

016

and

C9 filter,

and

output

as

the

STON

signal.

7) Subtone generation

When transmitting

in

the FM mode,

IC3

generates a

digital subtone frequency, and directly outputs it to

IC2

without

converting it

to

an

analog signal.

PHASE

CONVERT

OUTPUT

ti"

OAO-DA15

CHOP

NCH

OP

1e,.

------------------'"'-----------------------'

Fig.

4 DDS IC : VM6631 block diagram and data format

8

TS-8508

CIRCUIT

DESCRIPTION

8)

DDS

The

DDS

IC

has

been

developed with standard cells

to implement a high-speed circuit

and

large-capacity

ROM

at a low cost.

• IC configuration

There

are

two

28-bit registers for programming fre-

quency data, one 28-bit frequency shift register

for

addition to the frequency registers, a 23-bit parallel

signal input section for frequency modulation with

par-

allel

signals,

and

a

data

entry

and

selection section.

There

is

a frequency-modulation section consisting

of 28-bit adders for adding frequency data and fre-

quency modulation data; a phase

data

operation sec-

tion that adds data from the frequency modulation

section

and

28-bit

phase

data

register;

and

a SIN-ROM

that converts phase

data

to sine signals.

• Frequency/shift

data

setting

30

bits

(2

bits that specify the destination for which

data

is

set

and

28

bits for frequency

data)

are

set

in

the

three internal registers using serial signals synchro-

nized with the internal clock.

• Frequency register selection

~The

data set

in

the

two

frequency registers is se-

lected by the SLAB input of the

DDS

IC. This pin

handles

the ABSL

signal

for

IC1

and

IC3,

and

the CASL

signal for IC2 and

IC4.

This function eliminates the

need for

the

TS-850 to set frequency data

for

each

transmission/reception with the microprocessor.

•

Frequency

data

selection

The

SPSL

input of the

DDS

IC

selects

whether

to

use

the

data

in

the internal frequency shift register or

the

data

from the parallel input

as

frequency modula-

tion

data.

• Frequency modulation

The

MOEN input of the

DDS

IC

enables or disables

frequency modulation. When frequency modulation

is

enabled, frequency

data

is

added,

and

the result

is

in-

put to the phase

data

operation section.

• Phase data operation

The

desired frequency phase

data

is

output by col-

lecting 28-bit frequency

data

in

the 28-bit phase accu-

mulator.

Fout =

Fs/2

28

. Dsum

Fs

:

DDS

IC

input frequency/2

Dsum: Frequency

data

+ Frequency modulation data

0

If

225

is

set for Dsum when 1/8

Fs

is

output, the

phase

data

must

be

increased

by1

/8.

A 28-bit absolute value operation

has

been used

so

far, but a 28-bit signed operation can also

be

used,

assuming that the MSB

is

a sign. If complementary

data

of

8000000 to

FFFFFFFF

(hex)

is

set, the phase

moves

in

the negative direction for the positive

data.

• SIN ROM

Phase

data

from the phase

data

operation section

is

converted

to

sine

data

of 0000 to

FFFF

(hex)

in

the

16-

bit offset binary format.

27t

= 2

28

~--FFFFH

7rr./8

=

-2

25

9)

Chopper

When the output from the

DDS

IC

is

converted to

an

analog

signal

by

the D/A converter with a ladder

resis-

tor network, the possible output frequency range

is

0

to

Fs/5.

To

obtain

an

output of 8.83/8.375MHz, 1.17/

1.625MHz is produced and then converted to 8.83/

8.375MHz by a mixer. When the DDS output spec-

trum

is

seen

when

Fs

is

1

OM

Hz,

the

basic

frequency of

1.17/1.625MHz and a harmonic component

of

8.83/

8.375MHz

can

be

recognized. The level of this

signal

component

is

lower than the

basic

signal

level

because

of

the aperture effect, and the

C/N

ratio

is

less than

ideal.

The

D/A output

is

extracted

as

a series of thin

rectangular pulses

by

the chopper that

are

used to

in-

crease the level to that of the basic signal level,

and

thus obtain

an

output with a good

C/N

ratio.

Use

of the

chopper eliminates the need for a filter

in

the mixer

input.

Without chopper

......

' -

'

l',

.,,,.

\ /

\ I

\I

\

\ \

fs 2fs 0 fs 2fs

9

TS-8508

CIRCUIT

DESCRIPTION

Receiver Circuit Description

The

basic

configuration of the receiver circuit

is

that

of a triple-conversion superheterodyne.

Fig.

5 shows

the frequency configuration.

The

incoming

signal

from the antenna

is

switched to

the receiver by the antenna switching relay

on

filter

unit (8/3). The signal passes through

an

image filter,

and

is

applied

to the

CN

1

(RA

TI

terminal of the

RF

unit

via

a

coaxial

cable.

The

signal

is

amplified

by

the first

and

second

RF

amplifiers

and

is

then

applied

to the 1st

RX

mixer. Here the

signal

is

converted into the 1st

RF

signal of 73.05MHz. The signal is then applied to a

73.05MHz MCF (Monolythic Crystal Filter) to remove

unwanted components, that result from the mixing

process,

from the incoming

signal.

The

1st

RF

signal

is

then

applied

to the 2nd

RX

mixer

in

order to obtain the

2nd

RF

frequency of 8.83MHz.

The

resulting

signal

is

then filtered to remove

the

unwanted components

that result from the mixing action. Signals

are

trans-

ferred

to

and

from the

IF

unit at 8.83MHz.

The

signal

is

converted to 455kHz

by

a third

RX

mixer

in

the

IF

unit,

and

processed to produce

an

audio

signal.

The

differences

in

operations between the TS-850

and

some of Kenwood's previous models are listed

below.

RF

ATI: The 10-dB step has been

changed

to

provide 6-dB

steps.

RF

band-pass filter:

Two

low-pass filters and 1O

band-pass filters are used for

1

OOkHz

to 30MHz. For fre-

quencies beyond the

BC

band, interference by high-

output

AM

stations is mini-

mized by passing the signals

through a high-pass filter of fc

=1.6MHz.

The

undesired

sig-

nals

in

the

7-,

14-,

and

21-MHz

antenna bands are removed

by a special adjustable nar-

row-band band-pass filter.

The TS-850 also uses these

band-pass filters in transmit

mode

to

transmit

radio

signals

RF

amplifier:

RF

gain:

with

few

spurious signals.

If

AIP

is

off,

an

RF

amplifier

is

inserted before the first

mixer. If the frequency

is

22MHz or less, the

NFB

am-

plifier using J-FETs (02,

03,

2SK125-5)

for

good large in-

put characteristics

is

selected

automatically. If the fre-

quency

is

higher than 22M

Hz,

the amplifier using a MOS-

FET

(01, 3SK131)

for

good

sensitivity is selected auto-

matically.

The

RF

gain

does not work

in

FM

mode to prevent squelch

malfunctions.

RF

UNIT

--.-~--..

IF

UNIT

RX

1st

MIX

1OOkHz-30M

Hz

RF

BPF

TX

3rd

MIX

RX

2nd

MIX

TX

2nd

MIX

L01

L02

73.

15-

64.22MHz

103.0SMHz

RX

8.83MHz

TX

RX

3rd MIX

TX

1st

MIX

L03

8.375MHz

Fig.

5 Frequency configuration

DET

MOD

CAR

455kHz

SP

MIC

10

CIRCUIT

DESCRIPTION

1)

RF

band-pass

filter

switching signal decoding

There

are

12

bands

to

be

switched,

but

only

10

out-

puts from

IC1

.

The

two

extra

bands

are

generated

by

a

logic

circuit consisting of

IC2,

048, 06,

and

07.

2)

RF

amplifier switching and

AIP

switching

Pre-amplifier High

when

017

AIP

is on

over

22MHz

035

--t>--

036

r

--

QI

BPFs

IC1

input logic

15

14

13

L H L

H L L

L L H

L L L

L H L

L L L

H H H

H H L

H L L

L H H

H L H

TS-8508

Decoder output

12

that

goes

Band-pass

filter

low

when

active

L 3

0.1-0.SMHz

L 2

0.5-1

.62MHz

0.5-1.

705MHz

(K

type}

L 5 1.62-2.SMHz

H

10

2.5-4MHz

H

06

4-7MHz

L 1

7-7.SMHz

L 9 7.5-10.SMHz

H 07

10.5-14MHz

L 4

14-14.5MHz

H

11

14.5-21MHz

L 7

21-22MHz

L 6

22-30MHz

A

IP

SW

(X59-3900-00l

-----1

Pre-amplifier

.....

0::

under

22MHz

.------~

I

Q7

029

037

$

038

03

Low

when

22

to

30-MHz

band is selected

03

I

..J

t2R

----------

av

When

this

terminal goes low,

AIP

goes on regardless

of

the

receiver frequency.

Digital

unit

AIPS

L

---,

I

__

_J

04

N

a::

Fig. 6

RF

amplifier switching and

AIP

switching

as

r--

RXB

I

L I

I

__

J

t2V

11

TS-8508

CIRCUIT

DESCRIPTION

3)

Noise blanker

The

circuit

up

to the detection

stage

is

the same

as

NB1

switch

is

on,

the

noise

pulse

passes

through 0605, 0607,

and

0604,

and

drives the

NB

gate. Since

0606

power

is

off, the pulse

signal

is

not transmitted

any

farther,

and

NB2

does not operate. When the

NB2

switch

is

on,

the noise pulse passes through 0606, 0608, and

0604.

SW

0606

JL

NB2

I

SW I

av

I

tO

~

a:::

~N

a::

>

CD

<.D

z

a:::

NB1

SW

Previous versions of N82

had

a problem that

oc-

cured when the blanking time increased, the signal

was

blanked

and

the desired

signal

was not obtained if

there was a noise with a short period, such

as

ignition

noise. This meant that the blanking time

had

to

be

about 5ms. Considering the fact that the period of

woodpecker noise

is

generally 100 nsec, the

TS-850

has

a

pulse

period identification circuit that

passes

only

pulses with a period of 1

OOms

± about 30ms to mini-

mize

the possibility of malfunction due to noise

even

if

the blanking time

is

increased.

IC601

(2/21

J:

1

15

C620

14

+

av

IC601

(1/21

NB2

(X59-3910-00l

2 3 4 10

R622

BV

C623

N

f'l1

SW

.1

..:tN

<.D

0608

a::

a:

.fl_

®

s

_n_

The

width

of the pulse at

point

B

can be varied in the range 5

to

50nsec

with

this

VR.

If

t1

s t2, the period

of

the pulse

passing through

point

A is

t1

$ x $ t2.

Fig.

7 Noise blanker circuit

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12

TS-8508

CIRCUIT

DESCRIPTION

4)

IF

filter

selection

Two optional 8.83-MHz filters

and

one

455-kHz filter

can

be

installed.

Initial

condition

Display 8.83MHz Display 455kHz

No display I

Through

(LC

filter)

12kHz L72-0315-05

6kHz l71-0266-05 6kHz L72-0319-05

2.7kHz L71-0222-05 2.7kHz L72-0333-05

500Hz*

Option

(not

installed)

500Hz*

Option

(not

installed)

270Hz*

Option

(not

installed)

Frequencies marked *

are

not displayed by operat-

ing the filter changeover switch. They can be dis-

played

by

setting the corresponding bit of

S501

in

the

RF

unit (X44-3120-00

C/4)

on

when

an

optional filter

is

installed.

Optional

filter

types

8.83MHz 455kHz

SOOHz

I

YK-88C-1

SOOHz

I

YG-455C-1

270Hz I YK-88CN-1 l

Filters

with

bandwidths other than the ones de-

scribed above

can

be installed. If this

is

done, the

bandwidth displayed

on

the main display would not

correspond with the

actual

bandwidth.

Item

Rating

Nominal center frequency 73.0SMHz

Pass

bandwidth ±

7.SkHz

or more at

3d8

Attenuation bandwidth ±30kHz

or

less at 40dB

Ripple 1.0dB or less

Insertion loss 3.0dB or less

Guaranteed attenuation

70d8

or

more

at

fo

+

(500

to

1000)

kHz)

70d6

or

more

at

fo

-

(200

to

1000)

kHz

Center frequency deviation

Within±

1.5kHz at

3d8

Input

and

output impedance

2kn

± 10%

MCF (L71-0401-05)

(RF

unit

XF1)

Item

Rating

Nominal center frequency 8830kHz

Center frequency deviation Within ±150Hz at 6dB

Passband

width

±1.3kHz or more at

6d8

Attenuation bandwidth ±

1.

7kHz or less at 20d8

±2.SkHz or less at

60d8

±3.4kHz or less at

80d8

Ripple 2d8 or less

Insertion loss 6dB or less

Guaranteed attenuation 80dB or more

in

the range

±3.4kHz to

±1

MHz

Input

and

output impedance

6000/

15pF

MCF (L71-0222-05)

(RF

unit

XF2)

Item

Rating

Nominal center frequency

(fol

8830kHz

Pass

bandwidth fo ±

3.0kHf

or more at 6d8

Attenuation bandwidth

fa±

16.0kHz or less at 60d8

fo ± 13.0kHz or less at 50dB

Guaranteed attenuation 70dB or more within fo ± 1MHz

Ripple Within 1

.OdB

Insertion loss Within 1

.SdB

Input

and

output impedance

18500

I 2pF

MCF (L71-0266-05)

(RF

unit

XF3)

Item

Rating

Nominal center frequency 455 ± 0.20kHz

6d8 bandwidth 2.9 to 3.2kHz

60d8 bandwidth

4.

7kHz or less

Guarateed attenuation 60d8 or more at

0.1

to 1MHz

Spurious 40d8 or more at 600 to 700kHz

Ripple

(in

6dB band) 2d8 or less

Insertion loss 6d8

or

less

Guaranteed attenuation 60d8

or

more

within ±40kHz

Input

and

output impedance 2kQ

Ceramic

filter

{L72-0333-05)

{IF

unit

CF1)

Item

Rating

Nominal center frequency 455kHz

6d8 bandwidth

±6kHz

or more

(at

455kHz)

50d8 bandwidth ±12.SkHz or less

(at

455kHz)

Ripple (within 455 ± 4kHzl 3dB or less

Insertion loss 6d8 or less

Guaranteed attenuation 35d8 or more

(within 455 ± 1

OOkHz)

Input

and

output impedance 2.0kQ

Ceramic

filter

(l72-0315-05)

(IF

unit

CF2)

Item

I

Rating

Nominal center frequency 455kHz

6dB bandwidth ±3kHz or more

(at

455kHzl

50dB bandwidth

±9kHz

or less

(at

455kHz)

Ripple (within 455 ± 2kHzl 2d8 or less

Insertion loss 6d8 or less

Guaranteed attenuation 60dB or more

(within 455 ± 1

OOkHzl

Input and output impedance 2.0kQ

Ceramic

filter

(L72-0319-05)

{IF

unit

CF3)

13

TS-8508

CIRCUIT

DESCRIPTION

Transmitter Circuit

The

audio signal from the microphone enters CN22

of the

IF

unit. The signal

is

split

and

directed to input/

output connector

CN21

of the optional

DRU-2

and

the

microphone amplifier module (X59-3850-00). The mi-

crophone

amplifier

module contains a microphone

amplifier with a

gain

of about 20dB

and

a mixer for

data

entry.

The

audio signal

is

amplified

by

the microphone

amplifier, passes through the mixer,

and

is

output from

the microphone amplifier module.

The signal

output

from

the microphone amplifier

module

is

split and directed to the microphone ampli-

fier output for the optional DSP-100, the FM micro-

phone amplifier,

and

the

SSB,

AM microphone

gain

po-

tentiometer.

SSB

is

mainly explained below.

The

FM

system will

be

described later.

The

signal that

is

controlled

by

the microphone

gain

potentiometer (processor potentiometer when a

speech processor is used)

on

the front panel, enters

CN

of the

IF

unit. The microphone

gain

potentiometer

or processor potentiometer output

is

switched by the

microphone switch module (X59-3840-00). The signal

from the microphone switch module

is

amplified by

026

and

modulated to 455-kHz

DSB

by

the balanced

modulator

(IC3).

The carrier

(CAR)

is

generated by the

DDS

in

the carrier unit (XS0-3140-00) (about OdBm),

and

enters

CN9

of the

IF

unit.

L04

is

split

and

directed

to

the buffer amplifier (025) for the receive

and

trans-

mit carriers.

L04

from the buffer amplifier passes

through the pin diode (028) for carrier level adjust-

ment,

and

enters the balanced modulator

(IC3).

This

diode

is

completely

on

in

SSS.

The

DSB

signal passes through ceramic filter

CF1

(2.7-kHz band) and

is

converted into

an

SSB

signal.

The signal passes through the buffer amplifier (09),

and

is

mixed with

L03

{8.375MHz) generated by the

DDS

in

the carrier unit to produce 8.83MHz.

The

8.83-

MHz

SSB

signal

enters CN19 of the

RF

unit from

CN6

of

the

IF

unit.

The signal entering the

RF

unit passes through ce-

ramic filter

CF1

{2.7-kHz

band),amplifier (020) to which

ALC

is

applied, and pin diode (089) that controls the

gain

when the power

is

controlled,

and

is

converted to

73.05MHz

by

the second mixer (023, 024).

The

signal

passes

through a three stage

LC

filte,

and

is

converted

to the desired frequency by the final mixer. The

SSB

signal converted

to

the desired frequency passes

through the receive band-pass filter,

is

amplified

by

RF

drive amplifier (05), and output to the final unit from

CN2.

The

signal

is

amplified to about 1

OOW

by

the final

unit. Harmonic components

are

attenuated

by

the fil-

ter unit,

and

the

signal

is

output from the antenna

con-

nector.

In

AM a

DC

bias

is

applied to the balanced modula-

tor

(IC3)

of

the

IF

unit

in

order to unbalance it

and

pass

the

signal.

The

carrier level

is

controlled

by

setting the

current flowing to the

diode for carrier level adjust-

ment to

an

appropriate level with the

CAR

potentiome-

ter on the front panel. For FM, the output from the

microphone amplifier module enters CN603 of the

RF

unit

(8/4)

from

CN23

of the

IF

unit, passes through the

FM

microphone amplifier module (X59-3000-03) of the

pre~emphasis

and

IDC

circuit,

is

output from CN603,

enters

CNS

of the PLL unit, and

L02

(64.22MHz)

is

modulated.

The carrier for

CW,

FM,

and

FSK

is

adjusted to

an

appropriate level

by

changing the current thru

diode

(028)

in

the

IF

unit with the carrier potentiometer.

The

carrier passes through

W1

on

the bypass line of the

455-kHz ceramic filter, enters the first mixer,

is

con-

verted to 8.83MHz,

and

enters the

RF

unit.

The

signal

passes

through the same route

as

for

SSB

and

is

trans-

mitted from the antenna. CW keying

is

periormed

by

the

ALC

voltage

and

the first

and

second gates of the

second mixer.

14

,,

<P'

(X)

-f

Ql

~

Ill

3

a

<1>

""'I

(')

::;·

(')

c:

;::;;'

c-

o

(')

"

c.

Qi'

cc

""'I

QI

3

FILTER

UNIT

AT

UNIT

FILTER

UNIT

IF

UNIT

T

~-1

r-1

r

~''011,

I I I I

L _

_J

L _

_J

RF

UNIT

a:

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--i

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PHE

ORIVE

I I

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--

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L2SC2B79•2

02,3

--

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I

BUFF I I

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a

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fu

BUFF

14----~--<'025

~~-

-----=-~1-1

- - - - - - - -

Ir

I

VSR

VSF

036,37

2SC2712

~-r--r~

L

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POWER

VSR

AMP

I

--·~

NJM2902M

L_

POWC:R

METER

AMP

IC512/41

NJM2902M

IC513/41

NJM2902M

MONITOR

AMP

MONITOR

DET

I

TIF

I

I I

TX

,.,

MIX

06,7

3SKt31•2

AN612

D2B

Ml204

MONITOR

SIDE

TONE

AMP

,.-

-

-,

AMP

KEYING

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AMP

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L

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L,_

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IC514/4J

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MOD

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PLL

UNIT

DIGITAL

UNIT

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RF

UNIT

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-

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FM

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Downloaded by

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Amateur Radio Directory

15

TS-8508

CIRCUIT

DESCRIPTION

1)

Power control and power settings

The

TS-850

power

is

controlled

in

almost the same

way

as

the TS-950. The forward wave voltage de-

tected by the filter unit enters the

RF

unit,

is

set to

an

appropriate

level

by resistor

(VR7).

and

enters differen-

tial amplifier (036, 037). The

gain

of this differential

amplifier

is

changed by changing the

base

voltage of

037. If the power

is

relatively low, such

as

in

the

S-

type minimum power condition or

AT-TUNE

condition,

the

base

voltage of

037

is

decreased,

and

the

gain

of

the

differential amplifier

is

increased. When the

gain

of

the differential amplifier

is

increased, the apparent for-

ward wave voltage increases,

and

the

ALC

circuit

op-

erates

with

less

power,

and

the maximum power

is

re-

duced.

FILTER

UNIT

----,

I

__

.

PJJ

SW

UNIT

(F/61

-----,PCJ

RF

UNIT

,-

~

--~--1

P_C_2

__,

_

__,

av

a:

> I

PCt

~

~~

__

L_G_2

-~

- I

-~-J

FINAL

UNIT

------,

___

__.._,

070

r---,

I I

L.:

_

:..J

If the drive level

is

not decreased

as

the power

is

decreased, over-drive occurs.

To

prevent this, the

gain

of the amplifier of the

signal

system

in

the

ALC

loop

is

decreased.

This

changes the

ALC

level

and

changes

the current through

diode (089) of the

RF

unit

(by

means of

VR

11

B/2

of the switch unit

[F/6]}

to set the

drive level to

an

appropriate level. The difference

be-

tween the

TS-850

and

TS-950

is

that the

TS-850

has

a

ceramic trimmer

(TC

1)

connected to the pin diode

in

parallel to adjust

and

correct the minimum drive

level.

In

AT-TUNE,

031

is

turned

on

and

034

is

turned off

by the

ATPD

signal

from the microprocessor to discon-

nect

VR11.

052

is

turned

on

to connect

R297

to the

base

of

037

to

keep

the power

at

10

W regardless of

the

power

control

potentiometer

position.

030

is

turned

on

and

032

is

turned off,

and

VR4

(TYP)

for

50-

W adjustment

is

also

disconnected.

The

resistance of

R297

determines the power for

AT-TUNE.

The TUNE mode

is

similar: when the

TPD

signal

goes low, 046, 030, 031,

and

035

are

turned

on,

the

power

control potentiometer

(VR11

A/2) and 50-W

setting potentiometer

(VR4,

TYP)

are disconnected,

and

potentiometer

{VR6,

TUNE)

for the

TUNE

mode

is

connected to the

base

of 037.

av

N

al

0

"'

N

a:

083

089

.1f

DIGITAL

UNIT

--

I TPO

---

__

_J

I

st~

]~

JIALLPoJ I

°'

-,

---BP-0

---+-+--!------'

BV

IATPOI

I POE I

I PT I

_J

Fig.

9 Power control

and

power setting

16

TS-8508

CIRCUIT

DESCRIPTION

2)

Voice

memory

operation

If the optional

ORU-2

is

installed, the voice memory

can

be

used.

Logic

for VOA and VOS

Recording 1 Monitor I Transmission

VOA

L I H I H

VOS

H I L I H

1)

During recording

Signals from the microphone

are

sent to the

VI

ter-

minal of the

DRU-2

and

are

stored into memory

on

the DRU-2.

IF

UNIT

MIC

AMP

SP~MLR

I

IC7

(1/2)

VI

VO

2)

During recall

Signals

from the

DRU-2

are

sent

to

IC7

A/2

of

the

IF

unit,

and

amplified to drive the speaker.

The

poten-

tiometer can

be

varied

by

the monitor

VR

on

the

panel.

It

is

independent of the

AF

VR

setting.

3)

During transmission

Signals

from the

DRU-2

are

output from

VI

and

sent

to the microphone amplifier.

RF

UNIT

(C/4)

VI

VOA I

I

VOS

I

VO

ORU-2

Fig.

10 Voice

memory

operation

Filter Unit

1)

Transmit low-pass filter, AT band data

Transmit

band

data

(TBO

to

T83)

from the digital unit

passes through the

RF

unit

and

digital unit (0/4),

and

is

directed to the filter unit.

The switching signal split

and

decoded

by

the filter

unit selects the transmit low-pass filter

in

the filter

unit.

and

the

AT

band

of the

AT

unit.

DIGITAL UNIT (X46-308X-XX) (A/4)

FILTER

UNIT (XSl-3100-00) (A/3)

,----1

,---

J

t3.8V

--------1

1

I I c3

I

I 011

I

L,__

--

CNT

RF

UNIT

(X44-3120-00) (A/4)

1~4

I

I I

I

-

I

L_

I

0-+

J

CD

en

CD

en

.,_

...

I-

...

:rm

I -

¢ () 0 ¢ 1

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6

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4

-

L ____

cN.:.:.J

I

Qt

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IC

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IC2

I

~

c.......!...1N1

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Ot

18

07

GNO

....

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....__,,!£

Y8

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7 z

IN2

02

17

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~

Y5

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03

16

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06

l -

IN3

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12

0

.,.

Y4

S 4

~

15

,os

l

"'

IN4

04

I

.....

13

c

~

4 S

INS

~

05

14 I

Y3

.,.

T I v

04

I

14

~

Y2

3 6

IN6

"'

06

13

I

l B

:::<

I i

15

2 7

INT

07

12

I

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16

vcc

YO

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IN8

08

11

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GNOri

m':

~§

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I

DECODER

I

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~

1•1<

<

CD

en

al

loR1v£RI !

~

.::,~

~

,_

.....

,_

CN4

)

() ()

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--

------

--

>6666600

--

,0,

I

28F

I

7F

21

F I

4F

14F I

2F

J

.,.

"'

ID,._

:

~

<J\

<%l

,.._ID

>fl.,.

DIGIT

AL UNIT

.,.

"'

ID,._

(X46-308X-XX) (0/4)

I ) ¢

()

c~e---,

I I

5 -

4 :

3 - I

2 -

L.::.:or

____

_J

Fig.

11

TX

LPF

and AT band data

17

TS-8508

CIRCUIT

DESCRIPTION

AT

Unit

1)

Auto antenna tuner

When the AUTO!fHRU switch

is

set to AUTO, the

signal

is

convertedby the digital unit, ATA goes low,

the AUTO(fHRU switching relay

K1

closes,

and

the

AT

is

inserted to prepare for tuning. If variable capacitors

VC1

and

VC2

are

not at their preset positions, they

are

set to the preset positions.

AT

TUNE operation and-

transmission do

not

start until the preset has been

completed.

When

AT

TUNE

is

turned

on,

ATS

goes high, the

mode

is

switched to CW, and the transmitter output

becomes about 1

OW.

If the VSWR

is

less than 1

.2,

tuning

is

regarded

as

completed, and the AT TUNE

operation stops.

If

the

VSWR

is

greater than 1

.2,

the duty cycle of the

motor control pulse (described later)

is

varied accord-

ing

to the

VSWR.

The

motor speed

is

determined

by

the microproces-

sor, and the direction is

determined

by the phase

comparator

(IC1)

and

amplitude comparator

(IC6)

if the

APRE

is

low,

and

by

the microprocessor if the

APRE

is

high.

• Auto tuning mode

The

transmitter power from the

final

unit

passes,

via

the filter unit, through current/voltage detection trans-

formers L1 and

L2,

which have toroidal cores. The

current

and

voltage components detected here are

rectified

by

a waveform rectification circuit consisting

of 04, 01, 07,

and

02,

and

are

then phase-compared

by

IC1

(SN74S74N).

The output signals

(0

and

0)

from

pins 8

and

9 of

IC1

are

passed through the switch

by

IC2

(TC4066BP),

and

are

applied to the motor drive

IC

(IC4).

Variable

capacitor

VC1

is

turned

by

motor

M1

so

that the phase difference of the voltage and current

components decreases.

The

voltage

and

current components detected

by

L1

and

L2

are rectified by germanium diodes

(1

N60)

01

and

02, and

are

applied to voltage comparison circuit

IC6

(NJM2903S)

as

the amplitude component of the

signal. The comparator output

is

passed through the

switch by IC3 (TC40668P).

Motor

M2

is

driven by

another motor drive

IC,

IC5

(BA6109U2). which turns

variable capacitor

VC2

in

the direction that decreases

the amplitude difference of the voltage and current

components.

Therefore, variable capacitor

VC1

adjusts the

capaci-

tance of the circuit so that the current and voltage

phases match,

and

variable capacitor

VC2

adjusts the

resistance of the circuit

so

that the current

and

voltage

amplitude difference decreases. If the phases match

and

the amplitude difference

is

zero,

the

SWR

is

1 :

1.

The speed of motors M1

and

M2

is

determined

by

the duty cycle of the pulse input to control input

8

of

IC4

and

IC5.

It

is

controlled according to the

VSWR

calculated

by

the

CPU

in

the digital unit

and

the speed

corresponding to preset or manual tuning.

Pulse signal SPED

output

from

the digital unit

passes through

05

(DTC114EK). and

is

amplified by

04

(2SA

1204) to produce a control pulse input to

IC4

and

IC5.

Filter

unit

0

AT

unit

(X53-3340-00)

~

Forward

wave/

I N

0-

reflected wave

detection

circuit

1----------------m---~

I

L1,2

~

I

AT

1I Voltage/current _ I

AT2

_

component

Matching circuit

l detection I

i l1c1,s l

_1_c_2_._3

____

1c4,5l J

~=:~~

:

I

Phase/amplitude~

>--Q

~

Motor

I

I difference

~

driver

-N I

detection

...,_..

r---0

L - -

-,

~

I A g g l

L

_______

i • • j

----

___

::~

_

_J

VSF

VSR

- N - N

LLJ

N N

a::

a:: a:: a:: a::

Cl.

a..

Cl.

a.. a..

<(

PORT

A/D

Digital

unit

0

w

Cl.

(/)

PORT

Fig.

12

Block

diagram of auto antenna tuner

,,

AID

CPU

OUT

18

TS-8508

CIRCUIT

DESCRIPTION

When the

SWR

is

3 : 1 or more, the motor runs at

high

speed since the duty cycle of

the

motor drive volt-

age

pulse

is

100%. When the

SWR

is

2 :

1,

the duty

cycle becomes about 50%,

and

the motor runs

at

low

speed.

The matching circuit used

in

the tuner

is

a T type.

The tap position from 1.8 to 30MHz

is

controlled by

seven relays,

K101

to

K103,

and

K105

to

K108.

Position

detection

potentiometers

VR

101

and

VR

102

are

linked to the spindles of variable capacitors

VC

1

and

VC2

with a gear

ratio

of 1 : 1. Voltages of 0 to

5V

(POD

1 and POD2)

are

generated according to the

positions

of

the variable capacitors.

This

position

data

is

supplied to the

CPU

through the

AID

converter by

the digital unit.

and

is

used

as

the

reference voltage

in

the feedback control system, which

is

used for preset

tuning and manual tuning. The same signal is also

used for preset data and

to

signal

t~e

completion of

tuning.

The

potentiometers

used here are not ones that

rotate through 360 degrees. Since the rotation angle

of

each

potentiometer

is

limited, the rotation range

is

·

from the

minimum

capacitance to the maximum ca-

pacitance, plus a little extra for headroom.

Through this control, like preset tuning, which will

be

described later,

POD

1

and

POD2

are

monitored

by

the microprocessor. If the lower limit voltage of 0.6V

or

the upper limit voltage of

4.2V

is

reached.

the micro-

processor detects that a variable capacitor

is

close to

one

of its limits.

To

return the voltage to the opposite

side,

APRE

is

switched

high.

For

VC1,

if the voltage

is

close

to

the lower limit with respect to

PRE1,

the volt-

age

near the upper limit

is

output. If the voltage is

close to the upper limit with respect to

PR

El, the volt-

age

near the lower limit

is

output.

If the variable capacitor voltage exceeds the speci-

fied limit. the variable capacitor

is

returned

to

the oppo-

site limit. The other variable capacitor remains

in

the

same position.

The

direction of the motor

is

determined

by

the

CPU

unless auto tuning

is

performed with high

APRE.

The

logic of

PR

11

to

PR22

is

the same

as

the logic of

IC4

and

IC5

(8A6109U2).

The

signal

output from the digital

unit passes through

IC2

and

IC3

(TC40668P). and

is

input

to

IC4

and

IC5

(8A6109U2).

i

PR11

PR12;

?R21

I

PR22

Motor 1 I Normal rotation I H L I -I -

I

I Reverse rotation I L H i - -

I I

Motor 2 I Normal rotation I --: H I L

I I

! Reverse rotation I --L H

I

The

motor stops

in

other

cases.

·

Manual

tuning

Hold down the USB/LSB key

and

switch the power

on.

Select menu number 20

with

the encoder, turn

the display off with the band down

key,

and

press the

CLR

key

to

return

to

the normal mode. Manual tuning

is

now possible.

The

main encoder

is

used to control

VC1,

and

the

sub-encoder

is

used to control

VC2.

The capacitance

of

each

variable

capacitor changes from the maximum

to the minimum

when

the encoder

is

turned about

eight turns.

• Preset tuning

When auto or manual tuning stops, the position of

the variable capacitor

is

stored

in

memory

by the

microprocessor

as

preset data for that

band.

When

the

band

is

changed after tuning

is

performed

in

another band,

APRE

goes high, the motor is con-

trolled by the microprocessor. and preset tuning

is

performed.

During

preset tuning, auto tuning or

signal

transmission

is

inhibited even if the

AT

TUNE

switch

is

pressed or transmission becomes ready.

The

initial preset data when the microprocessor

is

reset includes

standard

data

for a

50

ohm

load

on

each

band.

Downloaded by



Amateur Radio Directory

19

TS-8508

CIRCUIT

DESCRIPTION

Standby Control Timing

Standby control and timing

are

handled by the

IF

unit (X48-3080-00). The following control signals

are

used:

SS

: Standby switch. Active low.

KEY

:

Keying

signal from the

keyer.

Active low.

TXI

: Transmission inhibit signal from the micro-

processor. Low when transmission

is

inhib-

ited.

PKS

: Standby signal from the

data

communication

terminal. Active Low.

The

control output signals

are

as

follows:

TXB

: 8 V during transmission

RXB

: 8 V during reception.

Reversal

of

TXB.

CKY

: Keying output signal. Active

High.

RBC

: Receive control

signal.

Active Low.

1)

Manual standby (except

CW)

•

RX

~TX

If

9

(TX!)

of the

BK-SW

module

(X59-3880-00)

is

high when the standby switch

is

pressed

and

the

SS

line

is

grounded,

02

in

the module

is

turned

on,

and

the

base

of

049

is

grounded

via

1

O.

The

collector of

049

goes

high,

the

signal

enters

10

of the

BK-IN

module

(X59-3870-00),

passes

through

01

in

the module, enters

2 of the

TRX

module from

2

via

R132,

passes through the internal switch

cir-

cuit,

and

TXB

is

output from

5.

When

TXB

is

high,

RXB

is

low.

•

CKY

generation

Since CWB

(8V

in

CW mode)

is

OV

in

any mode

other

than

CW,

064

is

turned off,

044

a/2

is

turned

on,

and

the base of

050

is

grounded.

050

is

turned

on,

and

a high signal from the collector

of

049

passes

through the collector of 050, 061,

R316,

and

5 of

the

BK-IN

module (X59-3870-00),

and

enters

2 of

IC2

c/4

in

the module.

The

high

output

signal

from

050

enters

5 of the

OL

Y module,

and

12

of the

IC1

one-shot multi-vi-

brator

in

the module goes

high.

The

Q output from

9 of

IC1

is

low for

10

ms,

then

goes

high.

The

Q output

enters

1 of

IC2

C/4

in

the module

via

4 of the

OL

Y module

and

4 of the

BK-IN

module.

3 of

IC2

C/4

goes low

10

ms after the standby switch

is

pressed.

The

signal

is

inverted

by

inverter

IC2

d/4,

and

is

output from

9 of the module

as

the

CKY

signal.

The

CKY

signal

then

passes

through the integration

circuit, which rectifies the waveform,

is

directed to the

ALC

line,

matched with the negative

signal

of the

ALC,

and

used

as

the

FET

gate

bias

of the transmit

IF

stage.

SS

TXB

10ms

CKY

___

.....I

~1-----

ALC

Fig.

13

TXB and

CKY

generation

• Transmission

~

Reception

When the standby

switch

is turned off,

049

is

turned off,

and

10

of the

BK-IN

module goes low.

Output from

4 of

IC

1

(b/6)

is

delayed 5ms after the

standby switch

is

turned off because of the time

con-

stant circuit consisting of

R1

and

C1

between

2 of

IC1

a/6

and

3 of

b/6.

2 of the

TRX

module

goes

low

via

01

and

02

in

the module. Therefore

TXB

goes low 5

ms

after the standby switch

is

turned off,

and

RXB

goes

high.

•

CKY

down

When the standby switch

is

turned off, the collector

of

050

goes low

and

5 of the

BK-IN

module goes

low.

This

causes

the

CKY

line to

go

low at the same

time.

The

CKY

signal

then

passes

through the integra-

tion circuit, which rectifies the waveform

and

reduces

the

ALC

line

voltage.

SS

TXB

~I

.....

___

_

5ms

CKY

ALC

5ms

RXB

..

,

-,

.----

Fig.

14 TXB and

CKY

down

20

TS-8508

CIRCUIT

DESCRIPTION

•

RBC

generation

When

2 of the

BK-IN

module goes low,

11

of

IC1

e/6

and

13

of f/6

in

the module go low. Be-

cause of the time constant circuit consisting of

R5

and

C3,

the output from

10

of

IC2

a/4

goes low 12.5ms

after the standby switch

is

turned off, producing the

RBC

signal.

The

R

BC

signal

is

applied to the

base

of the switch-

ing transistor that mutes the signal line

of

the

IF

unit.

The

signal

is

output to the signal line 12.5ms after the

standby switch

is

turned off.

SS

I

TXB

·I

I·

Sms

RXB

I

RBC

·I

I· 12.Sms

AF

output

18ms

Fig. 15

RBC

generation

·

PU..,

ODS

data

and

transmit/receive

timing

signal

It takes 1

Oms

from the time the standby switch

is

grounded until the

CKY

signal

is

generated. It takes

12.5ms from the time

RXB

rises until

the

R

BC

line

goes low.

The

PLL

and

DOS

data

from the micropro-

cessor

are

switched,

and

the diode switch and analog

switch

are

switched during that time

to

assure stable

transmission and reception.

KEY

-----i'------~1

2)

Full

break-in operation timing

• TXB generation by closing the CW key

When a

key

is

inserted into the jack, the switch

in

the

jack

is

closed. the junction of

R262

and

R261

goes

low,

and

044

is

turned off.

When the key

is

depressed, the base of

034

is

grounded through R264 and 051,

034

is

turned

on,

and

a

high

signal

from CWB enters

8 of

IC1

through

the collector

of

034,

054.

and pin 2

of

the BK-SW

module. The FULUSEMI switch

is

grounded during

full

break-in,

the switch for pins 8

and

9 of

IC1

is

turned

on,

and

a

high

signal

is

output from

9

and

enters

10

via

01. Since the VOX switch

is

also turned

on

during full break-in, pin 5

of

the BK-SW module con-

nected to the

VOX

switch goes high. The switch for

pins

10

and

11

of

IC1

are

turned

on,

and

03

connected

to

11

of

IC1

is

turned

on.

If the

TX!

signal

is

high,

049

is

turned

on,

as

in

manual standby, and a high

signal enters pin 10

of

the BK-SW module from the

collector of

049

and

exits from

2.

2 of the

TRX

module goes high,

and

the

TXB

signal

is

generated.

•

CKY

generation

When the key

is

depressed. the collector of

034

goes high,

and

044

is

turned

on

via

040. Both

049

and

050

are

turned

on,

and

a high

signal

enters

5 of

the

BK-IN

module through 061 and R316.

The

CKY

signal rises

10

ms after the key

is

depressed

in

the

same manner

as

for

CKY

generation at manual

standby.

TXB

_J

1.

~

112.Sms ...._

____

_

10ms

_c-:i_-__.._R-__

__

____.

CKY

18.Sms

ALC

~~~~~

-<ITIM7lllIDY--<1IlilllIUl/IJID-

RXB

RBC

I

_J

! 12.Sms

/•

,--,2-.5-m_s

____

L-----~--------

1 I•

•I

1.

4

___

25ms L

AF

1

nnn

___________

ll

nn

n...____

__

nn

output

U

LJ

. .

LJ

UU

LJ

l

Fig. 16 Timing chart for full break-in

Kenwood TS-850S User manual

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