
2
AFTER PAR. 3-3 B) LOAD CONNECTION (I) and PAR. 3-3 C) LOAD CONNECTION (II)
add the following:
Load connections to the BOP power supply are achieved via the OUTPUT and COMMON ter-
minals located on either the front or the rear panel, but not both. Sense connections must be
made from the same location (front or rear panel) as the output and common connections.
AFTER PAR. 3-3 D) A-C GROUND add the following:
The GROUND terminal is connected to CHASSIS of the unit and to the local EARTH-GROUND
potential through the A-C power line cord. It can be used a) as a monitoring reference point, b)
as a grounding point for the output of the unit, and c) for doubling the a-c power cord EARTH-
GROUND connection if necessary by providing a separate connection to the local EARTH-
GROUND point.
CAUTION: NEVER CONNECT THE BOP OUTPUT TERMINAL (OR THE LOAD TERMINAL TIED TO
THE OUTPUT TERMINAL) TO EARTH-GROUND. OTHERWISE, IF THE CONTROLLING
DEVICE IS GROUNDED, THE BOP CAN BE DAMAGED BY THE OUTPUT LIMIT CUR-
RENT FLOWING INSIDE THE BOP ALONG THE PROGRAMMING SIGNAL RETURN
PATH.
CAUTION: DO NOT CONNECT BOTH THE LOAD AND THE PROGRAMMING DEVICE RETURN
(COMMON) TO EARTH-GROUND POTENTIAL AND DO NOT USE THE PROGRAMMING
RETURN TERMINAL AS A TAP POINT FOR THE LOAD RETURN. OTHERWISE, IF THE
COMMON POWER CONNECTION BETWEEN THE BOP AND THE LOAD IS LOST, THE
BOP CAN BE DAMAGED BY OUTPUT CURRENT FLOWING INSIDE THE BOP ALONG
THE PROGRAMMING SIGNAL RETURN PATH.
CAUTION: DO NOT USE THE PROGRAMMING RETURN TERMINAL AS A TAP POINT FOR THE
LOAD RETURN BECAUSE THE BOP CAN BE DAMAGED BY OUTPUT CURRENT
FLOWING INSIDE THE BOP ALONG THE PROGRAMMING SIGNAL RETURN PATH.
AFTER PAR. 3-3 E) D-C (SIGNAL) GROUND add the following:
The GROUNDING NETWORK terminal is tied to GROUND (CHASSIS) terminal through a
series capacitor-resistor network. Connecting the GROUNDING NETWORK terminal to the
COMMON terminal reduces common noise current flowing through the load and, if a BIT card is
installed, it ensures that the dynamic swing of the output does not affect the digital section.
AFTER PAR. 3-3 J) EXTERNAL LEADS add the following:
K) EXTERNAL VOLTAGE MONITOR. Use signal EOMonitor Output at pin 20 of the PC12 pro-
gramming connector (see Figure 4-5) for external voltage monitoring. Caution should be exer-
cised in handling this signal: use a series 5K resistor in combination with a high impedance
monitoring device, or an external high impedance buffer between the BOP and the monitoring
device. This signal is buffered by OPAMP IC23 (see Figure 6-4) which functions as a repeater
for the signal coming from the RN3 matched pair divider connected at the output. There is no
overvoltage protection. This stage is protected against short-circuit by the intrinsic protection of
the OPAMP generating this signal. This signal is used by the BIT card if it is installed.