LG GD330 User manual

Service Manual Model : GD330
Internal Use Only
Service Manual
GD330
Date: April, 2009 / Issue 1.0

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Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
REVISED HISTORY
DATE ISSUE CONTENTS OF CHANGES S/W VERSION
2008. 12. 08 0.1
The information in this manual is subject to change without notice and should not be construed as a
commitment by LGE Inc. Furthermore, LGE Inc. reserves the right, without notice, to make changes to
equipment design as advances in engineering and manufacturing methods warrant.
This manual provides the information necessary to install, program, operate and maintain the GD330.

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LGE Internal Use Only Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
1. INTRODUCTION

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Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
Table Of Contents
1. INTRODUCTION...............................................7
1.1 Purpose......................................................................7
1.2 Regulatory Information.................................................7
1.3 Abbreviations ..............................................................9
2. GENERAL PERFORMANCE ............................10
2.1 Product Name ...........................................................10
2.2 Supporting Standard..................................................10
2.3 Main Parts: GSM Solution ..........................................10
2.4 H/W Features............................................................11
2.5 S/W Features ............................................................13
3. TECHNICAL BRIEF......................................... 15
3.1 General Description ...................................................15
3.2 RF Part .....................................................................15
3.3 Digital Baseband .......................................................20
3.4 Analog Baseband ......................................................24
3.5 Bluetooth Interface ....................................................30
4. TROUBLE SHOOTING..................................... 34
4.1 RF Part Technical Brief...............................................35
4.2 RF Part Trouble shooting ............................................36
4.3 Bluetooth Trouble Shooting.........................................48
4.4 Baseband Part Troubleshooting ..................................52
4.5 LCD Display Trouble shooting .....................................60
4.6 Camera Trouble Shooting ...........................................66
4.7 SIM Detect Trouble Shooting ......................................70
4.8 Slide Up/Down Trouble Shooting.................................73
4.9 Speaker/Receiver Trouble Shooting (Common Path) .....75
4.10 Speaker/Receiver Trouble Shooting (Acoustic Path)....78
4.11 MIC Trouble Shooting...............................................79
4.12 Ear-Mic Jack Detection Trouble Shooting ..................81
4.13 Ear-Mic Hook Detection Trouble Shooting..................82
4.14 Ear-Mic Headset MIC Trouble Shooting .....................83
4.15 Ear-Mic Headset HSOR/HSOL Trouble Shooting .........84
4.16 FM-Radio Trouble Shooting ......................................85
4.17 Transflash Trouble Shooting......................................86
4.18 Main Key Backlight LED Trouble Shooting..................88
4.19 Slide LCD Backlight LED Trouble Shooting.................90
4.20 Vibrator Trouble Shooting .........................................92
4.21 Touch Trouble Shooting............................................93
5. Downloading ................................................ 95
5.1 Downloading Software ...............................................95
6. BLOCK DIAGRAM........................................ 101
7. CIRCUIT DIAGRAM...................................... 103
8. BGA Pin Map ..............................................111
9. PCB LAYOUT ...............................................117
10. Calibration................................................ 125
10.1 Calibration ............................................................125
11. Test Mode................................................. 130
12. EXPLODED VIEW & REPLACEMENT
PART LIST ................................................133
12.1 EXPLODED VIEW ...................................................133
12.2 Replacement Parts ................................................135

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Copyright © 2009 LG Electronics. Inc. All right reserved.
Only for training and service purposes
LGE Internal Use Only
1. INTRODUCTION
1. INTRODUCTION
1.1 Purpose
This manual provides the information necessary to repair, calibration, description and download the
features of the GD330
1.2 Regulatory Information
Toll fraud, the unauthorized use of telecommunications system by an unauthorized part (for example,
persons other than your company’s employees, agents, subcontractors, or person working on your
company’s behalf) can result in substantial additional charges you’re your telecommunications services.
System users are responsible for the security of own system. There are may be risks of toll fraud
associated with your telecommunications system. System users are responsible for programming and
configuring the equipment to prevent unauthorized use. LGE does not warrant that this product is
immune from the above case but will prevent unauthorized use of common-carrier telecommunication
service of facilities accessed through or connected to it. LGE will not be responsible for any charges that
result from such unauthorized use.
A. Security
If a telephone company determines that the equipment provided to customer is faulty and possibly
causing harm or interruption in service to the telephone network, it should disconnect telephone
service until repair can be done. A telephone company may temporarily disconnect service as long as
repair is not done.
B. Incidence of Harm
A local telephone company may make changes in its communications facilities or procedure. If these
changes could reasonably be expected to affect the use of the GD330 or compatibility with the
network, the telephone company is required to give advanced written notice to the user, allowing the
user to take appropriate steps to maintain telephone service.
C. Changes in Service
Maintenance limitations on the GD330 must be performed only by the LGE or its authorized agent. The
user may not make any changes and/or repairs expect as specifically noted in this manual. Therefore,
note that unauthorized alternations or repair may affect the regulatory status of the system and may
void any remaining warranty.
D. Maintenance Limitations

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LGE Internal Use Only Copyright © 2009 LG Electronics. Inc. All right reserved.
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1. INTRODUCTION
The GD330 complies with rules regarding radiation and radio frequency emission as defined by local
regulatory agencies. In accordance with these agencies, you may be required to provide information such as
the following to the end user.
E. Notice of Radiated Emissions
The pictures in this manual are for illustrative purposes only; your actual hardware may look slightly different.
F. Pictures
An GD330 may interfere with sensitive laboratory equipment, medical equipment, etc. Interference from
unsuppressed engines or electric motors may cause problems.
G. Interference and Attenuation
H. Electrostatic Sensitive Devices
Boards, which contain Electrostatic Sensitive Device (ESD), are indicated by the sign.
Following information is ESD handling:
• Service personnel should ground themselves by using a wrist strap when exchange
system boards.
• When repairs are made to a system board, they should spread the floor with anti-static mat
which is also grounded.
• Use a suitable, grounded soldering iron.
• Keep sensitive parts in these protective packages until these are used.
• When returning system boards or parts like EEPROM to the factory, use the protective
package as described.
ATTENTION

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Copyright © 2009 LG Electronics. Inc. All right reserved.
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1. INTRODUCTION
1.3 Abbreviations
For the purposes of this manual, following abbreviations apply:
APC Automatic Power Control
BB GD330
BER Bit Error Ratio
CC-CV Constant Current – Constant Voltage
DAC Digital to Analog Converter
DCS Digital Communication System
dBm dB relative to 1 milliwatt
DSP Digital Signal Processing
EEPROM Electrical Erasable Programmable Read-Only Memory
EL Electroluminescence
ESD Electrostatic Discharge
FPCB Flexible Printed Circuit Board
GMSK Gaussian Minimum Shift Keying
GPIB General Purpose Interface Bus
GSM Global System for Mobile Communications
IPUI International Portable User Identity
IF Intermediate Frequency
LCD Liquid Crystal Display
LDO Low Drop Output
LED Light Emitting Diode
OPLL Offset Phase Locked Loop
PAM Power Amplifier Module
PCB Printed Circuit Board
PGA Programmable Gain Amplifier
PLL Phase Locked Loop
PSTN Public Switched Telephone Network
RF Radio Frequency
RLR Receiving Loudness Rating
RMS Root Mean Square
RTC Real Time Clock
FEM Front End Module
SIM Subscriber Identity Module
SLR Sending Loudness Rating
SRAM Static Random Access Memory
STMR Side Tone Masking Rating
TA Travel Adapter
TDD Time Division Duplex
TDMA Time Division Multiple Access
UART Universal Asynchronous Receiver/Transmitter
VCO Voltage Controlled Oscillator
VCTCXO Voltage Control Temperature Compensated Crystal Oscillator
WAP Wireless Application Protocol

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2. GENERAL PERFORMANCE
2. GENERAL PERFORMANCE
2.1 Product Name
2.2 Supporting Standard
2.3 Main Parts: GSM Solution
GD330 : GPRS Class 10 / EDGE Class 10
WAP 2.0, JAVA 2.0Application
Standard
GSM850 TX : 824 – 849 MHz
GSM850 RX : 869 – 894 MHz
GSM900 Tx : 880 – 9155 MHz
GSM900 Rx : 925 – 960 MHz
DCS1800 TX : 1710 – 1785 MHz
DCS1800 RX : 1805 – 1880 MHz
PCS1900 TX : 1850 – 1910 MHz
PCS1900 RX : 1930 – 1990 MHz
Frequency Range
GD330 :
GSM850/GSM900/DCS1800/PCS1900
Phase 2+(include AMR)
SIM Toolkit : Class 1, 2, 3
Supporting
Standard
CommentFeatureItem
B6PLE: RENESASRF Chip
Triton (TWL3029): TIAnalog Baseband
Neptune (D761811BZVL): TIDigital Baseband
CommentPart NameItem

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Copyright © 2009 LG Electronics. Inc. All right reserved.
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LGE Internal Use Only
2. GENERAL PERFORMANCE
None
Status Indicator
One button access
2M CMOS Camera,
Fixed Focus
Built-in Camera
Main LCD
2.2 inch 262K Color TFT
(240 x 320 pixel)
Backlight : White LED
Display
Plug-In SIM 3V /1.8V
SIM card type
EDGE Class 10
EDGE compatibility
GPRS Class 10
GPRS compatibility
E2 (GSM850)
E2 (EGSM)
E2 (DCS)
E2 (PCS)
GSM850 : 27 dBm
EGSM : 27 dBm
DCS 1800 : 26 dBm
PCS 1900 : 26 dBm
EDGE
Class4 (GSM850)
Class4 (EGSM)
Class1 (DCS)
Class1 (PCS)
GSM850 : 33 dBm
EGSM : 33 dBm
DCS 1800 : 30 dBm
PCS 1900 : 30 dBm
GSM/
GPRS
TX output
power
GSM850 : -105 dBm
EGSM : -105 dBm
DCS 1800 : -105 dBm
PCS 1900 : -105 dBm
RX sensitivity
@ GSM850, EGSM / 800mAhMin : 5.5 hrs @ Power Level 10
Talk time
@ Power Off / 800mAh3 hrs
Charging time
@ Paging Period 9450 hrs.
Stand by time
Staggerd 10Layers , 0.8t
PCB
7,550 mm3 (TBD)
Volume
With Battery102g(TBD)
Weight
Standard :
102.7x50.8x11.9 mm
Size
2) Packing Type : Inner Pack
1) Capacity
Standard : Li-ion 800 mAh
Battery
Slide
Form Factor
CommentFeatureItem
2.4 H/W Features

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2. GENERAL PERFORMANCE
< Function Key>
Soft Menu left (Touch sensor),
Soft Menu right (Touch sensor),
Multi function , SEND, CLR, End
<Navigation>
F1, F2, F3, F4, OK,
<Side Key>
Volume up/down, CAM
Alphanumeric Key : 12
Function Key : 6
Navigation : 5
Side Key : 3
Total No of Keys :26
Keypad
T-Flash socketNo
T-Flash
(External Memory)
No
Data Cable
Yes
Stereo Headset
No
CDROM
Yes
Travel Adapter
Yes
Speaker Phone mode
Support
Yes
Voice Recording
MPEG4, H.263
Camcorder
MP3/ AAC/AAC+
Music Player
SW Decoded 64Poly,MP3 ringtone
MIDI(for Buzzer
Function)
HSP, HFP, OPP, FTP(server), BPP,
A2DP, AVRCP
Blue Tooth
Built in Vibrator
Vibrator
Built in Data & Fax support
Data & Fax
FR, EFR, HR, AMR
Speech coding
NAND Flash : 1Gbit
SDRAM : 512Mbit
Memory
Yes
PC synchronization
18pin, Stereo
Ear Phone Jack
18 Pin
System connector
Main : Internal Fixed Type
Blue tooth : Internal Chip Type
ANT

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Copyright © 2009 LG Electronics. Inc. All right reserved.
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2. GENERAL PERFORMANCE
2.5 S/W Features
Yes
Call Duration
Yes
SMS
Incomming : 300KB
Outgoing : 300KB
Yes
MMS
Yes
Call Barring
Yes
Call Divert
Yes
Mute
Automatic
Network Selection
Yes
Call Retrieve
Yes
Voice recoder
Yes
Own Number
Yes
Service Dial Number
Yes
Fixed Dial Number
Yes (50)
Last Missed Number
Yes (50)
Last Received
Number
Yes (50)
Last Dial Number
Entry: 1000Field: Name,Mobile,Home,Office,Fax,E-
mail,Group
Ringtone,Picture, anniversary
Phone Book
Yes
Profile
Yes
Speed Dial
Schedule / Phonebook / MEMO / SMS /
Download(Photo, file)
PC Sync
Yes
Quick Access Mode
Basic:EnglishYes
Multi-Language
NITZYes
Time / Date Display
0 ~ 7 Level
Audio Volume
0 ~ 7 Level
Key Volume
0 ~ 3 Levels
Battery Charging
0 ~ 7 Levels
RSSI
CommentFeatureItem

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2. GENERAL PERFORMANCE
No
Voice Dial
Yes
Email
No
IM
No
Sync ML
Yes
AMR
Yes
Memo pad
Yes
DTMF
Yes
Conference Call
Class 10Yes
EDGE
Class 10Yes
GPRS
V2.0
HSP, HFP, OPP, FTP(server), BPP,
A2DP, AVRCP
Yes
Blue tooth
No
IrDA
CLDC V1.1 / MIDP V2.0Yes
JAVA
2M F/FYes
Camera
Class 1, 2, 3
SIM Toolkit
Service Provider / Network LockYes
SIM Lock
Yes
Download Melody /
Wallpaper
Teleca Q7.0Over WAP 2.0
WAP Browser
Yes
Wall Paper
Yes
Calculator
Currency, Surface, Length, Weight,
Temperature, Volume, Velocity
Unit Convert
Yes
World Clock
scheduler50(80 character)
Memo
Yes
Calendar
YES
Game
Over the WAP
Download
Yes
Cell Broadcast

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Copyright © 2009 LG Electronics. Inc. All right reserved.
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3. TECHNICAL BRIEF
3. TECHNICAL BRIEF
3.1. General Description
The RF part consists of a transmitter, a receiver, a synthesizer, a voltage supply and a DCXO part. The main RF
Chipset B6PLD is a highly integrated RF transceiver IC FOR Digital Interface of GSM 850,DCS1800 and PCS1900
quad-band cellular systems. The B6PLD incorporates EDGE transceiver capability, quad R low-noise amplifiers
(LNAs). Direct conversion mixers, a programmable gain amplifier(PGA) with DC offset and frequency response
correction, ADC, Digital filter, Digital Interface, fully integrated VCOs, an RF fractional-N synthesizer, a low-noise
offset PLL transmitter, Digital modulator, TXDAC, RAMPDAC, and AFCDAC. The B6PLD includes state machine
control through serial programming. All functions operate down to 2.67V and are housed in a 72-pin BGA
package. Hence the B6PLD can form a small size transceiver handset for quad band EDGE transceiver.
3.2. RF Part
3.2.1 Receiver Part
The B6PLD receiver supports quad band, so the front-end incorporates four LNAs and two mixers. The incoming
RF signals are mixed directly down to I/Q baseband by the front-end block. This incorporates four LNAs/four
buffers and two Gilbert Cell mixer blocks optimized for operation at 850MHz, 900MHz, 1800MHz and 1900MHz
respectively. The front-end block is followed by two closely matched baseband amplifier chains. These include
distributed low pass filtering, one switched gain stage and one fixed gain stage. In addition, the baseband section
integrates A/D and D/A converters which provide automatic on-chip correction of DC offsets.
<Fig.3-1> Receiver Part Block Diagram

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3. TECHNICAL BRIEF
3.2.1.1 Baseband PGA/Low pass Filter Specifications
The baseband programmable amplifier comprises one stage with variable gain followed by a fixed gain
amplifier. The overall gain control range is 36dB with 6dB Steps. The filtering is provided by a single R/C low pass
filter with an on-chip capacitor followed by on-chip Chebychev low pass filters. The filters have been specified to
achieve maximal group delay flatness in the pass-band combined with the required levels of suppression of
interfering signals. The distribution of the gain and filtering has been designed to ensure that the receiver does
not compress under blocking conditions. The final fixed gain amplifier is included to match the on-chip levels to
the input dynamic range of the ADC.
3.2.1.2 DC offset auto-calibration system
B6PLD implements a system for cancelling the DC offsets in the baseband programmable gain amplifiers(PGA).
This prevents a small DC offset at the input giving a large DC offset at the output, even at high gain settings.
When the B6PLD receiver is performing an auto-calibration, the sequencer cancels the offsets locally around the
PGA, then the Digital filter. The system includes switches to short out the signal path whilst the cancellation is
occurring. The switches are opened in sequence as the calibration progresses. For PGA the A/D converter system
employs a successive approximation technique and achieves 6 bit resolution. The PGA stage has an associated 6
bit current DAC which cancels the DC offset at the output. The sequencer ensures that on-chip filters have
sufficient time to settle before applying correction in the next digital offset cancellation stage.
3.2.2 Transmitter part
The B6PLD transmitter is capable of both GMSK and 8-PSK modulation, to support for conventional GSM and
EDGE. B6PLD integrates all loop filters to configure both PM loop and AM loop. See block diagram below.
<Fig. 3-2> Simplified Block diagram for TX part

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Copyright © 2009 LG Electronics. Inc. All right reserved.
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3. TECHNICAL BRIEF
3.2.2.1 Polar Loop Structure
Three main functions are identified in the transmitter architecture; I/Q vector modulation at IF frequency,
amplitude and phase loop at IF/RF frequencies and power amplification.
3.2.4 Front End Module Specification
3.2.4.1 Block Diagram and Internal Matching Condition
3.2.3 RF Synthesizer
3.2.4.1.1 GD330
FEM
The B6PLE integrates Front End Module control (FEM control). Word 6-12 is assigned for trigger of control
signal from B6PLE. FEMC1 and FEMC2 are interface between B6PLE and FEM. The combination of output is
decoded from word 1. FEMC1 and FEMC2 are assigned for Low and High band respectively.
<Fig. 3-3> FEM Placement <Fig. 3-4> FEM Block diagramt

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3. TECHNICAL BRIEF
3.2.4.2 Logic Table for Selection
3.2.5 Power Amplifier Module
for Quad-band GSM/GPRS/EDGE
3.2.5.1 PAM Specification
-. Quad band GSM, GPRS & Polar Loop EDGE Amplifier
-. For 3.5V nominal operation
-. Built-in LDO circuit
-. GPRS Class 12 operation compatible
-. Integrated directional coupler
3.2.5.2 Circuit Diagram and peripheral components
<Table 3-1> Band SW Logic Table
PAM
<Fig. 3-5> PAM Placement <Fig. 3-6> PAM block diagramt

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3. TECHNICAL BRIEF
3.2.6 Digital Core
3.2.6.1 Digital Interface Block Diagram
3.2.6.2 Control system and digital interface
The B6PLD is a RF transceiver IC for GSM850, GSM900, DCS1800 and PCS1900 quad band cellular system, and
incorporates EDGE transceiver capability. The B6PLD has a digital interface connection to the baseband processor.
This interface complies with the digital interface specification DigRF standard v112.
The digital interface consists of two separate interface connections; (1) the control interface, (2) the data interface,
and a system clock on/off control signal and a precise timing signal. These are realized by eight signal lines in
B6PLD(Look at Fig1.1 above)
-. The control interface is used to configure the B6PLD for RX and TX operation, transfers of control data for several
built-in circuits, and for triggering the events. The control interface comprise a bi-directional 3-wire serial interface
with the three signal lines CtrlData, CtrlEn and CtrlClk accessing the control registers in B6PLD by transferring the
control words.
-. The data interface is used to transfer transmit modulation symbols and receive IQ-sampling data. The data
interface comprises a single serial bus with the three signal lines RxTxData, RxTxEn and SysClk. The SysClk is used
for system clock to baseband.
-. The SsClkEn signal enables the SysClk output and powers the 26MHz oscillator on. When the SysClkEn is negated,
the SysClk is held low, and if the TEST1 pin is low by the default settings, the logic power supply by typical 1.8 volts
to the internal core logic circuits is also switched off.
<Fig.3-7> Digital Interface Block diagram

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LGE Internal Use Only Copyright © 2009 LG Electronics. Inc. All right reserved.
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3. TECHNICAL BRIEF
3.3. Digital Baseband
<Fig.6> OMAPV1030 Block Diagram
3.3.1 General description
The OMAPV1030 E-GPRS multimedia device belongs to the Texas Instruments OMAP-Vox_ processors family. It
combines both a modem engine and an application engine. Memory and CPU resources are shared
between modem and application processing.
The OMAPV1030 chip is based on the OMAP3.4 architecture and integrates two processor subsystems:
- An MPU subsystem based on an ARM926EJ-S
- A DSP subsystem based on a UMA 2.6 architecture integrating a C55x DSP core
The OMAPV1030’s silicon process technology is a c027.0 90-nm digital CMOS.
Boot ROM
Secure eFuse
Secure RAM
Security layer
SDRAM Flash and
SRAM
Internal SRAM
Camera core
Enhanced LCD
OCP-I OCP-T2 OCP-T1 EMIFSEMIFF
Traffic controller
DSP MMU
DSP
subsystem
MPUI
DSP private
peripherals
Timers (x3)
WD timer
DSP DMA handler
DSP interrupt
handler
Static switches
APLL ULPDR
MPU/DSP shared peripherals
Dynamic switches
OCP static switchesTIPB static switches
32k Sync timer
Frame counter
GPIO (x2)
GP timer (x2)
Serial radio IF
McBSP1
McBSP RF
MMC/SDIO2
Nand flash ctrl
SPI
UART (x3)
I C(x2)
2
ULPDR
CIPHER A5
TPU
TSP
GEA 1/2/3
USIM
MCSI (x2)
USB controller
Host
Device
OTG
LCD
controller
MPU
subsystem
System
DMA
controller
TIPB bridge (x2)
Test:
E2TLM, BCM, SCM,DielD
JTAG, FuseFarm
MPU public peripherals
uWire
HDQ/1-Wire
MMC/SDIO1
Keyboard controller
Memory stick
OMAPV1030 OS timer
LPG (x2)
PWT
MPU private peripherals
Timers (x3)
WD timers
System DMA handler
MPU level 2 INTH
Secure watchdog
32k watchdog
OMAPV1030 config.
SHA1/MDS5
AES
PKA
LCDCONV
RNG
DES/3DES
OMAPV1030 EDGE multimedia platform

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3. TECHNICAL BRIEF
3.3.2 Block Description
The OMAPV1030 E-GPRS multimedia device is based on an OMAP3.4 platform that integrates:
_ The MPU subsystem
_ The DSP subsystem
_ A system DMA
_ A traffic controller providing:
_ External memory interfaces with:
_ A slow interface (EMIFS) to ROM, SRAM, FLASH memories
_ A fast interface (EMIFF) to SDRAM memories
_ Layer 3 (L3) interconnect made of two OCP target ports (OCP-T1 and OCP-T2) and one OCP initiator port (OCP-I)
_ Layer 4 (L4) interconnect made of two DSP peripheral busses (private DSP TIPB and shared DSP TIPB) and two
MPU peripheral busses (public MPU TIPB and private MPU TIPB)
_ Clock management
_ A set of processor peripherals:
_ Three 32-bit timers, a 16-bit Watchdog timer, and an interrupt handler for the MPU
_ Three 32-bit timers, a 16-bit Watchdog timer, and a 2nd-level interrupt handler for the DSP
_ Test and debug interfaces (JTAG, Window Tracer)
_ Trace capabilities: ETM9 and Ctools
The other OMAPV1030 modules or subsystems are connected to the OMAP3.4 platform through the L3 and L4
interconnects.
<Fig.7> OMAPV1030 Top-Level Architecture Overview
The OMAP3.4 platform is the computing core of the device. The other OMAPV1030 components are organized as
follows:
_ The internal memory subsystem is made of a single-port 256K-bit shared internal SRAM.
_ The security subsystem is a set of several components, including dedicated a secure mode to run secure
applications.
_ A master-slave USB module provides an external interface supporting high data transfer rates between the
OMAPV1030 and external application