LG KU950 User manual

Date: December, 2006 / Issue 1.0
Service Manual Model : KU950
Service Manual
KU950

6. BLOCK DIAGRAM
- 160 -
*Top Side

6. BLOCK DIAGRAM
- 161 -
*Bottom Side

- 162 -

- 163 -
7
ANT_SEL1
6
Near to Tx Path
UMTS2100
A
(1%)
TX_VCO_EN_1_N
Near to PAM
7
HIGH
2110-2170 MHz
H
GGG
DD D
SAW FILTER(SFSY0025601)
REV:
EUSY0246002
HIGH
Page:
E
MODE
11
Changed by:
GSM_PA_BANDANT_SEL2
10
9
1608
Size:
DCS RX
B
Drawn by:
2
122
51
(1%)
E
2012
7
ANT_SEL0
126
OFF
4 8
PCS RX
Drawn by:
1005
(PPS)
DOC CTRL CHK:
DCS/PCS
10
QA CHK:
10
12
E
GSM/DCS/PCS
6
C
A
1805-1880 MHz
C
9
H
(1%)
GSM850/EGSM TX
WCDMA
TX_VCO_EN_0_N
EGSM RX
8
HIGH
LOW
C
1
LG ELECTRONICS INC.
71
10
B
R&D CHK:
Date Changed:
HIGHLOW
Engineer:
GSM900
925-960 MHz
E
LOW
Drawing Number:
DEVELOPMENT LAB 4 DEVELOPMENT GROUP 1
11
Engineer:
9
LOW
8
LOW
F
LOW
Page:
Date Changed:
(2012)
1930-1990 MHz
HIGH
3
LOW
2012
5
B
F
4
DCS/PCS TX
Drawing Number:
SETY0001401
1920-1980 MHz
6
MFG ENGR CHK:
MOBILE HANDSET R&D CENTER
(2012)
HIGH
3
5
EUSY0203802
MFG ENGR CHK:
H
F
QA CHK:
4
5
REV:
(PPS)
SAW FILTER(SFSY0023001)
8
D
HIGH HIGH
HDET
Changed by:
Dual VCO
HIGH
GSM
31
C
DOC CTRL CHK:
R&D CHK:
A
4
DCS1800/PCS1900
12
11
HIGH
LOW
TITLE:
HIGH
Size:
11
LOW
9
HIGH
HIGH
HIGH
LOW
F
B
Time Changed:
1/9
A2
JB Lee 09:24:00 am
A2
HIGH
(1%)
2
2
TITLE:
JB Lee
JB Lee
Time Changed:
3
H
Near to G-PAM
G
KU950 Main 1.1
A
LOW
18nH
2006, Sep 08
C148
100ohm
R128
VREG_RFRX_0_2.85V
C113
220n
R110
3.3K
1000p
C163
1000p
C157
VREG_SYNTH_2.85V
C137
C146
33p
VREG_RFTX_2.85V
100p
220
R116
10u
C164
C121
100p
+VPWR
0.01u
C160
C149
680p
C110
ANT101
100p
2.7nH
33u
C117
L101
82pC103
R138
10
100p
C106
C167
33p
NA
C173
R124
270
C158
1000p
L107
2.2uH
R109
82
C107
33p
VREG_RFTX_2.85V
C127
8200p
L103
100nH
3.3nH
C154
R119
51
33pC193
G2
1
IN
3
O1
4
O2
33p
C108
FL102
B7827
2
G1
5
C140
10u
15
R122
1.8nHL109
L124
3.9nH
C125
120p
C191
100p
33p
11K
R121
R132
ANT G1
G2 RF
C147
1.8p
KMS-507
SW100
VREG_RFTX_2.85V
C141
15p
C123
+VPWR
0.01u
9
UMTS1
UMTS2 7
VC1
14
15 VC2
VC3
16
VDD
13
33p
C144
5GND4
8GND5
10 GND6
GND7
12
GND8
17
18 GND9
GSM1800_1900TX 3
21
GSM1800_RX1
GSM1800_RX2 22
23
GSM1900_RX1
GSM1900_RX2 24
6
GSM900TX
19
GSM900_RX1
GSM900_RX2 20
25
PIN_DIREC1
PIN_DIREC2 26
FL100
LMSP54MA-543
ANT 11
1GND1
2GND2
GND3
4
C143
100p
6.8p
C172
10u
C136
L119
3.9nH
L114 4.7nH
C195
0.1u
R117 100ohm
4
50OHM
COUP 32 IN
1OUT
R136
470K
U105
L125
33p
C168
0.01u
C116 33p
4.7K
R102
R134
100ohm
C139
15p
1000p
8.2nHL115
C196
15
4700p
C150
R112
33p
R120
220
C112
6.8n
C111
100ohmR118
VREG_RFTX_2.85V
VREG_TCXO_2.85V
VREG_TCXO_2.85V
R111
6.2K
C104 82p
C101
1p
C109
0.01u
R107 100ohm
C176
+VPWR
C174
0.1u
0.01u
100p
1005/600 ohm
C122
FB100
0.5p
C155
GND 2
OUT
3
4VCC
1
VCONT
VREG_RFTX_2.85V
NA
C156
VREG_RFRX_1_2.85V
TG-5001LA-19.2MHz
X100
19.2MHz
33pC118
100K
R127
C192
1u
68K
R135
C120
47p
NA
C119
2.2u
C166
C171 100p
U106ADL5500
COMMRFIN
VOPS VRMS
33p
R113
VREG_TCXO_2.85V
C105
33p
5.6nH
C135
100p
C194
270
R115
VREG_RFTX_2.85V
1000pC162
C188
0.01u
U104 TC7S04FU
L111 10nH
L123
1.8nH
R133
80.6K
4.3K
R103
100p
C177
100nH
L126
VREG_MSMP_2.7V
0
R199
0.1u
VREG_TCXO_2.85V
C186
R126
6.2K
C189
10p
4.7u
C180
C102 33p
2.2uH
L105
R129
68
C179
100p
C170
33p
L102
NA
C133
C161
1000p
15p
C153
0.01u
2.2uH
L100
C159
0.1u
C138
0.1u
C134
82p
C128
VREG_RFTX_2.85V
VREG_MSMP_2.7V
3.9n
100ohmR105
C145
33p
L122
NA
R106 11K
GND1 2
GND2 4
GND3 6
7
GND4
GND5
8
GND6
12
13 GND7
GND8
14
5OUT_DCSPCS
1OUT_GSM 9
SW1 11
SW2
3
VBVC
10
U102
MQW5V0C869M
680p
C185
2.2uH
L104
0.01u
C131
L120
1200p
VREG_BT_2.85V
12nH
C181
C175
0.1u
ANT100
0.01u
C151
18nH
L113
L108
4.7nHL112
1.2p
L118
3.9nH
C183
TCXO
25 UMTS_TUNE
VDDA1 7
VDDA2
24
26 VDDA3
VDDA4
27 32 VDDA5
VDDA6
34 36 VDDA7
VDDA8 45
VDDM 41
VDDRF1 3
12
VDDRF2
19 VDDRF3
0.068u
928 LO_OUT
49
PGND
15 PLNA_BIAS
16 PLNA_IN
PLNA_OUT
13
10
PMIXM
PMIXP 11
RX_IM
21
20 RX_IP
23 RX_QM
RX_QP
22
46
R_BIAS
SBCK 42
SBDT 43
44
SBST
33 31
GLNA_BIAS
48
47
GLNA_IN
1
GLNA_OUT
GMIXM 5
6
GMIXP
4
GND
GPS_TUNE
35
39
GRX_IM
40
GRX_IP
37
GRX_QM
GRX_QP 38
ILNA_BIAS
17
18 ILNA_IN
ILNA_OUT
14
8
IMIXM
IMIXP
RFR6250E
U107
BLANK 2
CP_DUMP
29 CP_OUT 30 FAQ
12
GND4 14 GND5
16 NC
17 PGND
RF_IN 3
11 RF_OUT
VBIAS 6
15 VCC1A
7VCC1B
13 VCC2A
9VCC2B 2
VENABLE
VMODE 1
VREF 5
VREG_RFRX_0_2.85V
SKY77420
U103
4
GND1 GND2 8
10
GND3
C187
100p
EFCH1950TDC1
G1
2
G2
5
G3
3
IN
14
OUT
FL101
SAYZY1G95EA0B00FL103
ANT
2
1GND1
4GND2
GND3
8GND4 9
6
GND5
GND6 3
RX 5
7
TX
R108 0
L116
18nH
2.7nH
L127
C169
NA
R130
51
0.01u
C165
C184
0.5p
1.2p
C132
10R137
100p
C190
1K
R123
R101
NA
NA
L121
C115
VDDA3 7
10
VDDA4
VDDA5 15 VDDA6 23
26
VDDA7 VDDA8 27
VDDA9
31
VDD_M
43
8
VTUNE_REF
0.01u
42 TX_VCO_FB
UMTS1900_OUT
53
UMTS2100_OUT
51
UMTS800_OUT
55 49 VCONTROL
VCO_TUNE 9
4
VDDA1
36 VDDA10
VDDA11
39
41 VDDA12
48 VDDA13
VDDA14
50 52 VDDA15 54 VDDA16
VDDA17
56
VDDA2 5
RF_ON_TX_ON
47
RX_IN 14
13
RX_IP
12
RX_QN
RX_QP 1132 RX_VCO_IN
33 R_BIAS
44 SBCK 45 SBDT
SBST
46
6
TCXO
TX_IN 19
TX_IP 18
TX_MOD_CP
40
17
TX_QN
TX_QP 16
CP1 2
30 CP2
1
CP_HOLD1
29 CP_HOLD2
20
DAC_REF
FAQ1 3
FAQ2 28
57
GND_SLUG
GSM1800_INN
34
35 GSM1800_INP
GSM1900_INN 24
25
GSM1900_INP
21
GSM850_INN 22
GSM850_INP
GSM900_INN
38
37 GSM900_INP
C129
RTR6250D
U100
390p
L106 1.8nH
10u
C178
0.01u
C152
VREG_SYNTH_2.85V
R104
10
33p
0.1u
C142
C124
L117 8.2nH
0
R131
R114
47
R125
100ohm
GSM_OUT
PGND
21
RSVD_GND
19
20
VAPC
VBATT 17
VCC1A 2 VCC1B 6
1
BS
DCS_PCS_IN 3 DCS_PCS_OUT
15
18
ENABLE
5GND1 7GND2
GND3
8
GND4
9
GND5
10 12 GND6
GND7
13
GND8
14 16 GND9
4
GSM_IN
11
33p
U101
SKY77328
C182
C130
100p
33p
C114
VREG_RFTX_2.85V
OUT100
47nH
L110
C126
1000p
CP2_OUT
CP2_OUT
SBST
SBDT
SBCK
RX_QP
RX_QM
RX_IP
RX_IM
SBST
TCXO_OUT
PA_R0
PA_ON
TCXO_BT
RX_VCO_IN
TCXO_OUT
ANT_SEL0
ANT_SEL1
ANT_SEL2
HDET1
SBCK SBDT
TRK_LO_ADJ
RF_ON_TX_ON
TX_AGC_ADJ
RX_IM
RX_IP
RX_QM
RX_QP
TCXO_PM
DAC_REF
TX_IM
TX_IP
TX_QM
TX_QP
TCXO_OUT
GSM_TX_VCO_1_EN_N
GSM_TX_VCO_0_EN_N
GSM_PA_BAND
GSM_PA_EN
GSM_PA_RAMP
RX_VCO_IN
PA_THERM
7. CIRCUIT DIAGRAM

- 164 -
Shawn Shin
Shawn Shin
Date Changed:Date Changed:
H
7
A
1
E
QA CHK:
2
Time Changed: REV:
B
5
E
F
H
MFG ENGR CHK:
C
5
0
1608
4
118
Drawn by:
B
MT2260
10
Drawing Number:
5
1608
EUSY0278001
A
SRAM like
Time Changed:
Engineer:
9
9
Default : GND (SRAM like)
I2C Control
10
INT_SELECT1
E
Page:
11
D
DVB-H RF tuner
1608
EXXY0015502
R&D CHK:
+1.8V_SRAM
1
10
4
Host Interface Type
E
POWER for DVB-H part
2
11
A
REV:
Page:
4
1
0
TITLE:
MFG ENGR CHK:
C
F
SPI or SD (1 and 4 bits)
Drawn by:
1 6
G
2
Changed by:
D
DOC CTRL CHK:
DVB-H BB Module
DVB-H SRAM
1608 1%
B
7
+2.7V_DVB_RF
8
G
1608
3
QA CHK:
2
12
G
1608
TITLE:
INT_SELECT0
1608
5
Engineer:
C
1
D
6
C
1608 1608
G
DOC CTRL CHK:
H
(1%)
Changed by:
12
H
8 11
B
F
124
A
1608
1
R&D CHK: Size:
KU950 Main 1.1
103
1608
Option : HIGH (SDIO)
7
73
Shawn Shin 10:04:00 am
A2
0
8
1608
0
Drawing Number:
Size:
MOBILE HANDSET R&D CENTER
DEVELOPMENT LAB 4 DEVELOPMENT GROUP 1
+2.7V_A_OSC
1608
D
1
EUSY0275001
1
6
3
F
12
96
9
LG ELECTRONICS INC.
2006, Sep 08
2/9
A2
1000p
C213
22n
C237
10R206
2G1
G2
3
G3
4
G4
6 7
G5
G6 8
I_O1
1I_O2 5
NA
FL200
F5024
C203
1u1u
C261 C262
C229
10p
C248
+2.7V_DIB_RF
C246
2200p
0.1u
0.1u
C263
R218 10K
+2.7V_DIB_RF
C238
22n
C245
0.1u
+2.7V_DIB_A
TCC_1.8V_SDR
FB206
FB203
+VPWR
1u
C244
C266
1u
33
MIX_VCC2
NC 37
6PDOUT
41
PGND
21
PWR_DN
1RFIN_LBAND
RFIN_UHF
3
29
RF_AGC
36
RF_LOAD_LBAND
38
RF_LOAD_UHF
RF_VCC
5
18 SER_CLK 17 SER_DATA 16 SER_VCC
XTALN
12 13 XTALP
DCOC_IN 31
32
DCOC_IP
DCOC_QN
19
DCOC_QP
20
GND1
2
4GND2
GND3 26
30
GND4
GND5 40
39
LNA_VCC
8LOAVCC
LODVCC
11
10 LOLPF
LOREG
9
MIX_CAP 34
MIX_VCC1 35
BB_AGC 28
25
BB_IN 24
BB_IP 23
BB_QN
BB_QP 22
BB_VCC 27
CLKN
15 CLKP 14
DAC_GPO
7
X201 FA-238_30M_99PF
12
34
MT2260
U200
30MHz
C242
1u
0.1u
C232
10K
R211
C220
10p
22p
C258
10p
C231
C236
1000p
0.1uC210
C201
NA
+1.2V_DIB_PLL
0R210
NA
L201
+1.8V_SRAM
1u
0.1u
C265
0.1u
C251
C234
100pR201
C216
0.1uC208
1000p
+2.7V_DIB_RF +2.7V_DIB_RF
NA
C202
1000p
C227
VOUT
10nH
L203
+2.7V_DIB_A
R1161N271D-TR-F
U203
3CE 4
ECO
2GND
VDD
15
15nH
L202
R219
C259
10K
1u
R209 0
C247
220n
+2.7V_DIB_RF
FB202 75
R220
10K
+1.2V_DIB_PLL
33nH
L204
TCC_1.2V_CORE
390R216
C233
0.1u
C253
+1.8V_SRAM
C267
1000p
10p
1u
C230
12
34
+1.8V_SRAM
0R213
30MHz
X200
FA-238_30MHz
C204 0.1u
7pC200
C217
10p
1u
C212
+2.7V_DIB_OSC
+2.7V_DIB_RF
C264
0.1u
C221 0.01u
C207 0.1u
1u
C240
C224
20p
1000p
C254
C228
0.1u
1u
+1.2V_DIB_A
C260
R204 1M
100ohmR203
C235
OUT200
0.1u
C239
1u
C211 0.1u
1.5K
R215
TCC_2.7V_MISC
1000p
+2.7V_DIB_RF
C215
C209 1u
R1131N121D-TR-F
U205
3CE
2GND 4
NC
VDD
1VOUT 5
C255
0.1u
C243
10p
C223
20p
+2.7V_DIB_RF
+1.2V_DIB_CORE
FB200
R208 10K
KMS-507
SW200
ANT G1
G2 RF
C214
1000p
C222
10p
C219
1u
C252
1000p
+2.7V_DIB_OSC
1000p
C226
10p
22p
C257
C256
15nH
L200
10KR207
47R205
C241
0.1u
FB201
R214 0
R202 100ohm
C250
4.7u
C205
10p
C218
TCC_2.7V_MISC
0.1u
3CE
2GND 4
NC
VDD
1VOUT 5
+VPWR
R1114N271D-TR-F
U206
R212 0
R200
0
GND
2
NC 4
1VDD 5
VOUT
+1.2V_DIB_CORE
+1.2V_DIB_A
U202
R1114N181D-TR-F
CE
3
+1.8V_SRAM
FB205
C249
1u
FB204
0.1u
C225
+VPWR
A1
A2 _OE
B2 _UB
G5 _WE
R217 390
IO15 G1
IO16
C5
IO2 C6
IO3
IO4 D5
IO5 E5
IO6 F5
IO7 F6
IO8 G6
IO9 B1
D6 VCC1
E1 VCC2
VSS1 D1
VSS2 E3
E6
VSS3
B5 _CS1
_LB
B3
A4
B4
A5
C3
C4 A6
D4 A7
H2 A8
H3 A9
A6 CS2
DNU1 G2
H6
DNU2
B6
IO1
C1
IO10 C2
IO11 D2
IO12
IO13 E2
IO14 F2
F1
K6F8016R6D-XF70
U204
A0
A3
A1
A4
H4 A10
H5 A11
A12
G3
G4 A13
F3 A14
A15
F4
A16
E4
A17
D3
A18
H1
A5 A2
A3
4.7uC206
VSS5 C4
C5
VSS6 VSS7 C8 VSS8 C10
C14
VSS9
XENA
H2
XIN
A4
B4 XOUT
F3
VSS11 H3 VSS12 VSS13 H13
J1
VSS14 VSS15 J2
J3
VSS16 K1 VSS17 VSS18 K2
K3
VSS19
VSS2 B3
VSS20 L2
N6
VSS21 VSS22 N7
N8
VSS23
B10
VSS3 B15 VSS4
VDD_BANK2_2 D15
A5
VDD_CORE_1 H1 VDD_CORE_2 VDD_CORE_3 R7 VDD_CORE_4 H15
VIN0
B5
B6 VIN1
VIN2
B7
B12 VINNI
B8 VINNQ
VINPI
B11
VINPQ
B9
VREFN
A12
A11 VREFP
VSS1 A10
VSS10 D13
SRAM_BUS38 E13
E14
SRAM_BUS39
R10 SRAM_BUS4
SRAM_BUS40 E15
SRAM_BUS5
P10
N10 SRAM_BUS6
SRAM_BUS7
R11
P11 SRAM_BUS8
SRAM_BUS9
N11
VBG
A14
A13 VCM
A3 VDDXI
VDDXO
A2
F1 VDD_BANK0
R6
VDD_BANK1
R8
VDD_BANK2_1
L14 SRAM_BUS23
SRAM_BUS24
L15
SRAM_BUS25
K13 K14 SRAM_BUS26
SRAM_BUS27
K15
SRAM_BUS28
J13 J14 SRAM_BUS29
SRAM_BUS3
N9
SRAM_BUS30
J15
H14 SRAM_BUS31
SRAM_BUS32
G13
G14
SRAM_BUS33
SRAM_BUS34 G15
SRAM_BUS35 F13
F14
SRAM_BUS36
SRAM_BUS37 F15
SRAM_BUS0
P8
SRAM_BUS1
R9
R12 SRAM_BUS10
SRAM_BUS11
P12
N12 SRAM_BUS12
SRAM_BUS13
R13
P13 SRAM_BUS14
R14 SRAM_BUS15
SRAM_BUS16
P15
SRAM_BUS17
N14 N15 SRAM_BUS18
SRAM_BUS19
M13
P9 SRAM_BUS2
M14 SRAM_BUS20
SRAM_BUS21
M15
SRAM_BUS22
L13
N1
HOST_BUS2
HOST_BUS3 N2
HOST_BUS4 P1
P3
HOST_BUS5
HOST_BUS6 N5
R2
HOST_BUS7
HOST_BUS8 P4
HOST_BUS9 R3
G1
INT_SELECT0 G3
INT_SELECT1
L1 IO_CLK
PLL_GND
C6 PLL_VCC
A6
RESETN G2
SCL_MASTER
E2
SDA_MASTER
F2
M3
GPIO_BUS1 N4
GPIO_BUS2
D14
GPIO_BUS3
GPIO_BUS4 C15
D1
GPIO_BUS5 GPIO_BUS6 D2
D3
GPIO_BUS7 GPIO_BUS8 C1
B1
GPIO_BUS9
M1
HOST_BUS0
HOST_BUS1 M2
P5
HOST_BUS10 R4
HOST_BUS11
HOST_BUS12 P6
HOST_BUS13 R5
P7
HOST_BUS14
U201
DIB7000-H
E1 AGC1
E3 AGC2
C11 AGND1
C9 AGNDIQ
AGNDREF
C12
C7 AGND_LS
AVDD1
B13
A9 AVDD3V3
AVDDIQ
A8
A7 AVDD_LS
L3 CLK_SEL
C2
GPIO_BUS0
SRAM_DATA[0]
SRAM_ADDR[9]
SRAM_ADDR[8]
SRAM_ADDR[7]
SRAM_ADDR[6]
SRAM_ADDR[5]
SRAM_ADDR[4]
SRAM_ADDR[3]
SRAM_ADDR[2]
SRAM_ADDR[18]
SRAM_ADDR[17]
SRAM_ADDR[16]
SRAM_ADDR[15]
SRAM_ADDR[14]
SRAM_ADDR[13]
SRAM_ADDR[12]
SRAM_ADDR[11]
SRAM_ADDR[10]
SRAM_ADDR[1]
SRAM_ADDR[0]
RF_AGC
BB_AGC
DIB_PWR_EN
RFIN
SRAM_WE_N
SRAM_UB_N
SRAM_OE_N
SRAM_LB_N
SRAM_CE1_N
SRAM_DATA[8]
SRAM_DATA[7]
SRAM_DATA[6]
SRAM_DATA[5]
SRAM_DATA[4]
SRAM_DATA[3]
SRAM_DATA[2]
SRAM_DATA[1]
SRAM_DATA[15]
SRAM_DATA[14]
SRAM_DATA[13]
SRAM_DATA[12]
SRAM_DATA[11]
SRAM_DATA[10]
SRAM_DATA[9]
SRAM_ADDR[3] SRAM_ADDR[2]
SRAM_ADDR[12]
SRAM_DATA[4]
SRAM_ADDR[11]
SRAM_ADDR[8]
SRAM_ADDR[13]
SRAM_DATA[6]
SRAM_ADDR[4]
SRAM_UB_N
SRAM_ADDR[1]
SRAM_DATA[1]
SRAM_LB_N
SRAM_ADDR[0]
SRAM_CE1_N
SRAM_OE_N
DIB_DATA[3]
DIB_DATA[2]
RFIN
WBD_OUT
DIB_I2C_SDA
DIB_I2C_SCL
QPO
QNO
IPO
INO
DIB_DATA[4]
DIB_PWR_EN
DIB_PWR_EN
DIB_PWR_EN
SRAM_WE_N
SRAM_ADDR[9]
SRAM_ADDR[18] SRAM_ADDR[15] SRAM_ADDR[14]
SRAM_DATA[13] SRAM_DATA[15] SRAM_DATA[14]
SRAM_ADDR[17]
SRAM_DATA[12]
SRAM_ADDR[16]
SRAM_DATA[5] SRAM_DATA[3]
SRAM_DATA[11]
SRAM_DATA[7]
SRAM_ADDR[7]
SRAM_DATA[9] SRAM_DATA[2]
SRAM_ADDR[5]
SRAM_DATA[10]
SRAM_DATA[0]
SRAM_ADDR[6]
SRAM_ADDR[10]
SRAM_DATA[8]
WBD_OUT
IPO
QPO
DIB_RESET_N
INO
QNO
DIB_I2C_SDA
DIB_I2C_SCL
RF_AGC
BB_AGC
DIB_IRQ
DIB_DATA[0]
DIB_DATA[1]
DIB_WE_N
DIB_ADDR[1]
DIB_ADDR[2]
DIB_OE_N
DIB_CS_N
DIB_DATA[7]
DIB_DATA[5]
DIB_DATA[6]
DIB_RDY
7. CIRCUIT DIAGRAM

- 165 -
5
Page:
4
HKADC[5] - VBATT_TEMP
PMIC_AUXIN[1]
Value fixed
3
C
8
LG ELECTRONICS INC.
8-bit, NAND boot
8
6
E
150K : 150K : 1.30V
1%
PCB_Rev_ADC
MODE
150K : 100K : 1.04V
C
Size:
98
1110
150K : 680K : 2.13V
MFG ENGR CHK:
USB 48M CLK
150K : 10K : 0.016V
Near to B18 (VDD_PLL)
Normal boot
1
H
for VSS_THERMAL
MOBILE HANDSET R&D CENTER
DEVELOPMENT LAB 4 DEVELOPMENT GROUP 1
9
H
D
BOOT_MODE3
Changed by:
150K : 750K : 2.17V
6
JH Park
E
0
1
4
G
Size:
Engineer:
B
5
G
16-bit, NAND boot
5
Engineer:
7
D
C
10
DOC CTRL CHK:
12
JH Park
QA CHK:
3
(VDD_DAC_REF)
1 7
PMIC_AUXIN[2] - PA_THERM
Time Changed:
F
1%
2
Changed by:
150K : 300K : 1.73V
150K : 470K : 1.97V
B
3
TITLE:
10%
(CAD : 10uF=>Input MSMA_2.6V)
HKADC(4):PCB_Rev_ADC
11
150K : 47K : 0.62V
5
D12(VDDA1) and F12(DAC_REF)
w18 (Analog VSS guard ring for CODEC)
Date Changed:
1
MFG ENGR CHK:
KU950 Main 1.1
HKADC[0] - AMUX_OUT
HKADC[1] - VBATT_SENSE
HKADC[2] - HDET1
HKADC[3] - REMOTE_ADC
E
6
A
ADC
HKADC[4] - PCB_Rev_ADC
3
Time Changed:
C
G
2 10
2200p cap => place between
7
( Default Pull-Down)
A
Date Changed: QA CHK:
(PLLOUT_TEST)
H
Drawn by:
1 1
12
12
Native, ARM JTAG
11
0 1 0
B
6
A
Page:
BOOT_MODE2 BOOT_MODE
0 1
150K : 68K : 0.81V
A
11
Drawn by:
DOC CTRL CHK:
G
R&D CHK:
0 0 0
F
B
D
A2
Native, MSM JTAG
4
X 0
H
D
MODE2 MODE1 MODE0
4
REV:
Trusted boot
Drawing Number:
109
NOR boot
Near to MSM
TITLE:
7
REV: Drawing Number:
2 129
12
R&D CHK:
8
E
FF
2006, Sep 08
3/9
A2
JH Park 10:49:00 am
0R316
C336 2200p
0.1u
C348
1000p
C337
VREG_MSMP_2.7V
R304
51K
TP303
NA
R320
100KR313
C339
1000p
C341
0.01u
R317 0
1000p
VREG_MSME_1.8V
C338
C333
0.01u
0.01u
C315
100KR310
C345
0.1u
C344
1000p
C322
0.01u
C323
0.01u
L300
100nH
180K
R308
C303 22n
R321
NA
0.1uC311
C310 0.1u
R324
2.2K
0.1u
C347C346
0.1u
C342
1000p
R311
0.01u
NA
C330
R319
100K
R303
180K
R309 100K
100K
R322
R302
150K
C332
0.01u
C343
VREG_MSMP_2.7V
VREG_MSMP_2.7V
TP302
1000p
C340
1000p
C306 0.015u
R307
10K
0.1u
C350
NA
C309
C301 0.1u
1000p
VREG_MSMP_2.7V
10K
R305
C327
2.2K
R323
470KR306
C302 0.1u
VREG_MSMA_2.6V
TP306
0.1u
C335
A24
F1 VSS_PAD1_0
K1 VSS_PAD1_1
M1 VSS_PAD1_2
VSS_PAD1_3
R1
VSS_PAD1_4
U1
AF6 VSS_PAD2_0
VSS_PAD2_1
AF11
VSS_PAD2_2
AF15
R26 VSS_PAD3_0
B17 VSS_PAD3_1
A15 VSS_PAD3_2
A9 VSS_PAD3_3
VREG_MSME_1.8VVREG_MSMC_1.375V
VSSA6
V26 VSSA7
VSSA8
W16
W18 VSSA9
C1
VSS_DIG_0 H1
VSS_DIG_1
VSS_DIG_10 A14
A11
VSS_DIG_11 A5
VSS_DIG_12
VSS_DIG_2 W1
VSS_DIG_3 AC1
AF8
VSS_DIG_4 AF16
VSS_DIG_5 T26
VSS_DIG_6
VSS_DIG_7 G26
VSS_DIG_8 D26
VSS_DIG_9
B2
B25 VSS7
VSS8
B26
VSS9
D4
VSSA1
A18
W26 VSSA10
AB26 VSSA11
VSSA12
AC16
AC26 VSSA13
VSSA14
AD25
VSSA15
AF23
AF24 VSSA16
A21 VSSA2
VSSA3
D13
VSSA4
D19
P26 VSSA5
U19
W8
W19 VSS39
VSS4
A26
VSS40 AA6
VSS41 AA21
VSS42 AC4
AC23
VSS43
VSS44 AE1
AE2
VSS45
VSS46 AE25
AE26
VSS47
VSS48 AF1
AF2
VSS49
B1 VSS5
VSS50 AF25
AF26
VSS51
VSS6
N12 N13 VSS24
VSS25
N14
VSS26
N15
VSS27
P12 P13 VSS28
VSS29
P14
A25 VSS3
P15 VSS30
VSS31
R12 R13 VSS32
VSS33
R14 R15 VSS34
VSS35
R16
T11 VSS36
VSS37
T16
VSS38
B18
A1 VSS1
VSS10
D23
F6 VSS11
F21 VSS12
H8 VSS13
VSS14
H19
VSS15
K10
L11 VSS16
VSS17
L16
M11 VSS18
VSS19
M12
VSS2
A2
M13 VSS20
VSS21
M14 M15 VSS22
VSS23
VDD_DIG_8 VDD_DIG_9 B24
B21
VDD_MDDI
F2
VDD_PAD1_0 VDD_PAD1_1 K2
M2
VDD_PAD1_2 R2 VDD_PAD1_3 U2 VDD_PAD1_4
AE6
VDD_PAD2_0 VDD_PAD2_1 AE11 VDD_PAD2_2 AE15 VDD_PAD3_0 R25 VDD_PAD3_1 K25
B15
VDD_PAD3_2 B9 VDD_PAD3_3
A3
VDD_PAD4_0
VDD_PLL
VDDA5 AA26
VDDA6 VDDA7 AE23 VDDA8 AE24
AA16
VDDA9
VDD_DIG_0 C2
VDD_DIG_1 H2
VDD_DIG_10 B14
B11
VDD_DIG_11 B5 VDD_DIG_12
W2
VDD_DIG_2 AC2 VDD_DIG_3 AE8 VDD_DIG_4 AE16 VDD_DIG_5 VDD_DIG_6 T25
G25
VDD_DIG_7 D25
MSM6275_B
U300-2
RESERVED C26
D12
VDDA1
VDDA10 AF17
P23
VDDA2 VDDA3 U25
U26
VDDA4 Y26
TP301
C325
0.1u
10p
C300
C317
0.1u
C316
C320
0.1u
TP305
0.01u
C307
C319
NA
0.01u
C328
1000p
C321
0.1u
VREG_MSMP_2.7V
C313
10u
0.015uC305
C334
51R312
0.1u
R314 NA
TP304
NAR315
2
48MHz
ICRT20S48M0X514CR X300
13
R300
1M
XMEM2_CS_N2_GPIO35
XMEM2_CS_N3_GPIO36 AA15
0.01u
C318
USB_RX_DATA_GPIO29
N23 USB_SE0_VM
USB_XTAL48_IN A10
USB_XTAL48_OUT B10
WDOG_EN AE17
H25
WDOG_STB_SBCK1_GPIO0
WE1_N_SDRAM1_WE_N U8
AF4 WE2_N
W6
XMEM1_CS_N0
XMEM1_CS_N1_GPIO76 AA1
XMEM1_CS_N2_SDRAM1_CS_N0 Y4
Y6
XMEM1_CS_N3_SDRAM1_CS_N1_GPIO77
AA2
XMEM1_HWAIT_N
K8
XMEM1_LWAIT_N_SDRAM1_CAS_N
XMEM2_CS_N0
W14
AC15 XMEM2_CS_N1
W15
P16
M23 UART1_DP_RX_DATA_GPIO96
L26 UART1_DP_TX_DATA_GPIO95
UART1_RFR_N_PA_POWER_CTL_M_GPIO98
P21
UART2_CTS_N_GPIO90
G6
UART2_DP_RX_DATA_GPIO89 H6
E4 UART2_DP_TX_DATA_GPIO88
F4 UART2_RFR_N_GPIO91
L23 UART3_CTS_N_GPIO86
UART3_DP_RX_DATA_GPIO85
M21 M19 UART3_DP_TX_DATA_GPIO84
UART3_RFR_N_GPIO87 L25
M6
UB1_N_SDRAM1_DQM1
AF10 UB2_N
N26 USB_DAT_VP
USB_OE_TP_N
N25
N19
SDRAM1_D9
SLEEP_XTAL_IN A16
SLEEP_XTAL_OUT B16
SYNTH0_GP_PDM0_GPIO92 F18
SYNTH1_GPIO41
H23
SYNTH2_GPIO65 B6
D16
TCK
D18
TCXO
F19
TCXO_EN_GPIO94
TDI D15
A17
TDO
F15
TMS
L13
TRK_LO_ADJ
TRST_N H15
TX_AGC_ADJ H13
H12
TX_ON_GRFC10
UART1_CTS_N_GPIO97
SDRAM1_D22
SDRAM1_D23
W4 SDRAM1_D24
R4
R6 SDRAM1_D25
SDRAM1_D26
T1
T2 SDRAM1_D27
SDRAM1_D28
R8 SDRAM1_D29
T4
D1 SDRAM1_D3
T6 SDRAM1_D30
SDRAM1_D31
T8
SDRAM1_D4
AB4 SDRAM1_D5
J6 SDRAM1_D6
G2
H4 SDRAM1_D7
SDRAM1_D8
P4
J4
N4
SDRAM1_D0
E2 SDRAM1_D1
D2
SDRAM1_D10
J2 SDRAM1_D11
K6
J1 SDRAM1_D12
K4 SDRAM1_D13
SDRAM1_D14
L8
L6 SDRAM1_D15
U6 SDRAM1_D16
SDRAM1_D17
V4
R11 SDRAM1_D18
E1 SDRAM1_D19
AB2 SDRAM1_D2
SDRAM1_D20
Y1
Y2 SDRAM1_D21
V6
A12
F13
RESIN_N F11
RESOUT_N
RESOUT_N_EBI1 AA4
L19 RINGER_GPIO18
G1
ROM1_ADV_N_SDRAM1_RAS_N
ROM1_CLK_SDRAM1_CLK AB1
H16
RTCK
SBCK
L21 SBDT
J23
SBDT1_GPIO1 F26
SBST
H26
H18
SBST1_GPIO93
F25
SDCC_DAT1_GPIO99
SDCC_DAT2_GPIO100 M25
M26
SDCC_DAT3_GPIO101
SDRAM1_CLK_EN
MMC_CMD_GPIO30 MMC_DATA_SDCC_DAT0_GPIO32
L14
Y23
MODE0
U23
MODE1 MODE2 T21
NAND2_FLASH_READY_GPIO33
T14
V2
OE1_N
OE2_N
AF7
F17
PA_ON0
PA_ON1_GPIO2 H11
PA_POWER_CTL
P25
Q_IM_CH0 AA25
W23
Q_IM_CH1
Q_IP_CH0 Y25
V23
Q_IP_CH1
Q_OUT B12
Q_OUT_N
MDDIH_STBN MDDIH_STBP
A20
AD2
MDP_VSYNC_PRIMARY_GPIO105
MDP_VSYNC_SECONDA_GPIO104 AE3
AF20
MIC1N AE20
MIC1P
MIC2N AF21
AF22
MIC2P
T15
MICBIAS
MICFBN AC22
AC21
MICFBP AC19
MICINN
MICINP AC20
AA18
MICOUTN
MICOUTP AA19
MMC_CLK_SDCC_CLK_GPIO31
M16
H14
I_OUT_N
KEYSENSE0_N_GPIO62
R21
P19 KEYSENSE1_N_GPIO63
D14 KEYSENSE2_N_GPIO46 R23 KEYSENSE3_N_GPIO47
KEYSENSE4_N_GPIO48
U21
L2
LB1_N_SDRAM1_DQM0
AE10 LB2_N_A2_0
AF14 LCD_CS_N_GPIO38
LCD_EN_GPIO37 AE13
A23
MDDIC_DATN
MDDIC_DATP A22
B23
MDDIC_STBN
MDDIC_STBP B22
B19 MDDIH_DATN
MDDIH_DATP
B20 A19
GSM_PA_DAC_REF
HKAIN0 V21
AA23
HKAIN1 HKAIN2 W21
V19
HKAIN3 HKAIN4 Y21
AB23
HKAIN5
W17
HPH_L
HPH_R AA17
I2C_SCL_GPIO27
N16 I2C_SDA_GPIO26 K21
I_IM_CH0 AB25
I_IM_CH1 V25
I_IP_CH0 AC25
I_IP_CH1 W25
B13
I_OUT
A13
GPIO52 GPIO53
L12
GPIO64
F14
GPIO66 F8
GP_PDM1_PA_RANGE0 H17
GP_PDM2_PA_RANGE1 D17
GRFC0_GPIO3 B8
GRFC1_AUX_SBDT_GPIO4 A8
GRFC2_GPIO5 D9
GRFC3_GPIO6 F10
H10
GRFC4_AUX_SBCK_GPIO7
GRFC5_AUX_SBST_GPIO8 D11
T23
GRFC7_GPIO10
GRFC8_GPIO11 B4
GRFC9_GPIO12 D5
T19
GRFX6_GPIO9
AD26
D2_9
DAC_REF F12
AE18
EAR1ON AF18
EAR1OP
K26 GPIO17
G21 GPIO19
GPIO28 A6
F7 GPIO39
D6 GPIO40
GPIO42
D7
GPIO43 H9
D8 GPIO44
GPIO45
A4
F9 GPIO49
B7 GPIO50 A7 GPIO51
D10
CCOMP
AC5 D2_0
D2_1
AF3
D2_10
AC8 D2_11
AE7 D2_12
AA9 D2_13
W10
AC9 D2_14
AA10 D2_15
AE4 D2_2
D2_3
AC6 D2_4
AE5 D2_5
AA7 D2_6
AF5
AC7 D2_7
AA8 D2_8
W9
F23
H21
BT_TX_RX_N_GPIO21
J21
CAMCLK_PO_GP_MN_GPIO13
J25 CAMIF_DATA0_GPIO83
CAMIF_DATA1_GPIO81
J26
CAMIF_DATA2_AUX_TRST_N_GPIO54
D21 C25 CAMIF_DATA3_AUX_TCK_GPIO55 D22 CAMIF_DATA4_AUX_TMS_GPIO56
CAMIF_DATA5_AUX_TDI_GPIO57
J19
L15 CAMIF_DATA6_AUX_TDO_GPIO58
D20 CAMIF_DATA7_GPIO59
CAMIF_DATA8_GPIO60
F16 CAMIF_DATA9_GPIO61 F20
CAMIF_HSYNC_GPIO15
E23
K23 CAMIF_PCLK_GPIO82
B3 CAMIF_VSYNC_GPIO16
AA20
A2_9
AUXIN AF19
AUXIP AE19
AUXON_AUXOR AC18
AC17
AUXOP_AUXOL
K19
AUX_PCM_CLK_GRFC14_GPIO80
AUX_PCM_DIN_GRFC13_GPIO14 N21
G4
AUX_PCM_DOUT_GRFC12_GPIO103 J8
AUX_PCM_SYNC_GRFC11_GPIO102
BOOT_MODE AE21
AE22
BOOT_MODE2 BOOT_MODE3 AD1
BT_CLK_GPIO25 G23
R19
BT_DATA_GPIO20
BT_SBCK_GPIO23 E26
E25
BT_SBDT_GPIO22
BT_SBST_GPIO24
A2_12
A2_13
AA13
AC13 A2_14
W13 A2_15
AE14 A2_16
A2_17
AC14
T13 A2_18
AA14 A2_19
A2_2
AF9
A2_20_GPIO34
AF13
W11 A2_3
A2_4
AC10 A2_5
AA11
AC11 A2_6
A2_7
T12 A2_8
W12
AA12
P8 P11
A1_14
A1_2 L4
A1_23_SDRAM1_DQM2_GPIO78 U4
A1_24_GPIO79 V1
A1_25_SDRAM1_DQM3_GPIO75 V8
A1_3 M8 A1_4 M4
N11
A1_5 A1_6 N8
N6
A1_7 N2 A1_8 A1_9 N1
A2_1
AE9
A2_10
AC12
AE12 A2_11
AF12
MSM6275_A
U300-1
A1_1 L1
A1_10 P1
P2
A1_11 P6 A1_12 A1_13
VREG_MSMA_2.6V
NA
C308
1000p
C329
0.1u
C324
VREG_MSMP_2.7V
C349
0.01u
VREG_MSMP_2.7V
0.1u
C326
0.1u
C314
NA
R318
TP300
R301
300K
4.7u
C312
C304 22n
RMT_INT_MSM
MM_LCD_VSYNC
HOOK_SENSE_H
LCD_IF_MODE_1
FLASH_LED_CTRL
CAM_SYSCLK C331
0.01u
SPK_AMP_EN
USB_XTAL_OUT
USB_XTAL_IN
MC_IO_OFF
LCD_IF_MODE_0
AV_SENSE_N
UART_TXD
DAC_REF
RMT_ADC_MSM
EAR_MIC_P_MSM
RECEIVER+ RECEIVER-
TCC_RESET_N
JTAG_TDO
I2C_SDA
I2C_SCL
VGA_I2C_EN
USB_XTAL_IN
GSM_PA_PWR_CTL_REF
EBI2_ADDR[2]
EBI2_ADDR[1]
CAM_DUAL_LDO_EN
SDRAM_CLK
GSM_TX_VCO_1_EN_N
GSM_TX_VCO_0_EN_N
GSM_PA_EN
MMC_CMD
OPT_R OPT_L
MIC1P MIC1N
EBI2_DATA[0:15]
EBI2_DATA[15]
SDRAM_DATA[0:31]
SDRAM_DATA[31]
TCC_HOST_CS_N
MSM_LCD_ADS_N
UART_RXD
VC_IO_OFF
DAC_REF
LCD_BL_CTRL
LCD_BYPASS_ENABLE
PA_R0
MSM_LCD_RESET_N
NAND_CLE
MICBIAS
MICINN
NAND_READY
EBI2_DATA[1]
EBI2_DATA[12]
EBI2_DATA[7]
EBI2_DATA[5]
NAND_ALE
MICFBN
MICFBP
V_CAM_RESET_N
EBI2_DATA[0]
VBAT_SENSE VBAT_TEMP
EBI2_DATA[10]
EBI2_DATA[8]
EBI2_DATA[3]
AMUX_OUT MICOUTP
KEY_COL[2] KEY_COL[5]
CAM_VSYNC
CAM_DATA[2] CAM_DATA[6]
TCC_PWR_EN
BUFF_TCXO SLEEP_CLK
TX_IM
TX_QM
GSM_PA_BAND
PS_HOLD
PM_INT_N
BT_DATA
CAM_PCLK
CAM_DATA[0] CAM_DATA[5] CAM_DATA[7]
JTAG_TCK
JTAG_TDI
MMC_CLK
KEY_COL[1]
USIM_DATA
KEY_COL[3]
ANT_SEL2
CAM_DATA[1] CAM_DATA[4]
PA_ON
TX_IP
TX_QP
USB_XTAL_OUT
EBI2_DATA[14]
EBI2_OE_N
EBI2_DATA[6]
EBI2_WE_N
EBI2_DATA[2]
MICINP
TCC_CS_N
EBI2_DATA[13]
EBI2_DATA[11]
EBI2_DATA[4]
SWIVEL_DETECT
SDRAM_DATA[3]
SDRAM_DATA[7]
SBST
SDRAM_CLK_EN
JTAG_RTCK
JTAG_TRST_N
TRK_LO_ADJ
MMC_DATA
RF_ON_TX_ON
KEY_COL[0]
SDRAM_DATA[8]
USIM_RST_N
SDRAM_DATA[2]
BT_CLK
BT_TX_RX_N
SDRAM_DATA[6]
SDRAM_RAS_N
KEY_COL[4]
SDRAM_DATA[0]
BT_SBST
CAM_DATA[3]
TCXO_EN
JTAG_TMS
RESET_IN_N RESOUT_N
USIM_CLK
BT_SBCK
BT_SBDT
CAM_HSYNC
SDRAM_DATA[1]
M_CAM_RESET_N
USB_OE_N
USB_DAT
SDRAM_ADDR[8]
USB_SE0
SDRAM_ADDR[5] SDRAM_ADDR[9] SDRAM_ADDR[3]
SDRAM_DQM[1]
SDRAM_ADDR[4]
PM_SBCK
SDRAM_DATA[14]
SDRAM_DATA[15]
SDRAM_ADDR[2]
HP_AMP_EN
PM_SBDT
PM_SBST
SDRAM_DQM[0]
TX_AGC_ADJ
SDRAM_ADDR[1]
SDRAM_CAS_N
SDRAM_DATA[11]
SDRAM_DATA[13]
MMC_CD
SBCK
SDRAM_DATA[4]
SDRAM_DATA[5]
SDRAM_DATA[9]
TCC_INT
SBDT
SDRAM_DATA[10]
SDRAM_DATA[12]
SDRAM_DATA[18]
SDRAM_DQM[3]
SDRAM_DATA[22]
SDRAM_DATA[17]
RX_IM
SDRAM_ADDR[0]
SDRAM_WE_N
SDRAM_DATA[16]
SDRAM_DQM[2]
SDRAM_DATA[30]
SDRAM_DATA[29]
ANT_SEL1
SDRAM_DATA[27]
EAR_SENSE_N
SDRAM_DATA[26]
SDRAM_DATA[28]
SDRAM_DATA[25]
SDRAM_DATA[24]
KEY_ROW[3] KEY_ROW[4]
ANT_SEL0
SDRAM_ADDR[13] SDRAM_ADDR[12]
GSM_PA_RAMP
KEY_ROW[0]
SDRAM_ADDR[11]
KEY_ROW[1] KEY_ROW[2]
SDRAM_ADDR[14] SDRAM_ADDR[10]
SDRAM_ADDR[6] SDRAM_ADDR[7]
SDRAM_ADDR[0:14]
MICOUTN
MICOUTP
MICINP
MICFBN
MICINN
MICFBP
SDRAM_CS_N
RX_QP
RX_QM
HDET1
SDRAM_DATA[21]
SDRAM_DATA[20]
EBI2_DATA[9]
SDRAM_DATA[23]
RX_IP
SDRAM_DATA[19]
MICOUTN HEADSET_L HEADSET_R
NAND_CS_N
7. CIRCUIT DIAGRAM

- 166 -
5
4
Always on state
5 10
A
12
LG ELECTRONICS INC.
H
1
E
Changed by:
5
JH Park
DEVELOPMENT LAB 4 DEVELOPMENT GROUP 1
E
6
G
10 11
Drawn by:
Near to
Date Changed:
Drawn by:
10
G
E
7
A
H
C
D
REV:
6
Page:
E
CODEC I/F
ARM926 & ARM946
5
1
4
3
7
R&D CHK:
ARM946
2
9
D
KU950 Main 1.1
F
8
H
0
1
DOC CTRL CHK:
Changed by:
G
Time Changed:
8
ARM926
TITLE:
9
1
B
MFG ENGR CHK:
DOC CTRL CHK:
Internal pull down
active HIGH
2
LCD I/F
XA1
1
12
F
7
QA CHK:
XA0
A
3
TITLE:
JH Park
Engineer:
12
Engineer:
Drawing Number:Drawing Number:
MOBILE HANDSET R&D CENTER
1
129
MFG ENGR CHK:
C
6
0
3
1
Time Changed:
6
F
0
8
Size:
F
Size:
4
Default : Pull down
2
Date Changed:
C
7
0
C
G
4
B
1110
TCC7820 Power
9
Test mode (Not used)
JTAG I/F
11
A2
JH Park 11:14:00 am
A2
3
B
Page:
REV:
2
Default : Pull down Default : Pull down
QA CHK:
TCC7820
R&D CHK:
JTAG selection
8
SRAM like I/F
B
1
D D
11
H
A
2006, Sep 08
4/9
TP403
C421
4.7u
1M
R429
R412 NA
100pC422
DSX321G(12MHz,8PF)
X400
12MHz
12
34
100KR415
4.7uH
TCC_2.7V_MISC
TCC_2.7V_MISC
+VPWR
TCC_1.8V_SDR
L400
1uC429
TCC_1.2V_CORETCC_1.8V_SDR
+2.7V_DIB_A
NAR411
R426 NA
100KR413
C428
TCC_2.7V_EHI_LCD
TCC_2.7V_MISC
TCC_2.7V_MISC
1u
0.1u
NA
R428
VDD
1VOUT 5
C405
U401
R1161N271D-TR-F
3CE 4
ECO
GND
2
4.7u
0.1u
C424
C415
110KR405
R409
100K
R410 NA
C418 1800p
R414 100K
4.7u
C423
56KR406
R400 NA
100pC420
C430 2.2u
R404
NA
C410 0.1u
0.1uC409
R424 NA
+VPWR
4.7uHL401
NAR419
TCC_2.7V_MISC
4.7K
R422
TCC_2.7V_EHI_LCD
R416 10K
C400
C416
12p
0.1u
12p
C401
C402 0.1u
10K
R421
TP402
C406 0.1u
TP407
R423
4.7K
R417 0
0.1uC414
100K
R401
R418 0
2.2u
7PGND1
PGND2
10
VIN1
12
VIN2
9
+VPWR
C427
U400 AAT2510IWP-AA-T1
13 BGND
1EN1
EN2
4
FB1 2
5
FB2
3GND1
GND2
6
11
LX1
LX2 8
R425
100K
C425 2.2u
0.1uC412
R420
100K
TP404
TP406
C404 0.1u
TP408
C426 2.2u
P10
M10
XD2
N10
XD3
XD4 R10
XD5 M11
XD6 N11
P11
XD7
XI C7
A6
XO
G7
XTIN
XTOUT C11
K10
UCTS0
J15
H12 UCTS1
URTS0
J13
F14 URTS1
J14 URXD0
URXD1
G15
K15 UTXD0
UTXD1
J12
M7
VCKE
WEN P15
R11
XA0
XA1 N12
P12
XA2
XA3 R12
XD0 M9
XD1
F6
PWR_UTC_2 J6
PWR_UTX F8
D6 REXT
RSTN H14
H15 RTCK
SCK0 P4
P9
SCK1
SDI0 M4
P8
SDI1
R8
SDO0
SDO1 R9
J10 TCK
TDI
H13
K9 TDO K8
TEST
TMS
PWR12_7 PWR12_8 M12
D11
PWR_ADC
N8
PWR_AUD
D7
PWR_CAM G3
PWR_EHI
PWR_GP0 K12
C15
PWR_HDD
PWR_LCD A3
PWR_MEM0 R13 PWR_MEM1 P13
A10
PWR_PLL
PWR_RTC A9
K4
PWR_SDR_1 PWR_SDR_2 L3
L8
PWR_SDR_3
PWR_UTC_1
LXD3
LXD4 B2
A2
LXD5
J1
LXD6
K1
LXD7
B3
LXD8
LXD9 B4
MCLK N6
NTRST
G14
OEN P14
G12
PWR12_1 PWR12_2 G13 PWR12_3 L4
L5
PWR12_4 PWR12_5 L11
M5
PWR12_6 M6
LCSN1
LOEN C1
LRCK R3
LWEN M1
D3
LXA0
LXD0 K2
B1
LXD1
LXD10 E5
E4
LXD11
C6
LXD12
LXD13 D5
LXD14 B5
C5
LXD15
C4
LXD16
LXD17 C2
G6
LXD2
L1
HPXD11
F2 HPXD12
HPXD13
N1
F3 HPXD14
HPXD15
E2
F4 HPXD16
HPXD17
D1
G1 HPXD2
H4 HPXD3
H3 HPXD4
H2 HPXD5
K3 HPXD6
F1 HPXD7
G4 HPXD8
G2 HPXD9
D4
LCSN0 C3 HDDXD3
HDDXD4
E14 HDDXD5
H11 HDDXD6
E15 HDDXD7
H9
D14 HDDXD8
D15 HDDXD9
D2 HPCSN
HPINT
J4 HPRDN
H6
L2 HPWRN
J3 HPXA0
HPXA1
H1
J2 HPXD0
HPXD1
H5
HPXD10
E1
M2
HDDIOR
A15 HDDIOW
HDDRDY
C13 HDDRQ
C14
D12 HDDXA0
B14 HDDXA1
HDDXA2
A13
J9 HDDXD0
F15 HDDXD1
HDDXD10
G8
G10 HDDXD11
HDDXD12
G9 HDDXD13
F12 HDDXD14
E13 HDDXD15
D13
HDDXD2
F13
H10
N9
N14 GPA1_SDA
GPA2
L14
GPA3
N13
L13 GPA4
M15 GPA5
M14 GPA6
M13 GPA7
D9 GPA8
C10 GPA9 P7
GPD22
GPD23 N4
R5
GPD24
E11 HDDAK
HDDCSN0
A14
HDDCSN1
E12
B15
R7 H8 GND2
GND3
J7 J8 GND4
GND5
K6 K7 GND6
GND7
M3
N2 GND8
GND9
N3
GND_ADC
C12 B12 GND_PLL
B6 GND_UTC_1 B7 GND_UTC_2
GND_UTX
F7
GPA0_SCL
N15
N7 GPA10
GPA11
A4
K13 EINT0
EINT1
L12
EINT2
K14
L15 EINT3
A12
FILTER0 FILTER1 A11
P3
FRM0
M8
FRM1
GND1
H7
P1 GND10
GND11
P2 P6 GND12
R1 GND13 R2 GND14
GND15
R6
GND16
B10
CPD0 A7
C8
CPD1
A8
CPD2
CPD3 E8
B8
CPD4
C9
CPD5
B9
CPD6
CPD7 D8
CPWDN B11
CSN_CS0 R15
CSN_CS1 R14
D10
CVS
DAI N5
R4
DAO
DM
A5
DP
U403
TCC7820
AIN0
B13
AIN1
F10
P5
BCLK
E3 BPEN
CCK F9
CHS
TCC_2.7V_MISC
0R402
0.1uC407 0.1u
R427
NA
TCC_1.2V_CORE
C408
TP602
56KR408
TP400
0.1uC417
C403
TP401
R407 56K
0.1u
C411 0.1u
3CE
2GND 4
NC
VDD
1VOUT 5
0.1u
TCC_2.7V_MISC
R1114N271D-TR-F
U402
C413
1800pC419
TCC_UART_RXD
TCC_RTCK
TCC_TCK
TCC_TDO
TCC_RESET_JTAG_N
TCC_RESET_N
MM_LCD_RD_N
MM_LCD_ADS_N
MM_LCD_CS_N
DIB_ADDR[1]
DIB_PWR_EN
TCC_PWR_EN
PS_HOLD
TCC_UART_TXD
MCLK
TCC_NTRST
MM_LCD_VSYNC
TCC_PWR_EN
MM_LCD_DATA[15]
MM_LCD_WE_N
DIB_RDY
DIB_CS_N
EBI2_ADDR[2]
LCD_BYPASS_ENABLE
TCC_CS_N
DIB_DATA[3]
DIB_DATA[4]
DIB_DATA[5]
DIB_DATA[6]
DIB_DATA[7]
DIB_DATA[2]
DIB_DATA[0]
DIB_WE_N
DIB_OE_N
BCLK
DA_OUT
EBI2_OE_N
EBI2_WE_N
EBI2_ADDR[1]
LRCK
TCC_TDI
TCC_TMS
MSM_LCD_RESET_N
DIB_RESET_N
DIB_IRQ
DIB_ADDR[2]
TCC_INT
TCC_HOST_CS_N
DIB_DATA[1]
MSM_LCD_ADS_N
EBI2_DATA[0:15]
EBI2_DATA[15]
EBI2_DATA[14]
EBI2_DATA[13]
EBI2_DATA[12]
EBI2_DATA[11]
EBI2_DATA[10]
EBI2_DATA[9]
EBI2_DATA[8]
EBI2_DATA[7]
EBI2_DATA[6]
EBI2_DATA[5]
EBI2_DATA[4]
EBI2_DATA[3]
EBI2_DATA[2]
EBI2_DATA[1]
EBI2_DATA[0]
MM_LCD_DATA[14]
MM_LCD_DATA[13]
MM_LCD_DATA[12]
MM_LCD_DATA[11]
MM_LCD_DATA[10]
MM_LCD_DATA[9]
MM_LCD_DATA[8]
MM_LCD_DATA[7]
MM_LCD_DATA[5]
MM_LCD_DATA[4]
MM_LCD_DATA[3]
MM_LCD_DATA[2]
MM_LCD_DATA[1]
MM_LCD_DATA[0]
MM_LCD_DATA[6]
7. CIRCUIT DIAGRAM

- 167 -
VBAT
PWR
URXD
UTXD
3G2.5G
GND
RX
TX
UFLS
ON_SW
Size:
H
R&D CHK:R&D CHK:
4
Time Changed:
9
Drawing Number:
A
1
E
5
TITLE:
DOC CTRL CHK:
7
TITLE:
4
QA CHK:
F
A
5
KU950 MAIN 1.1
DD
MFG ENGR CHK:
9
MEMORY (1Gbit 90n NAND FLASH + 512Mbit SDRAM)
C
4
F
C
3
Drawn by:
10
G G
3
PCB ARRAY TP
10
12
8 11 12
Drawn by:
A
B
2 5
MOBILE HANDSET R&D CENTER
DEVELOPMENT LAB 4 DEVELOPMENT GROUP 1
7
Time Changed:
1
D
LG ELECTRONICS INC.
7
2
JH Park
12
B
JTAG CONNECTOR
4
DOC CTRL CHK:
C
Size:
1
6
9
2
C
Page:
REV:
7
Date Changed:
3
9
6
USIM
E E
105
10
6
11
E
G
B
Date Changed:Changed by:
MFG ENGR CHK:
1
2
Page:
QA CHK:
3
11
JH Park
H
8
F
8
1608
REV:
Engineer:
12
5/9
A2
JH Park 11:29:00 am
A2
11
B
G
H
Changed by:
D
8
F
H
A
Drawing Number:
Engineer:
6
0.01u
2006, Sep 08
TP511
C512
TP508
VREG_USIM_2.85V
TP512
VREG_MSMP_2.7V
C509 0.1u
0.1u
C502
R504 NA
0.1u
D6
_WED
K6
_WEN
_WP L6
C508
VSS10 U6
VSS11 U10
U13
VSS12
F7
VSS2 G2
VSS3 G13
VSS4 L13
VSS5 P2
VSS6
VSS7 P13
R8
VSS8
VSS9 U2
E6
_CAS
_CE M9
_CS E5
D5
_RAS
M10
_RE
N10
NC95 NC96 N11
N12
NC97 NC98 N13 NC99 P7
M2
RY__BY
C7
VCCD1
VCCD2 D2
VCCD3 D13
V3
VCCD4
VCCD5 V8
VCCD6 V12
K12
VCCN2
VCCQD1 V4
V9
VCCQD2
C6
VSS1
NC80 L3
L4
NC81
NC82 L5
NC83 L9
NC84 L11
L14
NC85 M5
NC86
NC87 M6
M12
NC88 N2
NC89
B1 NC9
NC90 N3
N4
NC91 NC92 N5
N6
NC93 NC94 N9
J11 NC66 J13 NC67
NC68
K1 K2 NC69
A13 NC7
NC70
K3
K4
NC71
NC72 K5
K9
NC73 K10
NC74
NC75 K11
NC76 K13
K14
NC77
NC78 L1
L2
NC79
A14 NC8
G11 NC51
NC52
H2 H3 NC53
NC54
H4 H5 NC55
NC56
H6 H9 NC57
H11 NC58
NC59
H13
NC6
A12
NC60
J2 J3 NC61
NC62
J4 J5 NC63
NC64
J6
NC65
J10
NC37
F8 F9 NC38
NC39
F10
A4 NC4
F11 NC40
NC41
F12 F13 NC42
G3 NC43 G4 NC44 G5 NC45
NC46
G6 G7 NC47
NC48
G8 G9 NC49
A11 NC5
NC50
G10
D1 NC22
NC23
D14
E1 NC24
E7 NC25
NC26
E8
E9 NC27
NC28
E10
E11 NC29
NC3
A3
NC30
E12 E13 NC31
NC32
F2 F3 NC33
NC34
F4 F5 NC35
NC36
F6
W11
NC127 NC128 W12
W13
NC129
B11 NC13
NC130 W14
NC131 J12
D7
NC132
B12 NC14
NC15
B13
B14 NC16
NC17
C1
C2 NC18
C5 NC19
A2 NC2
C13 NC20
C14 NC21
NC112 V2
V13
NC113 NC114 V14
Y1
NC115 NC116 Y2
Y3
NC117 Y4 NC118 Y11 NC119
B4 NC12
NC120 Y12
Y13
NC121 NC122 Y14
W1
NC123 NC124 W2
W3
NC125 NC126 W4
IO8
G12
A1 NC1
B2 NC10
P8
NC100 R2 NC101 NC102 R7
R9
NC103 T2 NC104 NC105 T3 NC106 T7 NC107 T13
U1
NC108 U3 NC109
B3 NC11
NC110 U14
V1
NC111
DQ5
T6
V6 DQ6
U7 DQ7
DQ8
T9
T10 DQ9
U8 DQM0
DQM1
T8
V7 DQM2
U9 DQM3
M11 IO1
M13 IO2
L10 IO3
L12 IO4
J9 IO5
H12 IO6
H10 IO7
R4 DQ19
DQ2
T5
P5 DQ20
DQ21
R5
DQ22
P6
R6 DQ23
P9 DQ24
P10 DQ25
DQ26
R10
DQ27
P11
DQ28
R11
P12 DQ29
V5 DQ3
DQ30
R12
R13 DQ31
DQ4
U5
C4
BA0 D4
BA1
D8
CKE
M4
CLE
C8
CLK
DQ0
U4
DQ1
T4
DQ10
V10
T11 DQ11
DQ12
U11
V11 DQ13
DQ14
T12
U12 DQ15
DQ16
P3
DQ17
R3
DQ18
P4
C3
A0 D3
A1
E4
A10 D9
A11
A12 C9
E3
A2 E2
A3 D12
A4 C12
A5 D11
A6 C11
A7 D10
A8 C10
A9
M3
ALE
TY9000A800EOGG
U500
C506
R506
51K
12p
0.1u
VREG_MSMP_2.7V
C503
R505
NA
12p
C504
TP503
4.7KR500
OJ504
USB_VBUS
TP509
OJ501
0.1u 0.1uC511
TP506
C510
TP510
100K
R501
9
ON_SW
5
RTS
11
2RX
TX
3
6VBAT
TP513
UART5
12 CTS
10 DSR
GND
1
4NC1
NC2
7
8NC3
NC4
PLR0504F
1
2
34
5
6
1
2
34
5
6
D501
D500
PLR0504F
TP604
TP603
20
3
4
5
6
7
8
9
G1
G2
TP605
CN500
1
10 11
12
13
14
15
16
17
18
192
L500
56nH
OJ500 OJ502
TP505
C505 0.1u
NA
C501
NA
C500
VREG_MSMP_2.7V
TP515
10K
R503
TP500
TP507
OJ503
TP502
TP501
TP514
C513
0.1u
VREG_USIM_2.85V
0.1uC507
R502
100K
VREG_MSME_1.8V
3CLK
4
GND
I_O 6
RST
2VCC
1
VPP 5
TP504
J500
USIM_P_RST_N
USIM_P_CLK
TCC_NTRST
TCC_TDI
TCC_TMS
TCC_TCK
TCC_RTCK
TCC_TDO
TCC_RESET_JTAG_N
UART_TXD
UART_RXD
PM_ON_SW_N
JTAG_TRST_N
JTAG_TDI
JTAG_TMS
JTAG_TCK
JTAG_RTCK
JTAG_TDO
RESET_IN_N
JTAG_PS_HOLD
SDRAM_DATA[21]
SDRAM_DATA[0:31]
SDRAM_ADDR[1]
SDRAM_ADDR[2]
SDRAM_ADDR[4]
SDRAM_ADDR[3]
SDRAM_ADDR[9]
SDRAM_ADDR[5]
SDRAM_ADDR[8]
SDRAM_ADDR[7]
SDRAM_ADDR[6]
SDRAM_ADDR[10]
SDRAM_ADDR[11]
SDRAM_ADDR[12]
SDRAM_ADDR[0]
SDRAM_ADDR[0:12]
SDRAM_ADDR[14]
SDRAM_ADDR[13]
SDRAM_CLK_EN
NAND_CLE
NAND_ALE
EBI2_WE_N
SDRAM_CAS_N
SDRAM_RAS_N
SDRAM_CLK
SDRAM_WE_N
SDRAM_CS_N
NAND_CS_N
NAND_READY
EBI2_OE_N
RESOUT_N
SDRAM_CS_N
EBI2_DATA[7]
SDRAM_DATA[1]
SDRAM_DATA[0]
SDRAM_DATA[6]
SDRAM_DATA[2]
SDRAM_DATA[8]
SDRAM_DATA[7]
SDRAM_DATA[3]
SDRAM_DATA[12]
SDRAM_DATA[10]
SDRAM_DATA[9]
SDRAM_DATA[5]
SDRAM_DATA[4]
SDRAM_DATA[13]
SDRAM_DATA[11]
SDRAM_DATA[15]
SDRAM_DATA[14]
SDRAM_DATA[24]
SDRAM_DATA[25]
SDRAM_DATA[28]
SDRAM_DATA[26]
SDRAM_DATA[27]
SDRAM_DATA[29]
SDRAM_DATA[30]
SDRAM_DATA[31]
SDRAM_DATA[16]
SDRAM_DATA[17]
SDRAM_DATA[22]
SDRAM_DATA[18]
SDRAM_DATA[19]
SDRAM_DATA[23]
SDRAM_DATA[20]
USIM_P_RST_N
USIM_P_DATA USIM_P_CLK
RMT_ADC/USB_D- RMT_INT/USB_D+
USB_VBUS
USB_D-
USB_D+
PM_ON_SW_N
UART_RXD
UART_TXD
VBATT
USIM_P_DATA
SDRAM_DQM[0]
SDRAM_DQM[1]
SDRAM_DQM[2]
SDRAM_DQM[3]
EBI2_DATA[0:7] EBI2_DATA[0]
EBI2_DATA[1]
EBI2_DATA[2]
EBI2_DATA[3]
EBI2_DATA[4]
EBI2_DATA[5]
EBI2_DATA[6]
7. CIRCUIT DIAGRAM

- 168 -
H
Drawing Number:
85
E
Engineer:
QA CHK:
8
D
F
Engineer:
G
12
F
8
7
Size:
1608
B
PMIC
9
Tantal 2125
4
KU950 Main 1.1
MMI 18Pin CONNECTOR
Headset Hook Switch
3
Date Changed:
113
1
7
JH Park
JH Park
1608
B
2
Page:
10
C
D
5
9
E
MFG ENGR CHK:
105
B
11
TITLE:
5
MFG ENGR CHK:
Page:
Size:
D
3
2012
1608
10
R&D CHK:
Drawn by:
A
12
12
DOC CTRL CHK:
D
2
R&D CHK:
H
4
C
Drawing Number:REV:
E
H
G
2
6
6
A
G
E
11
F
12
Time Changed:
1608
REV:
1
A
QA CHK:
2 9
Changed by:
(1%)
8
Time Changed:
1608
DOC CTRL CHK:
1
A
CHARGING
H
6
C
9
MOBILE HANDSET R&D CENTER
DEVELOPMENT LAB 4 DEVELOPMENT GROUP 1
1608
7
G
4
Changed by:
F
C
1608
B
106
Date Changed:
LG ELECTRONICS INC.
11
1608
7
1608
2006, Sep 08
6/9
A2
JH Park 11:41:00 am
A2
Drawn by:
TITLE:
34
1608
1
0.1u
2.2u
C612
EVLC14S02050VA603
C625
0.1uC604
10u
C632
R609
47K
C635
0.01u
FL600
G1
34
G2
1IN 2
OUT
0.1uC614
NFM21PC105B1A3
4.7uC605
R602
680K
121KR605
D603SD12-TCT
COM3
COM4 12
GND
6
2IN1_IN2
10
IN3_IN4
1NC1
NC2
5
NC3 9
13
NC4
15
NO1
3NO2
NO3
7
NO4 11
17 PGND
V+ 14
U602 MAX4701ETE+T
16
COM1
COM2
4
8
47pC638
10p
C610
+3.0V_AUDIO
C633
2.2u
12
R610 10K
32.768KHz
X600
EVLC18S02003
VA601
VREG_MSMP_2.7V
VREG_USIM_2.85V
1000pC629
R614 2.2K
4.7uC619
INSTPAR
PSD05-LFD600
VREG_RFTX_2.85V
100KR618
4.7u
C634
10p
C621
47p
C637
EVLC14S02050VA606
VA605
EVLC14S02050VA602 EVLC14S02050
VBATT
VREG_MSMA_2.6V
R616
0
1M
R621
PRSB6.8C VA608
EVLC18S02003
VA600
0
C617 0.1u
R615
C615 1u
VREG_BT_2.85V
9PON_RESET_N
R623 0
79
SPKR_OUT_M
8FLSH_DRV_N
REF_OUT(MPP8) 80
81
VREG_SYNT
82
AMUX_OUT
83
VDD_MAIN
84
VREG_TCXO
85
GND_SLUG
71
VDD_RF
72
AMUX_IN2(MPP2)
73
VREG_RFTX
SPKR_BYP 74
SPKR_OUT_P 75
76
SPKR_IN_P
77
VDD_SPKR
78
SPKR_IN_M
64
VREG_WLAN
65
VDD_WLAN
66
CBL1PWR_N(MPP4)
67
VREG_RFRX2
68
CBL0PWR_N(MPP3)
VREG_RFRX1 69
7BAT_FET_N
70
AMUX_IN1(MPP1)
57
PS_HOLD
58
TCXO_IN
59
MSM_INT_N
6VBAT
60
VCOIN
REF_ISET 61
62
REF_GND
63
REF_BYP
5ISNS_M
50
VREG_MSMP
51
SBST
52
VDD_MSM
53
TCXO_OUT
VDD_ANA 54
55
TCXO_EN
56
VREG_MSMA
42 VREG_RUIM
43
RUIM_RST(MPP6)
44
XTAL_IN
45
SLEEP_CLK
XTAL_OUT 46
47
SBDT
48
VBACKUP
49
SBCK
35 VDD_MSME 36 VREG_MSME 37 VSW_MSME 38 RUIM_CLK(MPP10)
VREG_MMC
39
4CHG_CTL_N
40 RUIM_M_RST(MPP5) 41 VDD_RUIM 28 VREG_PA 29 VDD_PA
3ISNS_P
30 RUIM_M_IO(MPP11)
VSW_MSMC
31 32 VREG_MSMC 33 VDD_MSMC 34 RUIM_M_CLK(MPP9)
20 USB_D_M
21 GP1_DRV_N(MPP7)
22 LCD_DRV_N 23 KPD_DRV_N
KPDPWR_N
24 25 VIB_DRV_N 26 RUIM_IO(MPP12) 27 VSW_PA
13 USB_OE_N
14 VSW_5V
15 USB_CTL_N
16 USB_VBUS
17 USB_DAT
18 USB_D_P
USB_SE0
19
2VCHG
PM6650-1M
U600
1ADC_BYP
10 VREG_USB
USB_ID
11
12 VREG_5V
2.2u
1u
C611
C616
C631
NA
C600
0.01u
2.2u
C624
VREG_RFRX_1_2.85V
C904
D1 D2 D3 D4
G
S
22p
Q602
SI3493DV-E3
PRSB6.8C VA607
312
564
+5V_PWR
QST4
Q601
R600
470K
33u
33p
C601
VBATT
C639
VREG_MSMC_1.375V
VREG_MSMP_2.7V
R624 100K
0.1u
C607
+VPWR
+VPWR
2.2u
VREG_MSMP_2.7V
C609
+VPWR
R601
80.6K
C627 4.7u
20
21
22
3
4
5
6
7
8
9
1
10
11
12
13
14
15
16
17
18
19
2
C603 0.1u
CN601
10K
R622
TP600
VREG_RFRX_0_2.85V
VREG_SYNTH_2.85V
C622
1u
R613
0
C626 2.2u
10KR606
0R625
R608
0
1u
C636
C628 4.7u
2
564
USB_VBUS
Q600
QST4
31
R611 0.1
L602 4.7uH
0.1u
C613
0R627
0R626
51
1
2
3
4
5
R607
47nH
CN600
VREG_MMC_3.0V
L600
VREG_MSME_1.8V
D602
RB521S-30
C606 4.7u
L601 4.7uH
C602 0.1u
R619
NA
+VPWR
C608 1u
VREG_TCXO_2.85V
R612
0
C620 4.7u
C623
18p
VREG_MSMP_2.7V
C618 1u
R630
2
GND
1
OUT
VCC
5
3
VIN+
VIN-
4
NA
U601
LMV7291MGX-NOPB
470K
TP601
0R603
R604
EVLC14S02050
+5V_PWR
VA604
200K R620
1000pC630
NAR629
RB521S-30
D601
REMOTE_PWR_ON
VBATT
EAR_SENSE_N
MIDI_EAR_R
MIDI_EAR_L
EAR_MIC_P
RMT_INT_MSM
VBATT
+VPWR
USB_VBUS
UART_RXD
USB_CNT_N
USB_CNT_N
CHG_CNT_N
ICHARGE
ICHARGEOUT
BATT_FET_N
MICBIAS
REMOTE_PWR_ON
HOOK_SENSE_H
EAR_MIC_P_MSM
RMT_ADC/USB_D-
RMT_INT/USB_D+
USB_VBUS
+5V_PWR
USB_DAT
USB_OE_N
RESET_IN_N
BATT_FET_N
ICHARGEOUT
CHG_CNT_N
ICHARGE
PM_SBDT
VBAT_SENSE
EAR_SENSE_N
USB_D-
RMT_ADC/USB_D-
RMT_ADC_MSMEAR_MIC_P
EAR_MIC_P_MSM
RMT_INT/USB_D+
USB_D+
VBAT_TEMP
TCC_UART_RXD
TCC_UART_TXD
UART_TXD
PS_HOLD
AMUX_OUT
PA_THERM
V_BACK_UP
PM_SBCK
GSM_PA_PWR_CTL_REF
PM_INT_N
TCXO_PM
JTAG_PS_HOLD
TCXO_EN
PM_SBST
BUFF_TCXO
SLEEP_CLK
USIM_P_RST_N
USIM_RST_N
USIM_P_CLK
USIM_CLK
USIM_DATA
USIM_P_DATA
MOTOR_PWR-
PM_ON_SW_N
KYPD_LED_EN
USB_D-
USB_SE0
USB_D+
7. Circuit Diagram

- 169 -
DVB-H AUDIO CODEC
1608
MFG ENGR CHK:
D
MOBILE HANDSET R&D CENTER
DEVELOPMENT LAB 4 DEVELOPMENT GROUP 1
REV:
KU950 Main 1.1
MFG ENGR CHK:
DOC CTRL CHK:
Time Changed:Date Changed:
1608
114
HEADPHONE AMP
C
Changed by:
D
2
QA CHK:
I2C I/F From MSM
F
R&D CHK:
Page:
A
AUDIO CODEC LDO
A
1
G
125
C
11 12
Drawing Number:
3
SPEAKER AMP(MONO)
H
1
Drawn by:
2 6
C
2012
B
10
E
H
E E
A
5 8
2
A
Changed by:
1
6
1608
1
1608
1110
2012
5
89
9
TITLE:
6
C
4
4
B
TITLE:
G
2 7
2012
1608
Engineer:
H
F
Size:
75
Page:
LG ELECTRONICS INC.
3
R&D CHK:
6
JH Park
9
1608
G
D
108
11
D
2012
Date Changed:
12
A2
F
REV:
7
4
DOC CTRL CHK:
E
change 2005.12.28
Engineer:
H
Time Changed:
83
G
JH Park
10
Drawing Number:
B
Drawn by:
Size:
B
QA CHK:
7
93 12
F
2006, Sep 08
7/9
A2
JH Park 12:11:00 pm
R704 NA
C729
C711
22p
0.01u
C717
0.1u
C716
22p
0
R709
OUT3
PGND
33
27 RINPUT1
25 RINPUT2
23 RINPUT3
ROUT1 12
ROUT2 15
SCLK 32
31
SDIN
21
VMID
VREF 20
DACDAT
DACLRC
7
3
DBVDD DCVDD 2
DGND
4
14 HPGND
HPVDD 17
LINPUT1
28
LINPUT2
26
LINPUT3
24
13
LOUT1
16
LOUT2
1MCLK
MICBIAS 22
29
MODE
MONOOUT 10
11
U701
WM8973LEFL
8ADCDAT
ADCLRC
9
19 AGND
18
AVDD
BCLK
5
CSB 306
C710 1u
10u
C707
+VPWR
C732 1u
C718
1u
+3.0V_AUDIO
+3.0V_AUDIO
FB701
FB703
C702
0.1u
0.1uC722
C735
NA
NAC731
R703
NA
1uC709
NA
C721
1uC719
C714
NA
R713 33K
C720 NA
ICVL0505101V150FR
C700
10u
VA700
0.1u
C701
10u
1u C730
C705
100K
R714
R926 0
C708
+3.0V_AUDIO
0.1u
C734
NA
C723 0.1u R711 3.9K
1uR701
0
R712
FB702
NA
R702
FB704
R705 10K
C715
4.7u
C724
0.33u
C727
C713
1u
C704
NA
VREG_MMC_3.0V
0.1u
3.9KR710
VA701
ICVL0505101V150FR
TP607
10uC703
22p
C725
B2
SD_MODESD_SEL
C2
VDD
B1
VO1 A3
VO2 C3
R700 1u
LM4898ITLX-NOPBU702
BYPASS A2
GND B3
A1 IN+
C1 IN-
C733
NA
FB700
0.1uC706
10K
C726
R706
P_G 17
6SGND
13
SVDD1
9
SVDD2
11
SVSS
16
_SHDN
22p
U703
MAX9722BETE
C1N
4
2C1P
INL+ 15
INL_ 147 INR+
INR_
8
OUTL 12
OUTR 103 PGND
PVDD
1
5PVSS
R1114N301D-TR-F
U700
3CE
2GND 4
NC
VDD
1VOUT 5
0
R707
C712
2.2u
VREG_MMC_3.0V
22p
C728
33KR708 HP_AMP_EN
MIDI_EAR_L
MIDI_EAR_R
BCLK
LRCK
I2C_SCL
I2C_SDA
SPK_R
SPK_L
TCXO_EN
+VPWR
EAR_LOPT_L
OPT_R
PS_HOLD
MCLK
SPK_R
SPK_L
SPK_AMP_EN
EAR_R
DA_OUT
HEADSET_R
HEADSET_L
SPEAKER+
SPEAKER-
EAR_L
EAR_R
7. Circuit Diagram

- 170 -
Date Changed:
Drawn by:
LG ELECTRONICS INC.
TITLE:
A
DEVELOPMENT LAB 4 DEVELOPMENT GROUP 1
Size:
7
C
LCD BL/FLASH LED/CAMERA LDOs
3
7
F
A
6
B
R&D CHK:
REV:
A
F
34
11
C
1
D
1
2
10
C
7
D
A
3
From TCC7820 to LCD
1110
Changed by:
3
F
5
C
5
TITLE:
G
DOC CTRL CHK:
2
QA CHK:
11
D
MFG ENGR CHK:
E
B
KU950 Main 1.1
10
Engineer:
8
7
Remove Two R 2005.11.24
G
Page:
MOBILE HANDSET R&D CENTER
B
F
QA CHK:
5
4
G
Remove MLED4 2005.11.24
8
R&D CHK:
8
6
E
Changed by:
126
12
Size:
9
E
B
Drawing Number:
D
H
5 12
12
1.3M CAMERA CONNECTOR
10
Time Changed:
9
Engineer:
VGA CAMERA
EUSY0263101
A2
Date Changed:
I2C SWITCH
JH Park
4 6
H
4
Drawing Number:
2
Drawn by:
H
Time Changed:
H
21
E
SFEY0007103
9
VGA CAMERA CONNECTOR
1
G
11
9
REV:
DOC CTRL CHK:
MFG ENGR CHK:
JH Park
8
2006, Sep 08
8/9
A2
12:25:00 pmJH Park
IN3
3
4IN4
9
OUT1
OUT2 8
7
OUT3
OUT4 6
FL800
NFA21SL207X1A45L
G1
5
G2
10
IN1
1
2IN2
21
22
23
24
25
26
3
4
5
6
7
8
9
CN802
1
10
11
12
13 14
15
16
17
18
19
2
20
20
3
4
5
6
7
8
9
CN800
1
10 11
12
13
14
15
16
17
18
192
VCAM_2.8V
VCAM_2.8V
R811 0
VREG_MSMP_2.7V C810
10u
G1
5
G2
10
INOUT_A1
1
2INOUT_A2
INOUT_A3
3
4INOUT_A4
9
INOUT_B1
INOUT_B2 8
7
INOUT_B3
INOUT_B4 6
10
INOUT_A1
1
2INOUT_A2
INOUT_A3
3
4INOUT_A4
9
INOUT_B1
INOUT_B2 8
7
INOUT_B3
INOUT_B4 6
FL805
ICVE21184E150R500FR
8
INOUT_B2
INOUT_B3 7
6
INOUT_B4
FL803
ICVE21184E150R500FR
G1
5
G2
ICVE21184E150R500FR
FL802
5G1
10 G2
1INOUT_A1
INOUT_A2
2
3INOUT_A3
INOUT_A4
4
INOUT_B1 9
4
5
LDO2
16
M1
M2 15
M3 14
13
M4
OUT 25
28 P1
P2
17
24 PGND
1PIN
6REFBP
7SETF
8SETM
BGND
29
22
C1N
C1P 23
C2N 27
26
C2P
ENF
21
18 ENLDO
20 ENM1
ENM2
19
F1 12
11
F2 10
F3 9
F4
GND
3
IN
2
LDO1
MAX8631XETIU802
0.1u
C800
INOUT_B2 7
INOUT_B3
INOUT_B4 6
TCC_2.7V_EHI_LCD
ICVE21184E150R500FR
G1
5
G2
10
INOUT_A1
1
2INOUT_A2
INOUT_A3
3
4INOUT_A4
9
INOUT_B1 8
0.1u
FL801
C803
0.1uC805
R826 15K
56nHL800
D800
+VPWR
VCAM_1.8V
RB521S-30
+VPWR
VCAM_1.8V
C804 4.7u
40
41
42
43
44
45
4647
4849
5
6
7
8
9
26
27
28
29
3
30
31
32
33
34
35
36
37
38
39
4
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
25
2B1 4
72S
GND
5VCC 10
CN801
1
10
FSA2267L10X
U800
1A
91
1B0 2
1B1
81S
62A
2B0 3
C905
1u
10u
C812
1u
C820
VA801
EVLC18S02015
TP606
0
R812
R824 100K
100KR823
FB803
R927
NA
D907
PG05DBTFC
PG05DBTFC
D906
20p
C801
FB801
51R801
R800 51 FB800
D905
PG05DBTFC
PG05DBTFC
D904
VCAM_2.8V
EVLC18S02015
VA800
C802
20p
ICVE21184E150R500FR
FL804
5G1
10 G2
1INOUT_A1
INOUT_A2
2
3INOUT_A3
INOUT_A4
4
INOUT_B1 9
8
INOUT_B2
INOUT_B3 7
6
INOUT_B4
1u
FB802
C809
R822 100K
C819
0.01u
6.8KR825
1u
C811
SPEAKER+
SPEAKER-
FLASH_BL_CPO
VGA_I2C_SCL
VGA_I2C_SDA
VGA_I2C_EN
I2C_SCL
I2C_SDA
FILTER_CAM_HSYNC
FILTER_CAM_SYSCLK
M_CAM_RESET_N
MC_IO_OFF
R802
NA
LCD_BL_CTRL
FLASH_LED_CTRL
CAM_DUAL_LDO_EN
FLED
MM_LCD_CS_N
MM_LCD_ADS_N
MM_LCD_WE_N
MSM_LCD_RESET_N
FILTER_MM_LCD_DATA[12]
FILTER_MM_LCD_DATA[13]
FILTER_MM_LCD_DATA[14]
FILTER_MM_LCD_DATA[15]
FILTER_MM_LCD_DATA[8]
FILTER_MM_LCD_DATA[9]
FILTER_MM_LCD_DATA[10]
FILTER_MM_LCD_DATA[11]
FILTER_MM_LCD_DATA[4]
FILTER_MM_LCD_DATA[5]
FILTER_MM_LCD_DATA[6]
FILTER_MM_LCD_DATA[7]
FILTER_MM_LCD_DATA[0]
FILTER_MM_LCD_DATA[1]
FILTER_MM_LCD_DATA[2]
FILTER_MM_LCD_DATA[3]
FILTER_MM_LCD_CS_N
FILTER_MM_LCD_ADS_N
FILTER_MM_LCD_WE_N
FILTER_MSM_LCD_RESET_N
MOTOR_PWR-
FILTER_MM_LCD_CS_N
FILTER_MM_LCD_ADS_N
MM_LCD_RD_N
FILTER_MM_LCD_WE_N
FILTER_MM_LCD_DATA[0]
FILTER_MM_LCD_DATA[1]
FILTER_MM_LCD_DATA[2]
FILTER_MM_LCD_DATA[3]
FILTER_MM_LCD_DATA[4]
FILTER_MM_LCD_DATA[5]
FILTER_MM_LCD_DATA[6]
FILTER_MM_LCD_DATA[7]
FILTER_MM_LCD_DATA[10]
FILTER_MM_LCD_DATA[11]
FILTER_MM_LCD_DATA[9]
FILTER_MM_LCD_DATA[8]
FILTER_MM_LCD_DATA[12]
FILTER_MM_LCD_DATA[13]
FILTER_MM_LCD_DATA[14]
FILTER_MM_LCD_DATA[15]
MAIN_LED0
MAIN_LED1
MAIN_LED2
MAIN_LED3
RECEIVER-
RECEIVER+
FILTER_MSM_LCD_RESET_N
LCD_IF_MODE_1
MAIN_LED3
MAIN_LED2
MAIN_LED1
MAIN_LED0
CAM_DATA[2]
CAM_DATA[3]
CAM_DATA[4]
VC_IO_OFF
CAM_PCLK
I2C_SCL
CAM_HSYNC
CAM_SYSCLK
FILTER_CAM_PCLK
FILTER_I2C_SCL
FILTER_CAM_HSYNC
FILTER_CAM_SYSCLK
MM_LCD_DATA[1]
MM_LCD_DATA[2]
MM_LCD_DATA[3]
MM_LCD_DATA[0]
MM_LCD_DATA[7]
MM_LCD_DATA[6]
MM_LCD_DATA[5]
MM_LCD_DATA[4]
MM_LCD_DATA[11]
MM_LCD_DATA[10]
MM_LCD_DATA[9]
MM_LCD_DATA[8]
MM_LCD_DATA[15]
MM_LCD_DATA[14]
MM_LCD_DATA[13]
MM_LCD_DATA[12]
WLED_PWR
LCD_IF_MODE_0
MM_LCD_VSYNC
WLED_PWR
CAM_DATA[7]
CAM_DATA[6]
CAM_DATA[5]
CAM_DATA[4]
CAM_DATA[3]
CAM_DATA[2]
CAM_DATA[1]
FILTER_CAM_PCLK
CAM_DATA[0]
FLED
FLASH_BL_CPO
I2C_SDA
FILTER_I2C_SCL
CAM_VSYNC
CAM_DATA[5] CAM_DATA[6]
CAM_DATA[7]
CAM_VSYNC
FILTER_CAM_HSYNC
VGA_I2C_SDA
VGA_I2C_SCL
V_CAM_RESET_N
FILTER_CAM_SYSCLK
FILTER_CAM_PCLK
CAM_DATA[0]
CAM_DATA[1]
7. CIRCUIT DIAGRAM

- 171 -
R&D CHK:
B
TITLE:
E
C
R&D CHK:
8
1
QA CHK:
11
4
8
5
KU950 Main 1.1
H
Size:
Changed by: Date Changed:
5
Engineer:
F
8
LG ELECTRONICS INC.
SWIVEL_DETECT
6
G
KEY MATRIX
10
REV:
G
A
G
A
F
A
3
DOC CTRL CHK:
7 9 12
6
D
TITLE:
Time Changed:
JH Park
C
(JAVA)
H
D
MOBILE HANDSET R&D CENTER
E
DOC CTRL CHK:
F
Date Changed:Changed by:
2
47*
25
DEVELOPMENT LAB 4 DEVELOPMENT GROUP 1
2
MAIN - KEY B to B Conn.
H
12
1 7
H
Drawn by:
3
E
D
6
REV:
1
10
KEY BACKLIGHT LEDs
E
31
SIDE_VOLUME_UP_KEY
SIDE_VOLUME_DOWN_KEY
G
8
MFG ENGR CHK:
103
52
7
Time Changed:
12
C
6
Drawn by:
9#
A
B
Size:
41
F
4
11
QA CHK:
5
SIDE_CAMERA_HOT_KEY
JH Park
Drawing Number:
(MENU)
43
A2
12:37:00 pmJH Park
A2
7
Engineer:
D
11
(VT CALL)
10
11
9
9
C
Drawing Number:
6
8
0
9
B
122
MFG ENGR CHK:
B
VREG_MMC_3.0V
2006, Sep 08
Page:9/9
VA908
EVL14K02200
906
VREG_MSMP_2.7V
907
902
68R916
51KR902
47K
R925
100ohmR906
R914 68
905
SSC-TWH104-HLS
LD904
100ohmR905
st
EVLC14S02050VA907
VREG_MSMP_2.7V
68R918
100ohmR903
10p
C903
68
EVLC14S02050VA904
R911
51KR901
+VPWR
+VPWR
VA906 EVLC14S02050 VA901 EVLC14S02050
PG05DBTFCD900
EVLC14S02050VA900
sh
LD910
SSC-TWH104-HLS
EVLC14S02050VA905
901
LD905
SSC-TWH104-HLS SSC-TWH104-HLS
LD900 LD901
SSC-TWH104-HLS
908
R910 68
900
HOT901
VREG_BT_2.85V
D902 PG05DBTFC D901 PG05DBTFC
LD902
SSC-TWH104-HLS
R904 100ohm
R917 68
R919 68
R912 68
EVLC14S02050VA902
U901
A3212EELLT-T
G1
G2OUT
VDD
LD906
SSC-TWH104-HLS SSC-TWH104-HLS
LD907
CN900
1
2
3
4
5
SIDEKEY KEYPAD
904
51KR900
HOT900
R923
HOT902
62
PG05DBTFCD903
VA903 EVLC14S02050
LD908
SSC-TWH104-HLS
68R915
909
R920 68
38
39
22
40
23
24
25
26
27
28
29
903
3
4
5
6
7
8
9
21
30
31
32
33
34
35
36
37
1
10
11
12
13
14
15
16
17
18
19
2
20
VREG_MSMP_2.7V
CN901
0.1u
C902
SSC-TWH104-HLS
LD909
PM_ON_SW_N
BT_DATA
BT_TX_RX_N
BT_SBDT
BT_SBCK
BT_SBST
BT_CLK
TCXO_BT
MMC_DATA
MMC_CMD
MMC_CD
MMC_CLK
MIC1P
MIC1N
MICBIAS
KYPD_LED_EN
KEY_COL[3]
KEY_COL[2]
KEY_COL[1]
KEY_COL[0]
V_BACK_UP
SWIVEL_DETECT
KEY_COL[4]
KYPD_LED_EN
KEY_COL[3]
KEY_ROW[2]
KEY_ROW[1]
KEY_ROW[0]
KEY_COL[4]
KEY_COL[3]
KEY_COL[2]
KEY_COL[1]
KEY_COL[0]
KEY_ROW[0]
KEY_COL[0]
KEY_COL[4]
KEY_COL[1]
KEY_COL[2]
KEY_ROW[1]
KEY_ROW[2]
KEY_ROW[0]
KEY_COL[5]
KEY_ROW[1]
KEY_ROW[2]
KEY_ROW[4]
KEY_ROW[3]
7. CIRCUIT DIAGRAM

- 172 -
8
H
3
A
B
11 128
B
Engineer:
Drawn by:
R&D CHK:
QA CHK:
D
C
BACK_UP BATTERY
10
E
PAGE1
Drawn by:
Micro SD
H
A
G
67
F
TITLE:
4
Time Changed:Date Changed:
8
4
H
G
D
4910 11
Engineer:
11
4
TITLE:
F
56
DOWN
UP
RIGHT
3
LG ELECTRONICS INC.
D
E
56 78
9
Size:R&D CHK:
12
Size:
101
Changed by:
5
G
12
C
Drawing Number:
2 9
3
A
E
B
Date Changed: Time Changed:
1
ON_SW
MFG ENGR CHK:
MIC
KEY PCB BACKLIGHT LEDs
3
JH Park
JH Park
B
REV:
H
MFG ENGR CHK:
BLUETOOTH
LG INNOTEK
112
F
G
A2
Changed by:
56 7
E
Drawing Number:
2
REV:
7
MOBILE HANDSET R&D CENTER
DEVELOPMENT LAB 4 DEVELOPMENT GROUP 1
TACT SWITCH
LEFT
12
12 101
SELECT
C
D
C
A
KU950 KEY 1.1
9
QA CHK:
DOC CTRL CHK:
F
DOC CTRL CHK:
2006, Aug 10
A2
JH Park 2:37:00 pm
R102 100K
NA
C106
ANT
CLK_REF 9
GND1
1 7GND2
GND3
15
2LDO1
LDO2
3
13 NC 8
RX_BB_TX_BB
10
SBCK
SBDT 11
6
SBST
SYNC_DET_TX_EN 5
12
VDD_MSM
14
VDD_REG
XTAL_IN 4
LBDA254FJ0
M100
16
0.01u
C115
1u
C113
33p
C114
1000pC112
BAT100
100KR103
C105
4
5
6
22n
PLR0504F
1
2
3
VA100
EVLC18S02015
D100
R104 100K
EVLC14S02050
SND
VA108
ANT100
FEED
GND1
GND2
+VPWR
ACS2450ICAU92
NA
R118
C109
NA
0
R120
47p
C103
EVLC14S02050VA104
VREG_MMC_3.0V
VREG_MSMP_2.7V
R107 68
SSC-TWH104-HLS
LD101
1000p
R100
51K
VREG_BT_2.85V
C111
EVL14K02200
VA101
R108 68
680R115
R114 680
VREG_BT_2.85V
C116
0.01u 1u 33p
C117 C118
LD103
SSC-TWH104-HLS
VA106 EVLC14S02050
END
10p
R106
C108
VA105 EVLC14S02050
68
HOT100
470K
R109
R117
0
R116
NA
C120
1u
C102
10u
47K
R122R121
47K
SSC-TWH104-HLS
LD102
VREG_MMC_3.0V
VA103 EVLC14S02050
33p
22nC104
+VPWR
C107
VREG_MSMP_2.7V
CLR_BACK
VSS
C101
1u
S100
500873-0802
CD_DAT3_CS
CLK_SCLK
CMD_DI
DAT0_DO
DAT1_RSV
DAT2_RSV
GND
GND
VDD
40
23
24
25
26
27
28
29
5
6
7
8
9
21
30
31
32
33
34
35
36
37
38
39
22
1
10
11
12
13
14
15
16
17
18
19
2
20
3
4
SSC-TWH104-HLS
LD100
CN100
SP0204LE5-PB
G1 2
3
G2
5
G3
1
OUT
PWR 4
NA
MIC100
C110
680R111
R126 68
68R125
SSC-TWH104-HLS
LD105
G1
G2
LD104
SSC-TWH104-HLS
SW100
A
B
C
COM1
COM2COM3
D
E
R123 680
EVLC14S02050VA102
0R119
HOT101
EVLC14S02050VA107
NAL100
VREG_MSMP_2.7V
C119
2.2u
0.1u
C100
100KR101
68R105
51K
R110
VREG_BT_2.85V
680R113
R112 680
BT_CLK
BT_TX_RX_N
BT_SBST
BT_SBDT
BT_SBCK
KYPD_LED_EN
MIC1N
MICBIAS
KEY_COL[0]
KEY_COL[2]
KEY_COL[1]
KEY_COL[3]
KEY_COL[4]
KEY_ROW[4]
KEY_COL[4]
BT_CLK
TCXO_BT
KEY_ROW[4]
KEY_ROW[3]
PM_ON_SW_N
V_BACK_UP
KEY_COL[0]
MMC_CLK
MMC_CD
MMC_CMD
MMC_DATA
KYPD_LED_EN
KEY_COL[3]
KEY_COL[2]
KEY_COL[1]
MIC1P
KEY_COL[2]
KEY_COL[0]
KEY_COL[3]
MIC1N
MIC1P
MICBIAS
MMC_CMD
MMC_DATA
MMC_CLK
MMC_CD
BT_DATA
BT_TX_RX_N
BT_SBDT
BT_SBCK
BT_SBST
MMC_CD
MMC_DATA MMC_CLK
MMC_CMD
TCXO_BT
BT_DATA
PM_ON_SW_N
KEY_ROW[3]
KEY_COL[1]
KEY_COL[2]
KEY_COL[0]
KEY_COL[3]
KEY_ROW[3]
KEY_ROW[4]
V_BACK_UP
KEY_COL[1]
7. CIRCUIT DIAGRAM

- 173 -
1.5T SOCKET
ENBY0024101
14-5602-024-000-829
Sheet/
NAME
LG Electronics Inc.
NO.
DRAWING
Sign & Name
Designer
Checked
Approved
MODEL
KU950 Mega Camera FPCB-1.0
Sheets
1.5T MALE
ENBY0019101
FPCB to MEGA CAMERA MODULE - FPCB Side
SPEAKER+
SPEAKER-
DRAWING
Section Date
MAIN to MEGA CAMERA FPCB - Main Side
VISION MARK
AXK726145G
NH LEEM
2006
9 / 7
KU950
Rev. 1.0
LMFL4P35L
LD1
17
18
19
2
20
21
22
23
24
3
4
5
6
7
8
9
CN2
1
10
11
1213
14
15
16
VCAM_1.8VDVCAM_2.8VAVCAM_2.8V
VCAM_1.8V DVCAM_2.8VAVCAM_2.8V
TP3 TP4TP1 TP2
OUT1
OUT2
21
22
23
24
25
26
3
4
5
6
7
8
9
CN3
1
10
11
12
13 14
15
16
17
18
19
2
20
CAM_RESET_N
CAM_PCLK
CAM_PCLK
I2C_SCL
I2C_SDA
I2C_SDA
CAM_VSYNC
CAM_VSYNC
CAM_HSYNC
CAM_HSYNC
CAM_SYSCLK
CAM_SYSCLK
CAM_DATA[7]
CAM_DATA[7]
FLASH_BL_CPO
MC_IO_OFF
MC_IO_OFF
CAM_RESET_N
CAM_DATA[0]
CAM_DATA[0]
CAM_DATA[1]
CAM_DATA[1]
CAM_DATA[2]
CAM_DATA[2]
CAM_DATA[3]
CAM_DATA[3]
CAM_DATA[4]
CAM_DATA[4]
CAM_DATA[5]
CAM_DATA[5]
CAM_DATA[6]
CAM_DATA[6]
I2C_SCL
7. CIRCUIT DIAGRAM

- 174 -
3
MOBILE HANDSET R&D CENTER
DEVELOPMENT LAB 4 DEVELOPMENT GROUP 1
C
4
LCD 35 PIN ROTARY BACKLOCK TYPE CONNECTOR
XF2B-3545-31A
ENQY0010901
16-bit I/F : IM1(H), IM2(L)
7
2
F
56
4
F
7
R&D CHK:
67 8
B
C
E
F
DOC CTRL CHK:
MFG ENGR CHK:
789
QA CHK: REV:
9
NH LEEM
NH LEEM
910
Time Changed:
TITLE:
LG ELECTRONICS INC.
5
D
Date Changed:
345
10
Size:
QA CHK:
4
RECEIVER+
RECEIVER-
Drawing Number:
PAGE1
TITLE:
1
A
3
MFG ENGR CHK:
6
Time Changed:Date Changed:Changed by:
D
Engineer:
B
102
VIBRATOR(VP\WR)
9
E
8
MOTOR_PWR-
REV:
G
H
1
B
C
E
F
G
H
8
A
Changed by:
D
E
Engineer:
61
Size:
23
TO MAIN PCB (T=1.0, COAXIAL CABLE SIDE ENTRY)
11
Drawing Number:
USL00-40L-A
10 11
A
H
A
B
KU950 LCD SUB 1.0
D
Drawn by:
ENBY0027201
R&D CHK:
DOC CTRL CHK:
125 11 12
IM3 - L
IM0 - L
Maker ID : H
2006, Sep 08
A2
2:35:00 pmNH LEEM
A2
C
Drawn by:
G
2
H
G
1211 12
1
TP102
TP101
0.1u
C100
0R102
R103 0
0R101
TP103
C103C102
33p 33p
NAR104
NA
9
TCC_2.7V_EHI_LCD
C101
40
41
42
43
44
45
46
47
48
49
5
50
51
6
7
8
27
28
29
3
30
31
32
33
34
35
36
37
38
39
4
11
12
13
14
15
16
17
18
19
2
20
21
22
23
24
25
26
CN101
1
10
0R100 TP100
7
8
9
TCC_2.7V_EHI_LCD
24
25
26
27
28
29
3
30
31
32
33
34
35
4
5
6
1
10
11
12
13
14
15
16
17
18
19
2
20
21
22
23
CN100
MM_LCD_CS_N
MM_LCD_ADS_N
MM_LCD_WE_N
MM_LCD_RD_N
MM_LCD_WE_N
MM_LCD_DATA[0]
MM_LCD_DATA[1]
MM_LCD_DATA[2]
MM_LCD_DATA[3]
MM_LCD_DATA[4]
MM_LCD_DATA[5]
MM_LCD_DATA[6]
MM_LCD_DATA[7]
MM_LCD_DATA[10]
MM_LCD_DATA[11]
MM_LCD_DATA[9]
MM_LCD_DATA[8]
MM_LCD_DATA[12]
MM_LCD_DATA[13]
MM_LCD_DATA[14]
MM_LCD_DATA[15]
MSM_LCD_RESET_N
MAIN_LED0
MAIN_LED1
MAIN_LED2
MAIN_LED3
MM_LCD_DATA[0]
MM_LCD_DATA[1]
MM_LCD_DATA[2]
MM_LCD_DATA[13]
MM_LCD_VSYNC
WLED_PWR
LCD_IF_MODE_0
LCD_IF_MODE_1
MSM_LCD_RESET_N
WLED_PWR
LCD_IF_MODE_0
MM_LCD_VSYNC
LCD_IF_MODE_1
MM_LCD_CS_N
MM_LCD_ADS_N
MM_LCD_DATA[12]
MM_LCD_DATA[11]
MAIN_LED3
MM_LCD_DATA[5]
MM_LCD_DATA[6]
MM_LCD_DATA[7]
MM_LCD_DATA[8]
MM_LCD_DATA[9]
MM_LCD_DATA[10]
MAIN_LED0
MM_LCD_DATA[14]
MM_LCD_DATA[15]
MAIN_LED1
MAIN_LED2
MM_LCD_DATA[3]
MM_LCD_DATA[4]
MM_LCD_RD_N
7. CIRCUIT DIAGRAM

- 175 -
Sheet/
NAME
DRAWING
LG Electronics Inc.
Sheets
Sign & Name
Designer
Checked
Approved
MODEL
KU950
1/1
Rev. 1.0
SIDE KEY-1.0
Section
SIDE_VOLUME_UP_KEY
SIDE_VOLUME_DOWN_KEY
SIDE_CAMERA_HOT_KEY
Date
DRAWING
NO.
TP100 TP102
CH SUNG
2006
9 / 7
UP
SIDE KEY Keypad
CN100
1
2
3
4
5
DOWN
TP101
CAMERA
7. CIRCUIT DIAGRAM

- 176 -
8. PCB LAYOUT

- 177 -
8. PCB LAYOUT

- 178 -
8. PCB LAYOUT