Mitsubishi Electric melsec-k Owner's manual

CONTENTS
1 . Introduction .......................... ....>.... ........................................................ 1
2 .
Hardwarecomposition and operation .......................................................... 2
2.1 .Hardwarecomposition ................................................................................ 2
2.1.1
.. Hardwaresystemcomposition ................................................................. 2
2.1.2 . CPUsystemcomposition ........................................................................ 3
2.2
. Logicoperations for instructions .................................................................... 4
2-2-1
. Basic operation of theprogrammable controller ........................................... 4
2.2.2 .Arithmeticprinciple .............................................................................. 5
2-3 : Program memory and datamemory ................................................................. 7
2.4.
. Temporary memory M
Refer toitem 3.2 ....................................................... 8
2.5 . Timer, counter T, C - Refer toitem 3.5 ........................................................... 8
2.6 . External failurememory F - Refer toitem 3.4 .................................................. 9
2.7
. Dataregister D - Refer toitem 3.3 .................................................................. 9
2.8
. Input/Output unit - Refer toitem 3.1 ............................................................ 9
....
3 . Sequence until programming ..................................................................... 10
3.1 . Assignment of theinput/output numbers ........................................................ 10
3.2
. Temporary memory M ............................................................................... 18
3.3
. Dataregister D .......................................................................................... 18
3.4 . External failurememory
F .......................................................................... 18
3.5 . Timer, counter T, C .................................................................................... 19
4 . Instructionfunctions .............................................................................. 20
4.1 . Instructions list ........................................................................................ 20
4.2
. Types and compositionof instruction words .................................................... 21
/
4.3 . Sequence instructions ................................................................................. 23
4.3.1 . AND, AN.1 ........................................................................................ 23
4.3.2 .
OR, OR1 ............................................................................................ 23
4.3.3 . LD, LDI ........................................................................................... 24
4.3.4 .
ANB ................................................................................................ 24
4.3.5 .
ORB ................................................................................................. 25
4.3.6
. MC, MCR ......................................................................................... 25

4.3.7 . SET, WST .......................................................................................... 26
4.3-8
. SFT ................................................................................................. 27
(, :
. .....................................................................................................
4-3-9 CJ -II 8
4-3-1 1 . OUT ..................................................................................................... 29
4-3-10
. PLS ................................................................................................ 28
4-4
. Data handling instructions .................................................. ....................... 30
4-4-1 . MOV ...Datatransmission ...................................................................... 30
4-4-2
. > ...Larger (dataco.rnparispn) .............................................................. 32
4-4-3
. < ...Smaller (datacomparison) ....... ?. ........................................... ?. ......... 32
4-4-4
. = ... Coincidence(datacoincidence) ....................................................... 32
..
..
.4.4. 5. + ...Addition .................................................. ............................. T ..... 33
..
.......................................................... ......... .....
4-4-6. - ... Subtraction ..........e.. 33
4-4-7 . BCD ................................................................................................... 35
4-4-8
. BIN ................................................................................................... 36
..
4-5 . Program control instructions .*....I ...... I ....... :. ................ ................................. 37
4-5-1 NOP ~I 37
.. ... *I
. ....................................................................................................... Ij /I
4-5-2. END ..................................................................................................... .. 38
5 . Programming ................................................................................................. 39
5.1 . Programmingprinciples ................................................................................ 39
5.2
. Sequenceinstructions and program.examples ................................................... 41
5.2.1
. Simplecircuits by AND and OR ............................................................... 41
5.2.2
. Complicated circuits by ANB and ORB ................................................... 42
5.2.3 . Circuitswith common control lines
............................................................. 43
. (1) Circuit separation at a contact .................................................................. 43
(2) Use
of master control MCand MCR ......................................................... 44
(3) Use
of conditionaljump CJ .................................................................... 45
5.2.4 . Timer circuit
.................. .,. ..........................................
: .......................... 46
(1)
ON delay circuit ................................................................................... 46
. (2) OFFdelaycircuit ..................................................................................... 47
..
..
(3) Long-timetimer ............................................................... ..................... 48
(4) Circuitsby analogtimer
......................................................................... 49
5.2.5 . One-shot circuits
............................................................... ; ................... 50
(1) One-shot circuit for ON time ................................................................... 50
(2) One-shot circuit for OFFtime ............................................ ;. .................... 50

... -\
,.--,
5.2.6 . Counter circuit ................................................................................... 5 1
(1) Count, reset ........................................................................................ 51
(2) Preset counter ..................................................................................... 51
5-2-7 . Flicker circuit ..................................................................................... 52
5-2-8 . Pulse circuit ....................................................................................... 52
(1)
Rise detection pulse .............................................................................. 52
(2)
Drop detection pulse ............................................................................. 52
5-2-9. Holding circuit for power failure by temporary memory ................................ 53
(1) Use of the Latch unit KL6l ..................................................................... 53
(2) Latch switch QN with K2CPU ................................................................. 53
5-2- 10 . Star-delta motor starting circuit ............................................................. 54
5-3 . Program examples for datahandling instructions .............................................. 55
5-3-1 . Switching of timer set values .................................................................. 55
5-3-2 . Output to the external indicator for the timer time limit ................................ 56
5-3-3 . Counter setting by external digital switch .................................................. 57
5-34 Addition .... .- ...................................................................................... 58
5-3-5 . Remote counter setting ......................................................................... 59
5-3-6 . Time counting for xx rnin xx sec .............................................................. 49
5-3-7 . Shift instructions ................................................................................ 64
5-3-8 . Positioning control .............................................................................. 66
(a) Positioning control by movement amount .................................................. 68
(b) Positioning control by absolute address (for full scan) ................................... 69
(b’) Positioning control by absolute address (with use of MC arid CJ) .................... 70
6 . Forms of various programming sheets ............................................................ 71
(1) Sheets form 1-1
(2) Sheets form 1-2
(3) Sheets form 2
(4) Sheets form 3
(5) Sheets form 4
(6) Sheets form 5
(7) Sheets form 6
(8) Sheets form 7
Unit arrangement table (1 / ) ........................................... 71
Unit arrangement table (2/ ) ........................................... 72
Input/output list .......................................................... 73
Programming sheet ....................................................... 74
Temporary memory sheet ............................................... 75
Data register list ........................................................... 76
External failure memory list ............................................. 77
Timer. counter list ........................................................ 78

1. Introduction
The MEESEC-K series is equipped with an instruction function convenient for machine control,
so that even complicated control can be programmed easily.
The program language uses language for sequencecontrol (a combination
of relay symbol format
and logicsymbol words), so that language of the same system as for the conventionalMELSEC-
007B and 008 is followed, but the symbolshave been partly changed to more general expressions,
Example
( Example
7
(1) ANS - ANB, ORS - ORB
(2) Input/output device name: I000 3 XOOO
i 0000 * YO00
and sequence instructions and data handling instructions have been newly added.
[Example: Universal shift, conditional jump, pulse instructions, addition and subtraction,
magnitude comparison, data movement
(MOV), etc.]
In this way, the series
K is a programmable controller with a powerful program function. Please
study this manual carefully to master the programming methods,
so that the functions can be
used efficiently.
For program input and output operations, refer to the “Handling
instructions for the programming unit”.
--.
NOTES:
(1) Thisprogramming manualcoversthe basic functions of the KOJ, KO, K1, K2, KOE and K2E.
(2) The K2CPU-S3 is provided with special funcitons.
Refer tothe “Instruction Manual
- SpecialFunctions of the K2CPU-S3” for the program-
ming of the special functions.
Refer tothe “Instruction Manual
- SpecialFunctions of the KOJ” for the programming of
the speicial functions.
“
(3) The KOJ is provided with special functions.
-1-

2, Hardware ~~ltaap~~iti~nm and operation
The hardware outlines are described to deepen the understanding for programming.
2-1. Hardware compssiticsn
2-1-1. Hardware system comp~~iti~n
The units shown in the following figure are attached to the base unit t0 compose the
system.
Peripherai support base
K6PSB
Power supply
DC 24V
AC 100 V -
Peripheral units
/output units
P o
Pu K2CPU MN6 1
I/O cab1
K61CBL
I
I
4
Fig. 2-1. Hardware system composition
‘\
2 Base Unit
f
1
i
1
i
d
-2-

2-1-2. CPU system composition $5
The CPU operation functons are shown in the following figure;
CPU -
r-
User program
Peripherals
Memory
1 ("O~memojy KlROM 1s
K2ROM 2s
RAM memory
(KlRAM)
--
PE
inter-
face
K~ROM is
KlROM 2s
Data rnernory
I
Instructions
I register
-1
I, 1
r
I I I
e----
---
e---
-
-
h
5
Y .C
E:
u
a
a
I
T
Logic ~b
processing Register A
Input/
oulput
inter
face
a
ca
I
1 n pu t / ou t pu t
control circuit
I
I
--
_.
(Base unit)
Fig. 2-2. CPU system composition
Notes:
1. Program writing for the user program memory uses the KlRAM.
2. The CPU system composition does not coincide with the hardware.
3. A discreet circuit is obtained for K2CPU.
Simultaneous use of ROM and RAM is not possible.
-3-

2-2. Logic operations for instructions
2-2-1. Basic operation of the programmable
The basic operation of the programmable
controller is shown in the figure on the right.
This operation is the same as for
a computer
of the stored program method, and the hard-
ware composition also is similar,
so that this is
called
a programmable controller of the
quasicomputer type.
@First, the contents
of the program counter
showing the program step number aregiven
to the memory address, and the contents
are read.
@ The read memory contents are translated,
and discrimination is executed for
AND,
OR, and other instructions as well as input
and output numbers.
@ According to the discriminated source
(logic input signal to be included) and the
instructions, AND,
OR, and other logic
operations as well as output operation are
executed.
controller
@ 1 is added to the program counter contents, and specification of the next step number is ex-
Fig. 2-3. Basic logic operations
ecuted.
The above
4 operations are executed for each
step number, Le. each instruction in the
Memory
Step
number
programmable controller, and sequential
execution is executed in the sequence
of the
numbers for all step numbers stored in the
memory. This is called scanning.
The figure on the right shows the concept for
scanning. The above
4 operations are ex-
ecuted in the sequence of the program
numbers according to the program counter
contents, return to number
0 is executed when
the
END instruction is reached, and then the
sequence is repeated. This operation is called
scanning, and with one scanning, all inputs
written into the memory are taken in, logic
operations are executed, and the logic
operation results are put out to all outputs.
'
I --I_---___ ----.--
Fig. 2-4. Scanning operation
The scanning speed about corresponds to the electromagnetic relay response speed, and this is
called the logic operation speed.
As shown in the above, serial arithmetic operations are executed in the programmable controller,
but as the logic operation speed is high, all inputs aretaken in, and logic operation results are put
out to
all outputs, the operation from the outside appears to be the same parallel arithmetic
operation as for electromagnetic relays.
'i
I
I
;
-4-

2-2-2. Arithmetic principle
The arithmetic principle is explained with the
circuit shown in the figure on the right as an
XI
x2
x3
x4
XI
x2
x3
x4
'\
example.
The program for this circuit is as follows with
MELSEC-K.
The executionprocess for the circuit example
(a) is shown in
(b).
InpuUoutput
Step number Instructions number
(a) Circuit example
0 LD x1 Input of the on-off status of X1
Input of the on-off statusof X2 and
OR operation with
Xl.Xl+X2
1' OR x2
2 AND x3 Input of the on-off status of X3 and AND operation
with (X1
+ X2). (X1 + X2). X3
3
Output of the operation result (X1 + X2) X3 to Y14.
o u rr Y 14
Input (X) Output (Y) .
n
XI
x2
x3
x4
x1 +x2
I
.,
0 iIL, XI ' 1 OK' x2
( x1 sxz ) 0x3,
/
(XI +xz ) 0x3
.y 11
Y 12
y 13
Y 14
I1
'12
13
14
3 OT!T Y14
2 AND X3
X: Input selection part
Y: Output selection part
A: Register
A (answer register)
B: Register B (auxiliary register)
'Fig.
2-5. Arithmetic principle
.LU: Logic processing unit J
IR: Instructions register
.(b) Execution process
Explanation of the arithmetic principle
The execution process for this program and this hardware compostion
is as follows.
Step
0 LD X1
@The program number 0 isread from the memory, the instruction LD is stored in the instructions
-5-

register IW, and the input/output number X1 is sent to the input selection part.
*The same applies for subsequent program.
@ X1 is selected by the input selection part X.
@ The on-off status of X1 is taken in, and it is stored in register B via register A.
@ X2 is selected by the input selection part X.
@ The on-off status of X2 is taken in and stored in register A.
@ The contens of X2 in register A and X1 in register B are sent tothe logic processing unit, LU,
@ This operation result (X1 + X2) is sent to register By where it is stored, Register B becomes
1 ORX2
OR operation is executed, and the operation result for (X1 + X2) is obtained.
the answer register.
2 ANDX3
@ X3 is selected by the input selection part X.
@ The on-off status of X3 is taken in and stored in register A.
@ Thecontents of (X1 + X2) inregister B and X3 inregister A are sent tothe logicprocessing
unit
LU, AND operation is executed,and the operation result for (Xl + X2) X3 is obtained.
@ This operation result (X1 + X2) X3 is sent to register By where it is stored. 1
@ Y14 is selected by the output selection part Y.
@ The operation result (XI + X2) X3 from register B is sent to output Y14.
Y14 has an output register, where this operation result is stored and kept.
Theabove example treated
X and Y asinput and output, but seen from the logic processing
unit
(LU), X and Y are preceding units providing conditions or data for logic processing
and units for output of the operation results. These units seen from the
LU are called
“devices”. There are the following types of devices:-
3 OUTY14
X ........ Input
Y ......... output
M ........ Temporary memory
T ......... Timer
C ......... Counter
F
......... External failure memory
D
........ Data register
Input and output
by the LU.
K ......... Constant Only input by the
LU.
-6-

2-3. Program memory and data memory
(1) User program memory
No. Latchabel momory
Step User program memory
Unlatchabel memory
I
I
I
,I
I
I
I'
I
1
Note: The EP-ROM socket is used
jointly for XK step and 2K step.
(3) Latch contents of K2CPU
I 1 lNone MO
- 255, T. CO - 127
DO - 95
21 MO - 127, 254, 255,
MO - 253, T.CO - 12;
DO - 95
Note: Nos. 1 - 5 are
switch.
M254, 255, T.CO - 127
DO - 95
MO - 127, 254,,255,
T.CO - 63, DO - 31
M254, 255
set with the selector
(2) Data memory
MO
5
M 253
M 254
Temporary
memory
254 points
(M)
Battery troublc
RUN signal
Timer, countel
-
. ------
-
(T ,C)
128 points
----
External
Failure memorj
100 points
( kl )
[lata regi5ter
( 1)
96 points
Notes:
1, The timer and counter setting values are
2. Output of the present value is possible
stored
in the user program.
for T, C, D,
(4) Total number of pints for input and
output (hexadecimal symbol
"#").
Max. 256 points Max.
512 points
Fig. 2-6. Contents of the user memory
-7-

2-4.Temporary memory M (the same handling applies to the unused F and Y) +- Refer to item
Thetemporary memory correspondsto auxiliaryrelayswithout output to the outside..Thereis no
limitation on the number of times which this M can be used as an internal contact. The max.
number for M is 254 points, but the external failurememory
F and the unused output Y also can
be used in the same way.
3-2.
M254 and M255 have fixed applications. Do not use these M
carelessly for other purposes.
@ M254 bzttery alarm
This becomes “1” when the battery voltage drops because of discharge. However,
as there is
still sufficient time after this has become “l”, it is treated as an alarm, and the battery should
be exchanged within
one month. For the program, this is handled as a general M, and 1 point
of the output
Y should be used for lead-out as an external signal. As this becomes “‘1” also
when
the battery is removed, M254 can not be used as a general M with EP-ROM operation,
@MZ~ RUN signal
When the CPU signalis required as
an external signal, 1 point of the output Y should
be used for lead-out. However, in the same way as for M254, use as a general A4 is not possible.
_l___l_-
@In case of K2CPU, use “LATCH” as memory holding at the time of power failure. One half
of theM (M128 to M253) can be used aslatch memory when the “LATCH” switch is switched
on. When the switch is set to OFF, it becomes a normal temporary memory. Resetting can be
executed summarily with the CPU “RESET”’ switch. In case of KlCPU, there is no summary
resetting
as described above. In this case, thelatch function for 16 points/32 points/64 points
(setting by connectors in the unit) becomes possible by cdnnection of an‘optionallatch unit
(KL61) to the
I/O unit connector for latching of the output Y. Add “n” to the respectivein-
put/output number and executehandling as a latch output Y”n” for the program. This Y can
-
not be taken out directly to the outside. The latch contact is mom-ammed as Xn.
2-5.Timer, counter T, C 3 Refer to item 3-5.
Timer and counter can use 128points together. The numbers 0 to 127arespecifiedconsecutively
in common for
T and C. Setting value of T, C must be written in the step following the OUT in-
struction.
i OUT TO j. OUT
is1 K F] .i + 1
P
or data register number
C1
or hata register number
When the’above’i + 1 or j + 1 are omitted, (INS. SET ERR) occurs.
The timer setting value can be set in units of 0.1 sec from 0.1 to999.9 sec. The accuracy is 3 sec
in regard to the setting value.
1.
As the settingfor the min. unit of 0.1 sec varies from 0 to 0.1 sec, it may become 0 sec accroding
to the timing, In this case, set the setting value to 0.2.
by driving
a counter with frequency division for that timing.
2. For
a setting in excess of 999.9 sec., executethe lower digits with the timer, and produce a timer
.- .
-8-

Example: Execute counter input by 1 min time up, and use the number of required minutes as
the setting value.
3. Timer resetting is not possible. However, the present value is cleared to 0 at the time of power
I__ ON.
Counter setting values from 1 to 9999 can be used. Intermediate resetting is possible by RST in-
structions. Outputorarithmetic operations arepossiblefor the present value
of timer and counter
by MOVand other data instructions.
2-6. External failure memory F -+ Refer to item 3-4.
F has the same function as the temporary memory, and when the optional external failure
monitor unit
(KN61) is connected to the (attachmentposition for the I/O unit, F is scanned
cyclicallyand the
F number correspondingto the scan sequenceposition which has become “1 ” is
displayed numerically. When an external alarm is put out together with thedisplay, the respective
F is handled in the sameway as a general M, and alarm output can be executedvia output Y. The
display of the
F number of theexternal failureis cleared by thereset switchof the monitor surface
after Fi
“0”, and the next Fj “1” is displayed.
When
no external failure monitor is used, handling is executed exactly in the same way as for a
general M, so that use as a temporary memory is possible.
i‘
2-7. Data register D -+ Refer to item 3-3.
2-8. Input/output unit -+ Refer to item 3-9.
-9-

3. Sequence until programming
3-1 Assignment of the input/output numbers
The assignmentof the input/output numbers is decideddepending onthe I/O connectornumbers
of the base unit and the types and arrangement of the input/output units installed there.
As an example, the decision of the input/sutput numbers will be shown for the following unit
composition.
Rase unit Basic R18B
Extended K 6 8 H
Power supply unit K62f’
CPU unit
K 1 C I’ U,
External failure manitor
Input unit
(for data)
Output unit (for data)
Input unit
(DC 24 V)
Input unit (AC 100 V)
Output unit (AC 100 V)
Output unit (AC 100 V)
Input/output composite unit
KN6 I
KX3 1
KY31
KX 3 0
KXlO
KYl1
KY22
Kf11 1
(32 points)
(32 points)
(16 points)
2 boards (16 points)
2 boards (16 points)
(16 points)
(8 points + 8 points)
Timer unit
K‘L6 1 (16 points)
Latch unit (32 points switching)
lJ (32 points)
When the units are selected in this way, the unit arrangement becomes as shown in Fig. 3-2. for
therbase unit K18B and K68B.
(1)Unit arrangement
When the unit arrangement is entered into the “Unit arrangement table sheets Nos.l/2 and
2/2”, it becomes as shown in Fig. 3-3-1, 3-3-2. When the I/O units are arranged sequentially
from
0 on the number of points of each I/O unit is specified and entered on the lower left of
the table, sothat the number of requiredpoints accordingtothe configuration is obtained. The
purpose of the input/output is entered in the application column and the upper
2 digits of the
I/O number are entered. Use sequential numbering with left justification in units of 16points,
Le.,
00, 01, 02, ... OF.
Note: The input/output numbers are hexadecimal numbers. (Indication method: 00 El#)
0, 1, 2, 3, 4, 5, 6, 7, 8, 9, A, B, C, D, E, F ...The figure increases by one digit when F is reached.
(2)Definition of the input/output numbers (drawing up of the input/output list)
When the
I/O adress “OA” is decided as shown in Fig. 3-1 (decisionin hexadecimalunits as 1,
2, ..., to“OA”, the numbers for each input/output are necessarily defined on a 1 point cor-
respondence.
i t
i

Lower 1 digit
,I ’\
Inevitabledefinition with
a 1 point correspondence.
,
Fig. 3-1. Assignment in the unit
Under reference to Fig. 3-3., the input/output list is defined sequentiallywith a 1 point cor-
respondence and complete the input/output list. (Execute entry with use
of sheets 2.)
Caution points for adress assignment:
@Occupation of 16points:16 points for the externalfailuremonitor, timer, blank (onlyin the
case of intermediate blanks), and latch unit must be selected.
Note: Note that the entire arrangement is shifted if a unit which occupies
32 points or 64
points is inserted into the blank afterwards.
Select
32 points/64 points for multipoint storage input/output units, latch units 3
Refer to the lower left of the unit arrangement table sheets.
@Occupation of
32 points or 64 points
(3)Cations for input assignment
There is no special principle, but when assignment is executed under consideration of the
followingpoints, programming and checkingwill be facilitatedand the arrangement of the wir-
ing diagram will become easier.
@Collect, for example, push button switches together, then limit switches, etc. so that the in-
@Assign sequentiallyaccording to the divice numbers within each type.
@When there are remaining points, assign on device or machine per input unit.
@For devices which can be connected externally, assign after connection.
@Assign high noise inputs as far as possible from the CPU, i.e. with later numbers.
In the sameway for input assignment,there is no specialprinciple, but attention shouldbe paid
to the following points.
@Collect output devices of the same type together.
put are grouped in similar kind.
(4)Cautions for output assignment
-11-

@Assign in the sequence of device numbers for the same kind.
@When there are remaining points, assign one device or machine per output unit.
@Assign output devices with high noise as far as possible with later numbers.
@Assignconsecutivenumbers
to related output devices, e.g., motor forward-reverse contacts.
POWER
UNIT
CON 1
CPU
UNIT
CON 2
l/O
UNIT0
CON 3
I/O
UNITl
CON4
I/O
UNIT2
CON 5
I/O
UN
I T3
CON6
I/O
UNIT4
CON7
I/S
UNIT5
CON 8
I/O
UNIT6
CON 9
I/O
UNIT7
CON 10
22 ~
22 ~
22 ~
4
z
2
v .v
(KlCPIJ) KN61
t
X70
2
X7F
Y 80
2
Y 8F
Y90
2
Y9F
00
2
OF
I/O
UN I TO
CON3
x10
2
X2F
Y 30
2
Y4F
X50
2
X5F
X60
2
X6F
I/O
UNIT4
I/O
UNIT5
I/O
UNITl I/O
UNIT2
1,'o
UNIT3
vo
UNIT6 I/O
UNIT7
POWER
UNIT
CON 1 CON 4 C!!N 5
CON 7
CON8
CON 9
CON 10
lr
22 I
V
22 J 2
D
22 II 2
'~ 22 22
I z
22 ~
22 ~
1
22
i
1
22
A
I
I
7-
i
I
i
Blank
KH 1 1
KT 61
KL61
Y EO
2
YEF
XEO
Blank Blank
(K62P
KY 22
YAO
2
YAF
Blank
BO
2
BF
xco
2
xc7
Y C8
2
YCF
YDO
2
YDF
XDO
2
XDF
I
c
XEF
Fig. 3-2. Base unit connector arrangement
-12-

< Approved
---
MELSEC-M
Input/output list
_. Fig. 3-4-11, Sample system
--
Base
(I/O connector
nam e)
Drawn UP
Mitsubishi
80- 10 -10
No
Basic base
IK 18B
ditto
(1)
(continued)
--IS-
Sheet form 2

.
Mitsubishi
MELSEC-K
Fig. 3-4-2. Sample system
1/0 unit
type name
(number
of
pointdunit)
(KX3 l),
KY31
(32 points)
Input/output list
Remarks
type, etc.)
Input/output
number Device number Name (Connection terminal wire
2 0 €3 C D First 1 Input Data(1) Continued
digit
1 2 BCD x 2 digits
2 4 Digital switch input
/
I
3 J 8
5( 20
6 40
/
10
HCD Second
$4 digit /
-_-
-
L
7 80
V
8 B C D First
digit
1 Input Data(lI>
9 2 RCD x 2 digits
A
f
4 Digital switch input
/L
H 8
/
I) 20 \
i
vp’ 130 +
Second
(1 RCD digit 10
/
40
I
3 0 BCD First 1 Output Data(IV) Same a\ abovc
digit
1 2 BCD x 2 digits
2 4 Numerical dirplay
3 8
10
5 20
6 40
i
7 80
II
I
Second
4 CD dig?
,
I
CD First
digigt
1 Output UatdV)
9 2 BCD x 2 digits
A 4 To the numerical setting unit
13 8
10
I
Second
C B CD digit
I) 20
E 40
yF 80
I
(continued)
Base
(I/O connecto
name)
, ditto
(2)
1
1 1
i
si
I
k
e
P
(continued) (The following page for
KY31 is omitted.)
-16-
Sheet form 2