Motorola MC92603 User manual

MC92603RM
12/2003
Rev. 0
MC92603 Quad
Gigabit Ethernet Transceive
r
Reference Manu
al
Device Supported
:
MC92603V
F

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Introduction
Transmitter
Receiver
Management Interface (MDIO)
Index
System Design Considerations
Test Features
1
2
3
4
5
6
Glossary of Terms and Abbreviations
8B/10B Coding Scheme
Ordering Information
Package Description
Electrical Specifications and Characteristics
Revision History
7
8
A
B
C
GLO
IND

Introduction
Transmitter
Receiver
Management Interface (MDIO)
Index
System Design Considerations
Test Features
1
2
3
4
5
6
Glossary of Terms and Abbreviations
8B/10B Coding Scheme
Ordering Information
Package Description
Electrical Specifications and Characteristics
Revision History
7
8
A
B
C
GLO
IND

Contents
Paragraph
Number Title Page Number
MOTOROLA Contents v
Contents
About This Book
Audience................................................................................................................xv
Organization...........................................................................................................xv
Suggested Reading............................................................................................... xvi
General Information..................................................................................... xvi
Related Documentation ............................................................................... xvi
Conventions ........................................................................................................ xvii
Signals................................................................................................................. xvii
Chapter 1
Introduction
1.1 Overview.............................................................................................................. 1-1
1.2 Features................................................................................................................ 1-2
1.3 Block Diagram..................................................................................................... 1-4
1.4 References............................................................................................................ 1-7
Chapter 2
Transmitter
2.1 Transmitter Block Diagram ................................................................................. 2-2
2.2 Transmitter Interface Signals............................................................................... 2-2
2.3 Transmitter Interface Configuration .................................................................... 2-4
2.3.1 Transmit Driver Operation............................................................................... 2-5
2.3.2 Repeater Mode Operation................................................................................ 2-6
2.4 Backplane Application Modes (COMPAT = Low).............................................. 2-6
2.4.1 Transmitting Uncoded Data—8-/4-Bit Modes ................................................ 2-6
2.4.2 Transmitting Coded Data—10-/5-Bit Modes .................................................. 2-8
2.5 Ethernet Compliant Applications Modes (COMPAT = High)............................. 2-9
2.5.1 Transmitting Uncoded Data—GMII or RGMII Modes................................. 2-10
2.5.1.1 Auto-Negotiation Process.......................................................................... 2-10
2.5.1.2 Ethernet Data Transmission Process.......................................................... 2-11
2.5.2 Transmitting Coded Data—TBI or RTBI Modes .......................................... 2-12
2.6 Transmitter Redundant Link Operation............................................................. 2-12

Contents
Paragraph
Number Title Page Number
vi MC92603 Quad Gigabit Ethernet Transceiver Reference Manual MOTOROLA
Chapter 3
Receiver
3.1 Receiver Block Diagram...................................................................................... 3-2
3.2 Receiver Interface Signals ................................................................................... 3-3
3.3 Functional Description......................................................................................... 3-5
3.3.1 Input Amplifier................................................................................................ 3-5
3.3.2 Transition Tracking Loop and Data Recovery................................................. 3-6
3.3.3 8B/10B Decoder .............................................................................................. 3-6
3.3.4 Half-Speed Mode............................................................................................. 3-7
3.3.5 Repeater Mode................................................................................................. 3-7
3.3.6 Receiver Redundant Link Operation ............................................................... 3-7
3.4 Receiver Interface Configuration......................................................................... 3-7
3.5 Data Alignment Configurations........................................................................... 3-8
3.5.1 Non-Aligned Mode (BSYNC = Low) .............................................................3-9
3.5.2 Byte-Aligned Mode (BSYNC = High)............................................................ 3-9
3.5.3 Word Synchronization ................................................................................... 3-10
3.5.3.1 Word Synchronization Method.................................................................. 3-10
3.6 Receiver Interface Timing Modes...................................................................... 3-12
3.6.1 Recovered Clock Timing Mode (RCCE = High) .......................................... 3-12
3.6.2 Reference Clock Timing Mode (RCCE = Low)............................................ 3-13
3.7 Ethernet Compliant Applications Modes (COMPAT = High)........................... 3-15
3.7.1 Interface to Ethernet MAC ............................................................................ 3-15
3.7.1.1 GMII Operation ......................................................................................... 3-15
3.7.1.2 TBI Operation............................................................................................ 3-17
3.7.1.3 Double Data Rate Operation—RGMI and RTBI....................................... 3-18
3.7.2 Rate Adaption of Ethernet Packet Data Streams ........................................... 3-19
3.7.2.1 Rate Adaption Method............................................................................... 3-19
3.7.2.2 Configuration Context ............................................................................... 3-20
3.7.2.3 Idle Context ............................................................................................... 3-20
3.7.2.4 Data Context.............................................................................................. 3-21
3.7.3 Error Handling............................................................................................... 3-21
3.7.3.1 Jumbo Frame Considerations .................................................................... 3-22
3.8 Backplane Applications Modes (COMPAT = Low).......................................... 3-22
3.8.1 Byte Mode (Uncoded Data)...........................................................................3-22
3.8.2 10-Bit Mode (Coded Data)............................................................................ 3-23
3.8.2.1 Double Data Rate Operation—Backplane Applications ........................... 3-24

Contents
Paragraph
Number Title Page Number
MOTOROLA Contents vii
Chapter 4
Management Interface (MDIO)
4.1 MDIO Interface.................................................................................................... 4-1
4.2 MDIO Registers................................................................................................... 4-2
4.2.1 MDIO RA 0—Control Register....................................................................... 4-3
4.2.2 MDIO RA 1—Status Register......................................................................... 4-4
4.2.3 MDIO RA 2 and 3—PHY Identifier Registers................................................ 4-5
4.2.4 MDIO RA 4—Auto-Negotiation Advertisement Register.............................. 4-6
4.2.5 MDIO RA 5—Auto-Negotiation Link Partner Ability Register..................... 4-7
4.2.6 MDIO RA 6—Auto-Negotiation (AN) Expansion Register ........................... 4-8
4.2.7 MDIO RA 7–14—Not Supported.................................................................... 4-8
4.2.8 MDIO RA 15—Extended Status Register....................................................... 4-8
4.2.9 MDIO RA 16 (Vendor Specific)—Permanent Configuration Control
Register........................................................................................................ 4-9
4.2.10 MDIO RA 17 (Vendor Specific)—Channel Configuration and
Status Register ........................................................................................... 4-11
4.2.11 MDIO RA 18 (Vendor Specific)—BERT Error Counter Register................4-12
Chapter 5
System Design Considerations
5.1 Reference Clock Configuration ........................................................................... 5-2
5.2 Startup.................................................................................................................. 5-2
5.3 Standby Mode...................................................................................................... 5-3
5.4 Receiver Interface Clock Centering.....................................................................5-3
5.5 Repeater Mode..................................................................................................... 5-4
5.5.1 Ten-Bit Interface Mode.................................................................................... 5-4
5.5.2 Byte Alignment Mode ..................................................................................... 5-4
5.5.3 Word Synchronization Mode........................................................................... 5-5
5.5.4 Recovered Clock Mode ................................................................................... 5-5
5.5.5 Add/Drop Idle Mode........................................................................................ 5-5
5.5.6 Half-Speed Mode............................................................................................. 5-5
5.6 Configuration and Control Signals......................................................................5-6
5.7 Power Supply Requirements................................................................................ 5-7
5.8 Phase-Locked Loop (PLL) Power Supply Filtering............................................5-7
5.9 Power Supply Decoupling Recommendations ....................................................5-8

Contents
Paragraph
Number Title Page Number
viii MC92603 Quad Gigabit Ethernet Transceiver Reference Manual MOTOROLA
Chapter 6
Test Features
6.1 IEEE Std. 1149.1 Implementation .......................................................................6-1
6.1.1 Test Access Port (TAP) Interface Signals........................................................ 6-1
6.1.2 Instruction Register.......................................................................................... 6-2
6.1.3 Instructions....................................................................................................... 6-2
6.1.4 Boundary Scan Register................................................................................... 6-3
6.1.5 Device Identification Register (0x0281E01D) ................................................ 6-3
6.1.6 Performance..................................................................................................... 6-3
6.2 System Accessible Test Modes............................................................................ 6-4
6.2.1 Loopback System Test..................................................................................... 6-4
6.2.2 BIST Sequence System Test with External Loopback Modes ........................ 6-5
6.3 BIST Sequence Test with Internal Digital Loopback Mode................................ 6-6
Chapter 7
Electrical Specifications and Characteristics
7.1 General Characteristics........................................................................................ 7-1
7.1.1 General Parameters.......................................................................................... 7-1
7.1.2 Absolute Maximum Rating.............................................................................. 7-2
7.1.3 Recommended Operating Conditions.............................................................. 7-2
7.2 DC Electrical Specifications................................................................................ 7-3
7.3 AC Electrical Characteristics............................................................................... 7-4
7.3.1 Transmitter Interface Timing........................................................................... 7-4
7.3.1.1 Transmitter Interface, Non-DDR Timing .................................................... 7-4
7.3.1.2 Transmitter Interface, DDR Timing ............................................................ 7-5
7.3.2 Receiver Interface Timing ............................................................................... 7-6
7.3.2.1 Receiver Interface, Non-DDR Timing......................................................... 7-7
7.3.2.1.1 Receiver, Non-DDR Clock Timing (All Modes Except Ethernet
TBI Modes) ......................................................................................... 7-7
7.3.2.1.2 Receiver Interface, Non-DDR Clock Timing (Ethernet TBI Mode)....... 7-8
7.3.2.2 Receiver Interface, DDR Timing.................................................................7-9
7.3.2.2.1 Receiver, DDR Clock Timing (All Modes Except Ethernet
RTBI Modes)....................................................................................... 7-9
7.3.2.2.2 Receiver, DDR Centered Clock Timing (Ethernet RTBI Mode)........... 7-10
7.3.3 Reference Clock Timing................................................................................ 7-11
7.3.4 Serial Data Link Timing ................................................................................7-12
7.3.5 MDIO Interface Timing................................................................................. 7-13
7.3.6 JTAG Test Port Timing.................................................................................. 7-14

Contents
Paragraph
Number Title Page Number
MOTOROLA Contents ix
Chapter 8
Package Description
8.1 256 MAPBGA Package Parameter Summary ..................................................... 8-1
8.2 Nomenclature and Dimensions of the 256 MAPBGA Package .......................... 8-2
8.3 Package Thermal Characteristics......................................................................... 8-5
8.4 MC92603Chip Pinout Listing.............................................................................. 8-5
Appendix A
Ordering Information
Appendix B
8B/10B Coding Scheme
B.1 Overview..............................................................................................................B-1
B.1.1 Naming Transmission Characters....................................................................B-2
B.1.2 Encoding..........................................................................................................B-2
B.1.3 Calculating Running Disparity ........................................................................B-3
B.2 Data Tables...........................................................................................................B-3
Appendix C
Revision History
Glossary of Terms and Abbreviations
Index

Contents
Paragraph
Number Title Page Number
xMC92603 Quad Gigabit Ethernet Transceiver Reference Manual MOTOROLA