NEC Renesas mPD71312 User manual

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Document No. U18438EJ2V0UD00 (2nd edition)
Date Published May 2008 NS
Printed in Japan
2008
µ
PD71312
µ
PD71312
LCD Controller/Driver Dedicated to
78K0/Kx2 and 78K0R/Kx3
User’s Manual

User’s Manual U18438EJ2V0UD
2
[MEMO]

User’s Manual U18438EJ2V0UD 3
1
2
3
4
VOLTAGE APPLICATION WAVEFORM AT INPUT PIN
Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the
CMOS device stays in the area between V
IL (MAX) and V IH (MIN) due to noise, etc., the device may
malfunction. Take care to prevent chattering noise from entering the device when the input level is fixed,
and also in the transition period when the input level passes through the area between V
IL (MAX) and
V
IH (MIN).
HANDLING OF UNUSED INPUT PINS
Unconnected CMOS device inputs can be cause of malfunction. If an input pin is unconnected, it is
possible that an internal input level may be generated due to noise, etc., causing malfunction. CMOS
devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed
high or low by using pull-up or pull-down circuitry. Each unused pin should be connected to V
DD or GND
via a resistor if there is a possibility that it will be an output pin. All handling related to unused pins must
be judged separately for each device and according to related specifications governing the device.
PRECAUTION AGAINST ESD
A strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as
much as possible, and quickly dissipate it when it has occurred. Environmental control must be
adequate. When it is dry, a humidifier should be used. It is recommended to avoid using insulators that
easily build up static electricity. Semiconductor devices must be stored and transported in an anti-static
container, static shielding bag or conductive material. All test and measurement tools including work
benches and floors should be grounded. The operator should be grounded using a wrist strap.
Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for
PW boards with mounted semiconductor devices.
STATUS BEFORE INITIALIZATION
Power-on does not necessarily define the initial status of a MOS device. Immediately after the power
source is turned ON, devices with reset functions have not yet been initialized. Hence, power-on does
not guarantee output pin levels, I/O settings or contents of registers. A device is not initialized until the
reset signal is received. A reset operation must be executed immediately after power-on for devices
with reset functions.
POWER ON/OFF SEQUENCE
In the case of a device that uses different power supplies for the internal operation and external
interface, as a rule, switch on the external power supply after switching on the internal power supply.
When switching the power supply off, as a rule, switch off the external power supply and then the
internal power supply. Use of the reverse power on/off sequences may result in the application of an
overvoltage to the internal elements of the device, causing malfunction and degradation of internal
elements due to the passage of an abnormal current.
The correct power on/off sequence must be judged separately for each device and according to related
specifications governing the device.
INPUT OF SIGNAL DURING POWER OFF STATE
Do not input signals or an I/O pull-up power supply while the device is not powered. The current
injection that results from input of such a signal or I/O pull-up power supply may cause malfunction and
the abnormal current that passes in the device at this time may cause degradation of internal elements.
Input of signals during the power off state must be judged separately for each device and according to
related specifications governing the device.
NOTES FOR CMOS DEVICES
5
6

User’s Manual U18438EJ2V0UD
4
The information in this document is current as of April, 2008. The information is subject to change
without notice. For actual design-in, refer to the latest publications of NEC Electronics data sheets or
data books, etc., for the most up-to-date specifications of NEC Electronics products. Not all
products and/or types are available in every country. Please check with an NEC Electronics sales
representative for availability and additional information.
No part of this document may be copied or reproduced in any form or by any means without the prior
written consent of NEC Electronics. NEC Electronics assumes no responsibility for any errors that may
appear in this document.
NEC Electronics does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from the use of NEC Electronics products listed in this document
or any other liability arising from the use of such products. No license, express, implied or otherwise, is
granted under any patents, copyrights or other intellectual property rights of NEC Electronics or others.
Descriptions of circuits, software and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these
circuits, software and information in the design of a customer's equipment shall be done under the full
responsibility of the customer. NEC Electronics assumes no responsibility for any losses incurred by
customers or third parties arising from the use of these circuits, software and information.
While NEC Electronics endeavors to enhance the quality, reliability and safety of NEC Electronics products,
customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To
minimize risks of damage to property or injury (including death) to persons arising from defects in NEC
Electronics products, customers must incorporate sufficient safety measures in their design, such as
redundancy, fire-containment and anti-failure features.
NEC Electronics products are classified into the following three quality grades: "Standard", "Special" and
"Specific".
The "Specific" quality grade applies only to NEC Electronics products developed based on a customer-
designated "quality assurance program" for a specific application. The recommended applications of an NEC
Electronics product depend on its quality grade, as indicated below. Customers must check the quality grade of
each NEC Electronics product before using it in a particular application.
The quality grade of NEC Electronics products is "Standard" unless otherwise expressly specified in NEC
Electronics data sheets or data books, etc. If customers wish to use NEC Electronics products in applications
not intended by NEC Electronics, they must contact an NEC Electronics sales representative in advance to
determine NEC Electronics' willingness to support a given application.
(Note)
•
•
•
•
•
•
M8E 02. 11-1
(1)
(2)
"NEC Electronics" as used in this statement means NEC Electronics Corporation and also includes its
majority-owned subsidiaries.
"NEC Electronics products" means any product developed or manufactured by or for NEC Electronics (as
defined above).
Computers, office equipment, communications equipment, test and measurement equipment, audio
and visual equipment, home electronic appliances, machine tools, personal electronic equipment
and industrial robots.
Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support).
Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems and medical equipment for life support, etc.
"Standard":
"Special":
"Specific":

User’s Manual U18438EJ2V0UD 5
[MEMO]

User’s Manual U18438EJ2V0UD
6
INTRODUCTION
Readers This manual is intended for user engineers who wish to understand the functions of the
µ PD71312 and design and develop application systems and programs for these
devices.
Purpose This manual is intended to give users an understanding of the functions described in the
Organization below.
Organization The
µ PD71312 manual is divided into the following sections.
µ PD71312
User’s Manual
•Pin functions
•Internal block functions
•Other on-chip peripheral functions
•Electrical specifications
How to Read This Manual It is assumed that the readers of this manual have general knowledge of electrical
engineering, logic circuits, and microcontrollers.
•To gain a general understanding of functions:
→Read this manual in the order of the CONTENTS.
•To know details of the 78K/0 microcontrollers instructions:
→Refer to the separate document 78K/0 Series Instructions User’s Manual
(U12326E).
Conventions Data significance: Higher digits on the left and lower digits on the right
Active low representations: ××× (overscore over pin and signal name)
Note: Footnote for item marked with Note in the text
Caution: Information requiring particular attention
Remark: Supplementary information
Numerical representations: Binary
...×××× or ××××B
Decimal
...××××
Hexadecimal
...××××H

User’s Manual U18438EJ2V0UD 7
CONTENTS
CHAPTER 1 OUTLINE ...............................................................................................................................9
1.1 Features ...........................................................................................................................................9
1.2 Applications.....................................................................................................................................9
1.3 Ordering Information ......................................................................................................................9
1.4 Pin Configuration (Top View)...................................................................................................... 10
CHAPTER 2 PIN FUNCTIONS ............................................................................................................... 12
2.1 Pin Function List .......................................................................................................................... 12
2.2 Description of Pin Functions ...................................................................................................... 13
2.2.1 SDA .................................................................................................................................................13
2.2.2 SCL..................................................................................................................................................13
2.2.3 S0 to S35, S36 to S39 .....................................................................................................................13
2.2.4 COM0 to COM3 ...............................................................................................................................13
2.2.5 LVDD .................................................................................................................................................13
2.2.6 LVSS .................................................................................................................................................13
2.2.7 VLC0 to VLC2 ......................................................................................................................................13
2.2.8 CAPH, CAPL ...................................................................................................................................13
2.2.9 RESET.............................................................................................................................................13
2.2.10 LCLK..............................................................................................................................................13
2.2.11 IC ..................................................................................................................................................13
2.3 Pin I/O Circuits and Recommended Connection of Unused Pins........................................... 14
CHAPTER 3 LCD CONTROLLER/DRIVER........................................................................................... 16
3.1 Functions of LCD Controller/Driver ........................................................................................... 16
3.2 Configuration of LCD Controller/Driver .....................................................................................18
3.3 Controlling LCD Controller/Driver .............................................................................................. 20
3.4 Registers Controlling LCD Controller/Driver ............................................................................ 22
3.5 Setting LCD Controller/Driver ..................................................................................................... 26
3.6 LCD Display Data Memory .......................................................................................................... 28
3.7 Common and Segment Signals .................................................................................................. 29
3.8 Display Modes .............................................................................................................................. 33
3.8.1 Static display example .....................................................................................................................33
3.8.2 Two-time-slice display example .......................................................................................................36
3.8.3 Three-time-slice display example ....................................................................................................39
3.8.4 Four-time-slice display example.......................................................................................................43
3.9 Supplying LCD Drive Voltages VLC0, VLC1, and VLC2 ................................................................. 46
3.9.1 Internal resistance division method..................................................................................................46
3.9.2 External resistance division method.................................................................................................48
3.9.3 Internal voltage boosting method.....................................................................................................49
CHAPTER 4 I2C COMMUNICATIONS ................................................................................................... 50
4.1 System Configuration.................................................................................................................. 50

User’s Manual U18438EJ2V0UD
8
4.2 Explanation of Operation............................................................................................................. 51
4.2.1 I2C bus function ............................................................................................................................... 51
4.2.2 Status transition diagram ................................................................................................................ 53
4.3 Write Operation............................................................................................................................. 54
4.4 Read Operation............................................................................................................................. 57
CHAPTER 5 ELECTRICAL SPECIFICATIONS ..................................................................................... 61
CHAPTER 6 PACKAGE DRAWINGS .................................................................................................... 66
CHAPTER 7 RECOMMENDED SOLDERING CONDITIONS............................................................... 68

User’s Manual U18438EJ2V0UD 9
CHAPTER 1 OUTLINE
1.1 Features
{Operating frequency: 400 kHz (MAX.)
{LCD driver
Resistance division method/Internal voltage boosting method
Common signals: 4 (dynamic display)
Segment signals: 36 (52-pin product), 40 (64-pin product)
{Communication mode: I2C (400 kbps (MAX.))Note
{Power supply voltage: LVDD = 1.8 to 5.5 V
{Operating ambient temperature: TA = −40 to +85°C
Note Only communication with IIC0 of the 78K0/Kx2 and 78K0R/Kx3 is possible.
It does not support the simplified IIC of the 78K0R/Kx3.
1.2 Applications
APS cameras, digital cameras, AV equipments, and household electrical appliances, etc.
1.3 Ordering Information
•Flash memory version (Lead-free products)
Part Number Package
µ PD71312GB-UET-A 52-pin plastic LQFP (10 ×10)
µ PD71312GB-UEU-A 64-pin plastic LQFP (10 ×10)

CHAPTER 1 OUTLINE
User’s Manual U18438EJ2V0UD
10
1.4 Pin Configuration (Top View)
•52-pin plastic LQFP (10 ×10)
VLC0
VLC1
VLC2
COM0
COM1
COM2
COM3
S0
S1
S2
S3
S4
S5
S31
S30
S29
S28
S27
S26
S25
S24
S23
S22
S21
S20
S19
CAPL CAPH IC SCL SDA LCLK RESET LVDD LVSS S35 S34 S33 S32
S6 S7 S8 S9
S10 S11 S12 S13 S14 S15 S16 S17 S18
1
2
3
4
5
6
7
8
9
10
11
12
13
39
38
37
36
35
34
33
32
31
30
29
28
27
52 51 50 49 48 47 46 45 44 43 42 41 40
14 15 16 17 18 19 20 21 22 23 24 25 26

CHAPTER 1 OUTLINE
User’s Manual U18438EJ2V0UD 11
•64-pin plastic LQFP (10 ×10)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
CAPL
Note
CAPL CAPH IC SCL SDA LCLK RESET LV
DD
LV
SS
S39 S38 S37 S36 S35 S35
Note
S7
Note
S7 S8 S9
S10 S11 S12 S13 S14 S15 S16 S17 S18 S19 S20
S20
Note
S34
Note
S34
S33
S32
S31
S30
S29
S28
S27
S26
S25
S24
S23
S22
S21
S21
Note
V LC0Note
V LC0
V LC1
V LC2
COM0
COM1
COM2
COM3
S0
S1
S2
S3
S4
S5
S6
S6
Note
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Note Leave open or connect to an identical pin that is adjacent to this pin.
Pin Identification
CAPH, CAPL: LCD power supply
capacitance control
COM0 to COM3: Common output
IC: Internally connected
LCLK: Clock input
LVDD: Power supply
LVSS: Ground
RESET: Reset
S0 to S35, Segment output
S36 to S39Note:
SCL: Serial clock input
SDA: Serial data input/output
VLC0 to VLC2: LCD power supply
Note 64-pin product only.

User’s Manual U18438EJ2V0UD
12
CHAPTER 2 PIN FUNCTIONS
2.1 Pin Function List
Table 2-1. Pin Function List
Pin Name I/O Function After Reset
SDA I/O Serial data I/O for serial interface Input
SCL Input Clock input for serial interface Input
S0 to S35,
S36 to S39Note
Output LCD controller/driver segment signal outputs Output
COM0 to COM3 Output LCD controller/driver common signal outputs Output
LVDD −Positive power supply for LCD controller/driver −
LVSS −Ground potential for LCD controller/driver −
VLC0 to VLC2 −LCD drive voltage −
CAPH −
CAPL −
LCD drive voltage booster capacitor connection −
RESET Input System reset input −
LCLK Input System clock input Input
IC −Internally connected. −
Note 64-pin product only.

CHAPTER 2 PIN FUNCTIONS
User’s Manual U18438EJ2V0UD 13
2.2 Description of Pin Functions
2.2.1 SDA
This is a serial data I/O pin for serial interface (N-ch open-drain).
2.2.2 SCL
This is a serial clock input pin for serial interface (N-ch open-drain).
2.2.3 S0 to S35, S36 to S39Note
These pins are the segment signal output pins for the LCD controller/driver.
Note 64-pin product only.
2.2.4 COM0 to COM3
These pins are the common signal output pins for the LCD controller/driver.
2.2.5 LVDD
This is the positive power supply pin for the LCD controller/driver.
2.2.6 LVSS
This is the ground potential pin for the LCD controller/driver.
2.2.7 VLC0 to VLC2
These pins are the power supply voltage pins for driving the LCD.
2.2.8 CAPH, CAPL
These pins are the capacitor connection pins for driving the LCD.
2.2.9 RESET
This is the active-low system reset input pin.
2.2.10 LCLK
This is the system clock input pin.
The internal pull-down resistor is connected during low-level input to RESET pin.
2.2.11 IC
Internally connected. Connect directly to LVSS.

CHAPTER 2 PIN FUNCTIONS
User’s Manual U18438EJ2V0UD
14
2.3 Pin I/O Circuits and Recommended Connection of Unused Pins
Table 2-2 shows the types of pin I/O circuits and the recommended connections of unused pins.
See Figure 2-1 for the configuration of the I/O circuit of each type.
Table 2-2. Pin I/O Circuit Types
Pin Name I/O Circuit Type I/O Recommended Connection of Unused Pins
LCLK 2-U Independently connect to LVDD or LVSS via a resistor.
SCL 2-G
Input
SDA 13-R I/O
Be sure to pull up externally.
S0 to S35, S36 to S39Note 17
COM0 to COM3 18
Output
VLC0 to VLC2
CAPH, CAPL
−−
Leave open.
RESET 2 Input −
IC −−Connect directly to LVSS.
Note 64-pin product only.

CHAPTER 2 PIN FUNCTIONS
User’s Manual U18438EJ2V0UD 15
Figure 2-1. Pin I/O Circuit List
Type 2 Type 2-G
Schmitt-triggered input with hysteresis characteristics
IN
Schmitt-triggered input with hysteresis characteristics
IN
Type 2-U Type 13-R
IN
Note
Schmitt-triggered input with hysteresis characteristics
data
output
disable
IN/OUT
N-ch
V SS
Type 17 Type 18
P-ch
N-ch
P-ch
N-ch
N-ch
N-ch
data OUT
VLC0
VLC1
SEG
VLC2
P-ch
P-ch
P-ch
N-ch
P-ch
N-ch
P-ch
N-ch P-ch
N-ch
data
P-ch N-ch
V LC1
V LC0
V LC2
OUT
COM
Note It is pulled down only during reset.

User’s Manual U18438EJ2V0UD
16
CHAPTER 3 LCD CONTROLLER/DRIVER
3.1 Functions of LCD Controller/Driver
The functions of the LCD controller/driver in the
µ PD71312 are as follows.
(1) The LCD driver reference voltage generator can switch internal voltage boosting, external resistance division,
and internal resistance division.
(2) Automatic output of segment and common signals based on automatic display data memory read
(3) Five different display modes:
• Static
• 1/2 duty (1/2 bias)
• 1/3 duty (1/2 bias)
• 1/3 duty (1/3 bias)
• 1/4 duty (1/3 bias)
(4) Four different frame frequencies, selectable in each display mode
(5) Segment signal outputs: 36 (S0 to S35) (52-pin product),
40 (S0 to S39) (64-pin product)
Common signal outputs: 4 (COM0 to COM3)

CHAPTER 3 LCD CONTROLLER/DRIVER
User’s Manual U18438EJ2V0UD 17
Table 3-1 lists the maximum number of pixels that can be displayed in each display mode.
Table 3-1. Maximum Number of Pixels
(a) 52-pin product
LCD Driver Reference
Voltage Generator
Bias
Mode
Number of
Time Slices
Common Signals Used Number of
Segments
Maximum Number of
Pixels
−Static COM0 (COM1 to COM3) 36 (36 segment signals,
1 common signal)
2 COM0, COM1 72 (36 segment signals,
2 common signals)
• External resistance division
• Internal resistance division
1/2
3 COM0 to COM2
3 COM0 to COM2
108 (36 segment signals,
3 common signals)
• Internal voltage boosting
• External resistance division
• Internal resistance division
1/3
4 COM0 to COM3
36
144 (36 segment signals,
4 common signals)
(b) 64-pin product
LCD Driver Reference
Voltage Generator
Bias
Mode
Number of
Time Slices
Common Signals Used Number of
Segments
Maximum Number of
Pixels
−Static COM0 (COM1 to COM3) 40 (40 segment signals,
1 common signal)
2 COM0, COM1 80 (40 segment signals,
2 common signals)
• External resistance division
• Internal resistance division
1/2
3 COM0 to COM2
3 COM0 to COM2
120 (40 segment signals,
3 common signals)
• Internal voltage boosting
• External resistance division
• Internal resistance division
1/3
4 COM0 to COM3
40
160 (40 segment signals,
4 common signals)

CHAPTER 3 LCD CONTROLLER/DRIVER
User’s Manual U18438EJ2V0UD
18
3.2 Configuration of LCD Controller/Driver
The LCD controller/driver consists of the following hardware.
The LCD controller/driver includes of two blocks: LCDSEG block for controlling segments, and LCDCTL block for
controlling LCD register setting and mode setting.
Table 3-2. Configuration of LCD Controller/Driver
Item Configuration
Display outputs Segment signals: 36 (52-pin product), 40 (64-pin product)
Common signals: 4 (COM0 to COM3)
Display block
(LCDSEG)
36 byte RAM (52-pin product),
40 byte RAM (64-pin product)
LCD
controller/
driver
Control block
(LCDCTL)
LCD mode setting register (LCDMD)
LCD display mode register (LCDM)
LCD clock control register (LCDC)
LCD voltage boost control register 0 (VLCG0)
Figure 3-1. Configuration of LCD Controller/Driver
LCD Controller
LCD Driver
LCDCTL
I
2
C Bus Interface LCDSEG
Microcontroller
SCL
SDA
Reset Input
Clock Input
fLCLK
µPD71312