Nxp semiconductors Rdgd3162i3ph5evb User manual

UM11802

RDGD3162I3PH5EVB three-phase inverter reference design

Rev. 1 — 10 June 2022 User manual

Document information

Information Content

Keywords GD3162, gate, driver, power, inverter, automotive

Abstract The RDGD3162I3PH5EVB three-phase inverter is a functional hardware

power inverter reference design, which can be used as a foundation to

develop a complete ASIL D compliant high voltage, high-power traction motor

inverter for electric vehicles.

NXP Semiconductors UM11802

RDGD3162I3PH5EVB three-phase inverter reference design

Rev Date Description

1 20220610 initial version

Revision history

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NXP Semiconductors UM11802

RDGD3162I3PH5EVB three-phase inverter reference design

1 Important notice

IMPORTANT NOTICE

For engineering development or evaluation purposes only

NXP provides the product under the following conditions:

This evaluation kit is for use of ENGINEERING DEVELOPMENT OR

EVALUATION PURPOSES ONLY. It is provided as a sample IC pre-soldered

to a printed-circuit board to make it easier to access inputs, outputs and

supply terminals. This evaluation board may be used with any development

system or other source of I/O signals by connecting it to the host MCU

computer board via off-the-shelf cables. This evaluation board is not

a Reference Design and is not intended to represent a final design

recommendation for any particular application. Final device in an application

heavily depends on proper printed-circuit board layout and heat sinking

design as well as attention to supply filtering, transient suppression, and I/O

signal quality.

The product provided may not be complete in terms of required design,

marketing, and or manufacturing related protective considerations, including

product safety measures typically found in the end device incorporating the

product. Due to the open construction of the product, it is the responsibility of

the user to take all appropriate precautions for electric discharge. In order to

minimize risks associated with the customers’ applications, adequate design

and operating safeguards must be provided by the customer to minimize

inherent or procedural hazards. For any safety concerns, contact NXP sales

and technical support services.

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RDGD3162I3PH5EVB three-phase inverter reference design

2 RDGD3162I3PH5EVB

Figure 1. RDGD3162I3PH5EVB

3 Introduction

This document is the user guide for the RDGD3162I3PH5EVB reference design.

This document is intended for the engineers involved in the evaluation, design,

implementation, and validation of the GD3162 single-channel gate driver for insulated

gate bipolar transistor (IGBT)/SiC.

The scope of this document is to provide the user with information to evaluate the

GD3162 single channel gate driver for IGBT/SiC. This document covers connecting the

hardware, installing the software and tools, configuring the environment and using the kit.

The RDGD3162I3PH5EVB is a fully functional three-phase inverter evaluation board

populated with six GD3162 gate drivers with fault management and supporting circuitry.

This board supports serial peripheral interface (SPI) daisy chain communication for

programming and communication with three high-side gate drivers and three low-side

gate drivers independently, or all six gate drivers at the same time.

This board has low-voltage isolation and high-voltage isolation with gate drive integrated

galvanic signal isolation. Other supporting features on the board include desaturation

short-circuit detection, IGBT/SiC temperature sensing, onboard isolated flyback supplies,

DC link bus voltage monitoring, phase current sensing, DC link bus current sense, and

motor resolver excitation/processing. See GD3162 data sheet for additional gate drive

features.

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RDGD3162I3PH5EVB three-phase inverter reference design

4 Finding kit resources and information on the NXP website

NXP Semiconductors provides online resources for this reference design and its

supported devices on http://www.nxp.com.

The information page for RDGD3162I3PH5EVB reference design is at http://

www.nxp.com/RDGD3162I3PH5EVB. The information page provides overview

information, documentation, software and tools, parametrics, ordering information

and a Getting Started tab. The Getting Started tab provides quick reference

information applicable to using the RDGD3162I3PH5EVB reference design, including the

downloadable assets referenced in this document.

4.1 Collaborate in the NXP community

The NXP community is for sharing ideas and tips, ask and answer technical questions,

and receive input on just about any embedded design topic.

The NXP community is at http://community.nxp.com.

5 Getting ready

Working with the RDGD3162I3PH5EVB requires kit contents and a Windows PC

workstation with FlexGUI software installed.

5.1 Kit contents

•Assembled and tested RDGD3162I3PH5EVB (three-phase inverter populated with

5.0 V compatible gate driver devices) board in an anti-static bag

•KITGD316xTREVB 3.3 V to 5.0 V translator with FRDM-KL25Z MCU board with micro

USB cable

•Quick start guide

5.2 Additional hardware

In addition to the kit contents, the following hardware is necessary or beneficial when

working with this reference board.

•Microcontroller for SPI communication

•Compatible P6 IGBT or SiC metal-oxide-semiconductor field-effect transistor

(MOSFET) module

•DC link capacitor compatible with HybridPACK drive or P6 IGBT or SiC MOSFET

module

•HV power supply with protection shield and hearing protection

•Current sensors for monitoring each phase current

•12 V, 1.0 A DC power supply

•4-channel oscilloscope with appropriate isolated probes

5.3 Windows PC workstation

This reference design requires a Windows PC workstation. Meeting these minimum

specifications produces great results when working with this evaluation board.

•USB-enabled computer with Windows 8 or Windows 10

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RDGD3162I3PH5EVB three-phase inverter reference design

5.4 Software

Installing software is necessary to work with this reference design. All listed software is

available on the information page at http://www.nxp.com/RDGD3162I3PH5EVB.

•FlexGUI software for using with KITGD316xTREVB MCU/translator board

•S32S Design Studio IDE for power architecture

•Automotive Math and Motor Control Library (AMMCLib)

•FreeMASTER 2.0 runtime debugging tool

•Motor control application tuning (MCAT)

•Example code, GD3162 device driver notes, and GD31xx device driver reference

6 Getting to know the hardware

6.1 RDGD3162I3PH5EVB features

•Capability to perform double pulse and short-circuit tests on phase U using

KITGD316xTREVB and FlexGUI; see phase U schematics and FlexGUI pulse tab

(Figure 24 and Figure 25)

•Evaluation board designed for and populated with GD3162 gate drivers and protection

circuitry

•Capability to connect to HybridPACK drive type SiC specific modules for full

three-phase evaluation and development (see Figure 9 for specific module pin

placement)

•Daisy chain SPI communication × 3 - 2 channel (three high-side gate drivers and three

low-side gate drivers) or × 6 - 1 channel (all six gate drivers)

•Variable flyback VCC power supply with GND reference and variable negative VEE

supply

•Easy access power, ground, and signal test points

•2 × 32 Peripheral Component Interconnect Express (PCIe) socket for interfacing MCU

control (MPC5775B/E-EVB, MPC5777C-DEVB, or MPC57744P); see Figure 26 and

Figure 27

•Optional connection for DC bus voltage and current monitoring

•Phase current feedback connections

•Resolver signal connector

6.2 Kit featured components

6.2.1 Voltage domains, GD3162 pinout, logic header, and IGBT pinout

Low-voltage domain is an externally supplied 12 V DC (VPWR) primary supply for

non-isolated circuits, typically supplied by vehicle battery. A 5 V regulator supplies VDD

to GD3162 gate drive devices. The low-voltage domain includes the interface between

the MCU and GD3162 control registers and logic control.

Low-side driver and high-side driver domains are isolated high-voltage driver control

domains for SiC MOSFET or IGBT single phase connections and control circuits. Pins

on bottom of board are designed to easily connect to a compatible three-phase SiC

MOSFET or IGBT module.

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RDGD3162I3PH5EVB three-phase inverter reference design

Figure 2. RDGD3162I3PH5EVB three-phase inverter board voltage domains and interfaces

6.2.2 GD3162 pinout and MCU interface pinout

See GD3162 advanced IGBT/SiC gate driver data sheet for specific information about

pinout, pin descriptions, specifications, and operating modes. VSUP/VPWR DC supply

terminal is a low-voltage input connection for supplying power to the low-voltage

non-isolated die and related circuitry. Typically supplied by vehicle battery +12 V DC.

MCU connector is a 2 × 32-pin PCIe interface connector for use with either

MPC5775B/E-EVB or MPC5744P or MPC5777C 32-bit MCU board or any other MCU of

preference. An MCU is needed for SPI communication and control of advanced IGBT/SiC

gate drive devices (GD3162).

KITGD316xTREVB included with the kit can be attached to this board at bottom of dual

row header pin interface. All gate drivers can be accessed via SPI control using FlexGUI

software.

Note: Double pulse and short-circuit tests can be conducted on phase U only. See

FlexGUI pulse tab Figure 24 and Figure 25.

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RDGD3162I3PH5EVB three-phase inverter reference design

Figure 3. Gate driver pinout and board interface connection PCIe 2 × 32

Pin Name Function

A1 VDDA voltage reference resolver circuit

A2 GNDA1 analog ground

A3 PH_U_I current feedback phase U

A4 PH_V_I current feedback phase V

A5 PH_W_I current feedback phase W

A6 n.c. not connected

A7 n.c. not connected

A8 SIN_OUT_RSLV sine resolver signal

A9 COS_OUT_RSLV cosine resolver signal

A10 n.c. not connected

A11 GNDA4 analog ground

A12 VCC_PER 5.0 V MCU not connected

Table 1. PCIe connector pin definitions

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RDGD3162I3PH5EVB three-phase inverter reference design

Pin Name Function

A13 GND2 ground

A14 PWMHU pulse width modulation (PWM) high-side phase U

A15 PWMLU pulse width modulation low-side phase U

A16 PWMHV pulse width modulation high-side phase V

A17 PWMLV pulse width modulation low-side phase V

A18 PWMHW pulse width modulation high-side phase W

A19 PWMLW pulse width modulation low-side phase W

A20 GSENLU GD3162 gate strength enable low-side phase U

A21 GSENHU GD3162 gate strength enable high-side phase U

A22 GSENLV GD3162 gate strength enable low-side phase V

A23 GSENHV GD3162 gate strength enable high-side phase V

A24 GSENLW GD3162 gate strength enable low-side phase W

A25 GSENHW GD3162 gate strength enable high-side phase W

A26 INTB_HS GD3162 fault reporting for high-side gate drive devices

A27 INTB_LS GD3162 fault reporting for low-side gate drive devices

A28 INTA_HU GD3162 fault reporting and real-time monitoring high-side phase U

A29 INTA_LU GD3162 fault reporting and real-time monitoring low-side phase U

A30 CSBH chip select bar to high gate drive devices

A31 INTA_HV GD3162 fault reporting and real-time monitoring high-side phase V

A32 INTA_LV GD3162 fault reporting and real-time monitoring low-side phase V

B1 VREF voltage reference from MCU

B2 GNDA2 analog ground

B3 IDC_BUS optional DC bus current measurement from DC bus current filter

B4 VBUS_DIV optional DC bus voltage divider monitoring (not used by default)

B5 n.c. not connected

B6 n.c. not connected

B7 n.c. not connected

B8 SIN_N_OUT_RSLV sine resolver signal

B9 COS_N_OUT_RSLV cosine resolver signal

B10 n.c. not connected

B11 GNDA3 analog ground

B12 MCU_VCC MCU VCC regulator voltage

B13 GND1 ground

B14 AOUTHU GD3162 analog output signal high-side U phase

B15 AOUTLU GD3162 analog output signal low-side U phase

B16 AOUTLV GD3162 analog output signal low-side V phase

Table 1. PCIe connector pin definitions...continued

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NXP Semiconductors UM11802

RDGD3162I3PH5EVB three-phase inverter reference design

Pin Name Function

B17 AOUTHV GD3162 analog output signal high-side V phase

B18 AOUTLW GD3162 analog output signal low-side W phase

B19 RES_REF resolver reference voltage

B20 SW_RUN signal from onboard switch demo mode

B21 MISO_MICRO SPI slave out signal

B22 MOSI_MICRO SPI slave in signal

B23 SCLK SPI clock

B24 CSBL chip select bar to low-side gate drivers

B25 AOUTHW GD3162 analog output signal high-side W phase

B26 INTA_HW GD3162 fault reporting and real-time monitoring high-side phase W

B27 INTA_LW GD3162 fault reporting and real-time monitoring low-side phase W

B28 FSENB fail-safe state enable bar

B29 FSSTATEL fail-safe state low-side

B30 FSSTATEH fail-safe state high-side

B31 VPWR VPWR/VSUP 12 V voltage supply (low-voltage domain)

B32 GNDP ground connection (low-voltage domain)

Table 1. PCIe connector pin definitions...continued

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RDGD3162I3PH5EVB three-phase inverter reference design

6.2.3 Test points

All test points are clearly marked on the board. Figure 4 shows the location of various

test points.

Figure 4. RDGD3162I3PH5EVB test points

Test point name Function

DSTHU DESAT high-side U phase VCE desaturation connected to DESAT pin circuitry

DSTHV DESAT high-side V phase VCE desaturation connected to DESAT pin circuitry

DSTHW DESAT high-side W phase VCE desaturation connected to DESAT pin circuitry

DSTLU DESAT low-side U phase VCE desaturation connected to DESAT pin circuitry

DSTLV DESAT low-side V phase VCE desaturation connected to DESAT pin circuitry

DSTLW DESAT low-side W phase VCE desaturation connected to DESAT pin circuitry

FSISHU FSISO connection high-side U phase

FSISHV FSISO connection high-side V phase

FSISLU FSISO connection low-side U phase

FSISLV FSISO connection low-side V phase

FSISLW FSISO connection low-side W phase

GHU gate high-side U phase which is the charging pin of IGBT gate

GHV gate high-side V phase which is the charging pin of IGBT gate

GHW gate high-side W phase which is the charging pin of IGBT gate

Table 2. Test points

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RDGD3162I3PH5EVB three-phase inverter reference design

Test point name Function

GLU gate low-side U phase which is the charging pin of IGBT gate

GLV gate low-side V phase which is the charging pin of IGBT gate

GLW gate low-side W phase which is the charging pin of IGBT gate

INTA – UVW HS and LS INTA interrupt/real-time reporting output signal test points from each gate driver

Resolver circuit test points for internal signals of resolver circuit (see schematic for more information)

MCU signals signal headers for analyzing all MCU signals (see schematic for signals)

TSNSHU TSENSE high-side U phase connected to negative temperature coefficient (NTC) temperature

sense

TSNSLU TSENSE low-side U phase

VREFLU 5.0 V reference voltage test point low-side U phase

VREFHU 5.0 V reference voltage test point high-side U phase

VREFLV 5.0 V reference voltage test point low-side V phase

VREFHV 5.0 V reference voltage test point high-side V phase

VREFLW 5.0 V reference voltage test point low-side W phase

VREFHW 5.0 V reference voltage test point high-side W phase

VSUP VSUP/VPWR test point low-voltage domain

Table 2. Test points...continued

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RDGD3162I3PH5EVB three-phase inverter reference design

6.2.4 Indicators

The RDGD3162I3PH5EVB contains LEDs as visual indicators on the board.

Figure 5. RDGD3162I3PH5EVB indicator locations

Name Description

INTBL LED indicates that a GD3162 INTB fault interrupt has occurred on the low side

INTBH LED indicates that a GD3162 INTB fault interrupt has occurred on the high side

Table 3. RDGD3162I3PH5EVB indicator descriptions

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RDGD3162I3PH5EVB three-phase inverter reference design

6.2.5 Connectors and jumpers

Figure 6. RDGD3162I3PH5EVB connector and jumper locations

Name Description

J9 solder jumper 1-2 default - DC supply for VSUP to gate drivers supplied through J99

terminal connection

jumper open VSUP supply to gate drivers isolated

J101 jumper 1-2 default master output slave input (MOSI) - normal mode three device daisy

chain three device high side, three device low side (× 3 - 2 channel)

jumper 2-3 MOSI - six device daisy chain all six gate drivers daisy chained together

(× 6 - 1 channel)

J102 jumper 1-2 default master input slave output (MISO) - normal mode three device daisy

chain three device high side, three device low side (× 3 - 2 channel)

jumper 2-3 MISO - six device daisy chain all six gate drivers daisy chained together

(× 6 - 1 channel)

J103 DC bus current measurement connection header

Phase current feedback

connector

current feedback connections from U, V, and W phases

Resolver signals connector resolver excitation signals (see schematic for more information)

MCU signals two-row header of all MCU signals for debug and development (see schematic for details)

PCIe/MCU connector 2 × 32 PCIe connector for easy connection to MPC5777CDEVB or MPC5744P via PCIe

cable (S32SDEV-CON18)

J99 VPWR terminal connector used for external low-voltage power supply connection, typically 12 V VBAT

Table 4. RDGD3162I3PH5EVB connector and jumper descriptions

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RDGD3162I3PH5EVB three-phase inverter reference design

6.2.6 Power supply test points

Figure 7. Power supply test point locations

Name Function

VCCHU high-side phase U VCC voltage test point

isolated positive voltage supply (9.3 V to 25 V)

GNDHU isolated ground high-side phase U

VEEHU negative gate supply voltage high-side phase U

VCCHV high-side phase V VCC voltage test point

isolated positive voltage supply (9.3 V to 25 V)

GNDHV isolated ground high-side phase V

VEEHV negative gate supply voltage high-side phase V

VCCHW high-side phase W VCC voltage test point

isolated positive voltage supply (9.3 V to 25 V)

GNDHW isolated ground high-side phase W

VEEHW negative gate supply voltage high-side phase W

VCCLU low-side phase U VCC voltage test point

isolated positive voltage supply (9.3 V to 25 V)

GNDLU isolated ground low-side phase U

VEELU negative gate supply voltage low-side phase U

VCCLV low-side phase V VCC voltage test point

isolated positive voltage supply (9.3 V to 25 V)

Table 5. Power supply test point descriptions

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RDGD3162I3PH5EVB three-phase inverter reference design

Name Function

GNDLV isolated ground low-side phase V

VEELV negative gate supply voltage low-side phase V

VCCLW low-side phase W VCC voltage test point

isolated positive voltage supply (9.3 V to 25 V)

GNDLW isolated ground low-side phase W

VEELW negative gate supply voltage low-side phase W

VPWR +12 V DC VPWR low voltage positive supply connection

VPWR GND VPWR low voltage supply ground connection (GND1)

Table 5. Power supply test point descriptions...continued

6.2.7 Gate drive resistors

•RGH_1 - gate high resistor in series with the GH_1 pin at the output of the GD3162

high-side driver and IGBT/SiC gate that controls the strong turn on current for IGBT/SiC

gate.

•RGH_2 - gate high resistor in series with the GH_2 pin at the output of the GD3162

high-side driver and IGBT/SiC gate that controls the weak turn on current for IGBT/SiC

gate.

•RGL_1 - gate low resistor in series with the GL_1 pin at the output of the GD3162

low-side driver and IGBT/SiC gate that controls the strong turn off current for IGBT/SiC

gate.

•RGL_2 - gate low resistor in series with the GL_2 pin at the output of the GD3162

low-side driver and IGBT/SiC gate that controls the weak turn off current for IGBT/SiC

gate.

•RAMC - series resistor between IGBT/SiC gate and active Miller clamp (AMC) input pin

of the GD3162 high-side/low-side driver for gate sensing and active Miller clamping.

Figure 8. Gate drive resistors for each phase high side and low side

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RDGD3162I3PH5EVB three-phase inverter reference design

6.2.8 SiC module pin connections

aaa-046433

Ø5.30 ±0.15

22.25 ±0.40

14 ±0.20

(6x)

(

N1 P1 N2 N3

(

)

P3P2

G1 E1

E2 G2

(

)

(

)

(

)

(

)

(

)

(

107

)

(

)

(

)

(16.25)

9.75 ±0.40

5 ±0.40

(82)

87 ±0.40

90.75 ±0.40

(98.25)

4.25 ±0.40

25 ±0.40

14 ±0.20

U V W

(3x)

(20)

(8.30)

(27.33)

(55.30)

(74.67)

(87)

102.30)

(122)

127 ±0.40

16 ±0.2 (3x)

Ø5.50 ±0.1 (3x)

Ø0.6

C6 E6 G6C4 E4 G4

G5 E5G3 E3

CØ1.6

3x (U;V;W)

Ø0.5 D

CØ1.6 A

Ø5.50 ±0.1 (6x)

Ø0.6 F

CØ1.6

6x (N1-N3;P1-P3)

Ø4.50 ±0.15 (8x)

4.30 ±0.15

Figure 9. SiC module pin placement

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RDGD3162I3PH5EVB three-phase inverter reference design

Figure 10. SiC module pin connections

Connection name Pin description

G_HU gate high-side U phase

E_HW emitter/drain connection high-side U phase

COL_HU collector/source connection high-side U phase

NTCU1 NTC temperature sensor connection U phase (high-side TSENSEA)

NTCU2 NTC temperature sensor connection U phase (high-side isolated ground)

G_LU gate low-side U phase

COL_LU collector/source connection low-side U phase

E_LU emitter/drain connection low-side U phase

NTCV1 NTC temperature sensor connection V phase (high-side TSENSEA)

NTCV2 NTC temperature sensor connection V phase (high-side isolated ground)

G_HV gate high-side V phase

COL_HV collector/source connection high-side V phase

E_HV emitter/drain connection high-side V phase

G_LV gate low-side V phase

E_LV emitter/drain connection low-side V phase

COL_LV collector/source connection low-side V phase

NTCW1 NTC temperature sensor connection W phase (high-side TSENSEA)

NTCW2 NTC temperature sensor connection W phase (high-side isolated ground)

G_HW gate high-side W phase

Table 6. SiC module pin connections

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RDGD3162I3PH5EVB three-phase inverter reference design

Connection name Pin description

E_HW emitter/drain connection high-side W phase

COL_HW collector/source connection high-side W phase

G_LW gate low-side W phase

E_LW emitter/drain connection low-side W phase

COL_LW collector/source connection low-side W phase

Table 6. SiC module pin connections...continued

6.3 Kinetis KL25Z Freedom board

The Freedom KL25Z is an ultra low-cost development platform for Kinetis L series MCU

built on Arm Cortex-M0+ processor.

Figure 11. Freedom development platform

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RDGD3162I3PH5EVB three-phase inverter reference design

6.4 3.3 V to 5.0 V translator board

KITGD316xTREVB translator enables level shifting of signals from MCU 3.3 V to 5.0 V

SPI communication.

Figure 12. Translator board

Jumper Position Function

1-2 selects 5.0 V for 5.0 V compatible gate driveVCCSEL (J3)

2-3 selects 3.3 V for 3.3 V compatible gate drive

1-2 selects PWM high-side control from KL25Z MCUPWMH_SEL (J4)

2-3 selects PWM high-side control from fiber optic receiver inputs

1-2 selects PWM low-side control from KL25Z MCUPWML_SEL (J5)

2-3 selects PWM low-side control from fiber optic receiver inputs

Table 7. Translator board jumper definitions

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