NXP Semiconductors Freescale FRDM-KL43Z User manual

NXP Semiconductors
User’s Guide
Document Number: FRDMKL43ZUG
Rev. 1, 05/2020
Contents
© 2020 NXP B.V. 
1 FRDM-KL43Z overview
The Freescale Freedom development platform is a set of
software and hardware tools for evaluation and
development. It is ideal for rapid prototyping of
microcontroller-based applications. The Freescale
Freedom KL43Z hardware, FRDM-KL43Z, is a simple,
yet sophisticated design featuring a Kinetis L series
microcontroller, built on the ARM® Cortex™-M0+
core.
FRDM-KL43Z can be used to evaluate the KL43, KL33,
KL27, and KL17 Kinetis L series devices. It features a
MKL43Z256VLH4 which has a maximum operating
frequency of 48 MHz, 256 KB of flash memory, 32 KB
RAM, 16 KB ROM (with Kinetis bootloader), a
full-speed device USB controller, segment LCD
controller, and many analog and digital peripherals. The
FRDM-KL43Z hardware is form-factor compatible with
the Arduino™ R3 pin layout, providing a broad range of
expansion board options. The on-board interfaces
include a 4-digit segment LCD, a 3-axis digital
1 FRDM-KL43Z overview . . . . . . . . . . . . . . . . . . . . . . . . . 1
2 Reference documents . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
3 Getting started . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
4 FRDM-KL43Z hardware overview . . . . . . . . . . . . . . . . . . 2
5 FRDM-KL43Z hardware description . . . . . . . . . . . . . . . . 4
5.1 Power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
5.2 Serial and debug adapter (OpenSDA). . . . . . . . . . . 6
5.3 MKL43Z256 microcontroller . . . . . . . . . . . . . . . . . . 8
FRDM-KL43Z User’s Guide

FRDM-KL43Z User’s Guide, Rev. 1
2NXP Semiconductors
Reference documents
accelerometer, magnetometer, capacitive touch slider (not directly connected because there is no TSI
module on the chip—only software TSS can be used with GPIO method), and ambient light sensor.
The FRDM-KL43Z features the Freescale open standard embedded serial and debug adapter known as
OpenSDA. This circuit offers several options for serial communications, flash programming, and run-control
debugging.
2 Reference documents
Table 1 provides a list of reference documents for the FRDM-KL43Z hardware. All of these documents
are available online at www.freescale.com/FRDM-KL43Z.
3 Getting started
Refer to the FRDM-KL43Z Quick Start Package for step-by-step instructions for getting started with the
FRDM-KL43Z. See the “Jump Start Your Design” section on http://www.freescale.com/FRDM-KL43Z
for the Quick Start Package and software lab guides.
4 FRDM-KL43Z hardware overview
The features of the FRDM-KL43Z include:
• MKL43Z256VLLZ4 MCU (48 MHz, 256 KB flash memory, 32 KB RAM, 16 KB ROM (with
Kibble), Low power, 64LQFP package)
• Dual role USB interface with mini-B USB connector
• OpenSDA
• Four-digit segment LCD module
• Capacitive touch slider (not directly connected; 0R should be populated)
• Ambient light sensor
• MMA8451Q accelerometer
• MAG3110 Magnetometer (Note that for board revision SPF-28062_C1 and later, the MAG3110 is
no longer available and is not present on the board)
Table 1. FRDM-KL43Z reference documents
File name Description
FRDM-KL43Z Quick Start Package Quick Start Guide and supporting files for getting started with the
FRDM-KL43Z.
FRDM-KL43Z User’s Guide This document—overview and detailed information for the FRDM-KL43Z
hardware.
FRDM-KL43Z Pinouts Spreadsheet of pin connections for all MCU pins. Includes pinout for the I/O
headers, Arduino R3 compatibility chart, and OpenSDA MCU pinout.
FRDM-KL43Z Schematics PDF schematics for the FRDM-KL43Z hardware.
FRDM-KL43Z Design Package Zip file containing all design source files for the FRDM-KL43Z hardware.
OpenSDA User’s Guide Overview and instructions for use of the OpenSDA embedded.

FRDM-KL43Z hardware overview
FRDM-KL43Z User’s Guide, Rev. 1
NXP Semiconductors 3
• 2 user LEDs
• 2 user push buttons
• Flexible power supply options – USB, coin cell battery, external source
• Battery-ready, power-measurement access points
• Easy access to MCU I/O via Arduino R3 compatible I/O connectors
• Programmable OpenSDA debug interface with multiple applications available including:
— Mass storage device flash programming interface
— P&E Debug interface provides run-control debugging and compatibility with IDE tools
— CMSIS-DAP interface: new ARM standard for embedded debug interface
— Data logging application
•Arduino R3 compatibility
Figure 1 shows a block diagram of the FRDM-KL43Z design. The primary components and their
placement on the hardware assembly are pointed out in Figure 2.
Figure 1. FRDM-KL43Z block diagram
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FRDM-KL43Z hardware description
Figure 2. FRDM-KL43Z main components placement.
5 FRDM-KL43Z hardware description
5.1 Power supply
There are multiple power supply options on the FRDM-KL43Z. It can be powered from either of the USB
connectors, the VIN pin on the I/O header, an on-board coin cell battery, or an off-board 1.71–3.6 V supply from
the 3.3 V pin on the I/O header. The USB and VIN supplies are regulated on-board using a 3.3 V linear regulator
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FRDM-KL43Z hardware description
FRDM-KL43Z User’s Guide, Rev. 1
NXP Semiconductors 5
to produce the main power supply. The other two sources are not regulated on-board. Table 2 provides the
operational details and requirements for the power supplies.
Note that the OpenSDA circuit is only operational when a USB cable is connected and is supplying power
to OpenSDA USB. However, protection circuitry is in place to allow multiple sources to be powered at
once.
Figure 3. Power supply schematic
Table 2. FRDM-KL43 power requirements
Supply source Valid range OpenSDA operational? Regulated
on-board?
OpenSDA USB 5 V Yes Yes
KL43 USB 5 V No Yes
VIN Pin 4.3–9 V No Yes
3.3 V Pin 1.71–3.6 V No No
Coin cell battery 1.71–3.6 V No No

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FRDM-KL43Z hardware description
5.2 Serial and debug adapter (OpenSDA)
OpenSDA is an open-standard serial and debug adapter. It bridges serial and debug communications
between a USB host and an embedded target processor as shown in Figure 4. The hardware circuit is based
on a Freescale Kinetis K20 family microcontroller (MCU) with 128 KB of embedded flash and an
integrated USB controller. OpenSDA features a mass storage device (MSD) bootloader, which provides a
quick and easy mechanism for loading different OpenSDA applications such as flash programmers,
Table 3. FRDM-KL43Z power supplies
Power supply name Description
P5-9V_VIN Power supplied from the VIN pin of the I/O headers (J3 pin 16).
P5V_SDA Power supplied from the OpenSDA USB connector A Schottky diode provides
back drive protection.
P5V_KL43Z Power supplied from the KL43Z USB connector A Schottky diode provides back
drive protection.
P3V3_VREG Regulated 3.3 V supply. Sources power to the P3V3 supply rail through a back
drive protection Schottky diode.1
1By default the linear regulator, U1, is a 3.3 V output regulator. However, this is a common footprint that would
allow the user to modify the assembly to utilize an alternative device such as a 1.8 V or 2.5 V regulator. The
KL43 microcontroller has an operating range of 1.71 V to 3.6 V.
P3V3_BATT Coin cell battery supply voltage. Sources power to the P3V3 supply rail through
a back drive protection Schottky diode.
P3V3 Main supply rail for FRDM-KL43Z assembly. May be sourced from P3V3_VREG,
P3V3_BATT, or directly from the I/O headers (J3 pin 8).
P3V3_KL43Z KL43Z MCU supply. Header J17 provides a convenient means for energy
consumption measurements.2,3
2J17 and J9 are not populated by default. The two pins of these headers are shorted together by a trace on
the bottom layer of the PCB. To measure the energy consumption of either the KL43 or the OpenSDA MCU,
the trace between these pins must first be cut. A current probe or a shunt resistor and voltage meter can then
be applied to measure the energy consumption on these rails.
3J20 is not populated by default. The two pins of this header are shorted together by a trace on the bottom
layer of the PCB. To measure the energy consumption of digital part of KL43, the trace between these pins
must first be cut. A current probe or a shunt resistor and voltage meter can then be applied to measure the
energy consumption on these rails.
P3V3_SDA OpenSDA circuit supply. Header J9 provides a convenient means for energy
consumption measurements.2
P5V_USB Nominal 5 V supplied to the I/O headers (J3 pin 10). Sourced from either the
P5V_KL43Z or P5V_SDA supply through a back drive protection Schottky diode.

FRDM-KL43Z hardware description
FRDM-KL43Z User’s Guide, Rev. 1
NXP Semiconductors 7
run-control debug interfaces, serial-to-USB converters, and more. Refer to the OpenSDA User’s Guide for
more details.
Figure 4. OpenSDA high-level block diagram
OpenSDA is managed by a Kinetis K20 MCU built on the ARM® Cortex™-M4 core. The OpenSDA
circuit includes a status LED (D8) and a push button (SW2). The push button asserts the Reset signal to
the KL43 target MCU. It can also be used to place the OpenSDA circuit into Bootloader mode. SPI and
GPIO signals provide an interface to either the SWD debug port of the K20. Additionally, signal
connections are available to implement a UART serial channel. The OpenSDA circuit receives power
when the USB connector J13 is plugged into a USB host.
5.2.1 Debug interface
Signals with SPI and GPIO capability are used to connect directly to the SWD of the KL43. These signals
are also brought out to a standard 10-pin (0.05”) Cortex Debug connector (J11). It is possible to isolate the
KL43 MCU from the OpenSDA circuit and use J11 to connect to an off-board MCU. To accomplish this,
cut the trace on the bottom side of the PCB that connects J18 pin 2 to J11 pin 2. This will disconnect the
SWD_CLK pin to the KL43 so that it will not interfere with the communications to an off-board MCU
connected to J11.
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FRDM-KL43Z User’s Guide, Rev. 1
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FRDM-KL43Z hardware description
Figure 5. SWD debug connector
Note that J11 is not-populated by default. A Samtec FTSH-105-02-F-D or compatible connector can be
added to the J11 through-hole connector. A mating cable, such as a Samtec FFSD IDC cable, can then be
used to connect from the OpenSDA of the FRDM-KL43Z to an off-board SWD connector.
5.2.2 Virtual serial port
A serial port connection is available between the OpenSDA MCU and pins PTA1 and PTA2 of the KL43.
Several of the default OpenSDA applications provided by Freescale, including the MSD flash programmer
and the P&E debug application, provide a USB Communications Device Class (CDC) interface that
bridges serial communications between the USB host and this serial interface on the K20.
5.3 MKL43Z256 microcontroller
The target microcontroller of the FRDM-KL43Z is the KL432Z256VLH4, a Kinetis L series device in a
64 LQFP package. The KL43Z MCU features include:
• 32-bit ARM Cortex-M0+ core
— up to 48 MHz operation
— Single-cycle fast I/O access port
•Memories
— 256 KB flash memory
—32KBSRAM
— 16 K ROM (with Kinetis bootloader Kibble included)
• System integration
— Power management and mode controllers
— Low-leakage wakeup unit
J21

FRDM-KL43Z hardware description
FRDM-KL43Z User’s Guide, Rev. 1
NXP Semiconductors 9
— Bit manipulation engine for read-modify-write peripheral operations
— Direct memory access (DMA) controller
— Computer operating properly (COP) Watchdog timer
•Clocks
— Clock generation module with high frequency internal reference clock (HIRC) 48 MHz, and
two low frequency internal reference clocks (LIRC) 2 MHz and 8 MHz, for system and CPU
clock generation
— System oscillator supporting external crystal or resonator
— Low-power 1 kHz RC oscillator for RTC and COP watchdog
• Analog peripherals
— 16-bit SAR ADC w/ DMA support
— 12-bit DAC w/ DMA support
— High-speed analog comparator containing a 6-bit DAC and programmable reference input
— VREF 1.2 V voltage reference
• Communication peripherals
— One Integrated Interchip Sound (I2S) Audio Interface (SAI)
— Two 8-bit Serial Peripheral Interfaces (SPI)
— USB FS device controller
— USB voltage regulator
—TwoI
2C modules
— Two low-power UART modules (LPUART)
— One UART with ISO7816 module
— One FlexIO module (with 8 pins/4 shifters/4 timers implemented)
•Timers
— One 6-channel Timer/PWM module
— Two 2-channel Timer/PWM modules
— 2-channel Periodic Interrupt Timer (PIT)
— Real time clock (RTC)
— Low-power Timer (LPT)
— System tick timer
• Human-Machine Interfaces (HMI)
— Segment LCD controller — maximum segment is 828/432
— General purpose input/output controller
5.3.1 Clock source
The Kinetis KL43 microcontrollers feature an on-chip oscillator compatible with three ranges of input
crystal or resonator frequencies: 32–40 kHz (low frequency mode), 3–8 MHz (high frequency mode, low

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FRDM-KL43Z hardware description
range) and 8–32 MHz (high frequency mode, high range). The KL43Z256 on the FRDM-KL43Z can be
clocked from 32 kHz external crystal.
5.3.2 USB interface
The Kinetis KL43 microcontrollers feature full speed device USB controller (with crystal-less feature).
The USB interface on the FRDM-KL43Z is configured as a full-speed USB device. VREGIN must be
powered to enable the internal circuitry of USB (by jumper J7).
5.3.3 Serial port
The primary serial port interface signals are PTA1 LPUART0 RX and PTA2 LPUART0 TX. These signals
are connected via the OpenSDA.
5.3.4 Reset
The RESET signal on the K20 is connected externally to a push button, SW2, and also to the OpenSDA
circuit. The reset button can be used to force an external reset event in the target MCU. The reset button
can also be used to force the OpenSDA circuit into bootloader mode. Please refer to Section 5.2, “Serial
and debug adapter (OpenSDA), for more details.
5.3.5 Debug
The sole debug interface on all Kinetis L series devices is a Serial Wire Debug (SWD) port. The primary
controller of this interface on the FRDM-KL43Z is the onboard OpenSDA circuit (see Section 5.2, “Serial
and debug adapter (OpenSDA)). However, an unpopulated 10-pin (0.05”) Cortex Debug connector, J11,
provides access to the SWD signals. The Samtec FTSH-105-02-F-D or compatible connectors can be
added to the J11 through-hole debug connector to allow for an external debug cable to be connected.
5.3.6 Segment LCD
FRDM-KL43Z uses a 4–digit display (LUMEX LCD-S401M16KR) 48 segments. The following table shows
connection from KL43 to s401 display.
Table 4. sLCD connections
s401 pin KL43 LCD Pin
1 LCD_P59 (COM0)
2 LCD_P60 (COM1)
3 LCD_P14 (COM2)
4 LCD_P15 (COM3)
5 LCD_P20 (1D/1E/1G/1F)
6 LCD_P24 (DP1/1C/1B/1A)
7 LCD_P26 (2D/2E/2G/2F)