Philips Logic level TOPFET PIP3119-P User manual

Philips Semiconductors Product specification
Logic level TOPFET PIP3119-P
DESCRIPTION QUICK REFERENCE DATA
Monolithic temperature and SYMBOL PARAMETER MAX. UNIT
overload protected logic level power
MOSFET in TOPFET2 technology VDS Continuous drain source voltage 50 V
assembled in a 3 pin plastic IDContinuous drain current 20 A
package. PDTotal power dissipation 90 W
TjContinuous junction temperature 150 ˚C
APPLICATIONS RDS(ON) Drain-source on-state resistance 28 mΩ
General purpose switch for driving IISL Input supply current VIS = 5 V 650 µA
lamps
motors
solenoids
heaters
FEATURES FUNCTIONAL BLOCK DIAGRAM
TrenchMOS output stage
Current limiting
Overload protection
Overtemperature protection
Protection latched reset by input
5 V logic compatible input level
Control of output stage and
supply of overload protection
circuits derived from input
Low operating input current
permits direct drive by
micro-controller
ESD protection on all pins
Overvoltage clamping for turn
off of inductive loads
Fig.1. Elements of the TOPFET.
PINNING - SOT78B PIN CONFIGURATION SYMBOL
PIN DESCRIPTION
1 input
2 drain
3 source
tab drain
DRAIN
SOURCE
INPUT RIG
LOGIC AND
PROTECTION
O / V
CLAMP POWER
MOSFET
123
MBL292
Front view
mb mb
P
D
S
I
TOPFET
May 2001 1 Rev 1.000

Philips Semiconductors Product specification
Logic level TOPFET PIP3119-P
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDS Continuous drain source voltage1-50V
IDContinuous drain current VIS = 5 V; Tmb =25˚C - self - A
limited
IDContinuous drain current VIS = 5 V; Tmb ≤121˚C - 20 A
IIContinuous input current -5 5 mA
IIRM Repetitive peak input current δ≤0.1, tp = 300 µs -50 50 mA
PDTotal power dissipation Tmb ≤25˚C - 90 W
Tstg Storage temperature -55 175 ˚C
TjContinuous junction temperature2normal operation - 150 ˚C
Tsold Lead temperature during soldering - 260 ˚C
ESD LIMITING VALUE
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCElectrostatic discharge capacitor Human body model; - 2 kV
voltage C = 250 pF; R = 1.5 kΩ
OVERVOLTAGE CLAMPING LIMITING VALUES
At a drain source voltage above 50 V the power MOSFET is actively turned on to clamp overvoltage transients.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Inductive load turn-off IDM = 20 A; VDD ≤20 V
EDSM Non-repetitive clamping energy Tmb ≤25˚C - 350 mJ
EDRM Repetitive clamping energy Tmb ≤95˚C; f = 250 Hz - 45 mJ
OVERLOAD PROTECTION LIMITING VALUE
With an adequate protection supply provided via the input pin, TOPFET can protect itself from two types of overload
- overtemperature and short circuit load.
SYMBOL PARAMETER REQUIRED CONDITION MIN. MAX. UNIT
VDS Drain source voltage34 V ≤VIS ≤5.5 V 0 35 V
THERMAL CHARACTERISTIC
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Thermal resistance
Rth j-mb Junction to mounting base - - 1.25 1.39 K/W
1 Prior to the onset of overvoltage clamping. For voltages above this value, safe operation is limited by the overvoltage clamping energy.
2 A higher Tjis allowed as an overload condition but at the threshold Tj(TO) the over temperature trip operates to protect the switch.
3 All control logic and protection functions are disabled during conduction of the source drain diode.
May 2001 2 Rev 1.000

Philips Semiconductors Product specification
Logic level TOPFET PIP3119-P
OUTPUT CHARACTERISTICS
Limits are for -40˚C ≤Tmb ≤150˚C; typicals are for Tmb = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Off-state VIS = 0 V
V(CL)DSS Drain-source clamping voltage ID= 10 mA 50 - - V
IDM = 4 A; tp≤300 µs; δ≤0.01 50 60 70 V
IDSS Drain source leakage current VDS = 40 V - - 100 µA
Tmb = 25˚C - 0.1 10 µA
On-state VIS ≥4.4 V; tp≤300 µs; δ≤0.01
RDS(ON) Drain-source resistance IDM = 10 A - - 52 mΩ
Tmb = 25˚C - 22 28 mΩ
OVERLOAD CHARACTERISTICS
VIS = 5 V; Tmb = 25˚C unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Short circuit load
IDDrain current limiting VDS = 13 V 28.5 43 57 A
4.4 V ≤VIS ≤5.5 V; 21 - 65 A
-40˚C ≤Tmb ≤150˚C
Overload protection
PD(TO) Overload power threshold device trips if PD> PD(TO) 75 185 250 W
TDSC Characteristic time which determines trip time1200 380 600 µs
Overtemperature protection
Tj(TO) Threshold junction 150 170 - ˚C
temperature2
1 Trip time td sc varies with overload dissipation PDaccording to the formula td sc ≈TDSC / ln[ PD/ PD(TO)].
2 This is independent of the dV/dt of input voltage VIS.
May 2001 3 Rev 1.000

Philips Semiconductors Product specification
Logic level TOPFET PIP3119-P
INPUT CHARACTERISTICS
The supply for the logic and overload protection is taken from the input.
Limits are for -40˚C ≤Tmb ≤150˚C; typicals are for Tmb = 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VIS(TO) Input threshold voltage VDS = 5 V; ID= 1 mA 0.6 - 2.4 V
Tmb = 25˚C 1.1 1.6 2.1 V
IIS Input supply current normal operation; VIS = 5 V 100 220 400 µA
VIS = 4 V 80 195 330 µA
IISL Input supply current protection latched; VIS = 5 V 200 400 650 µA
VIS = 3 V 130 250 430 µA
VISR Protection reset voltage1reset time tr≥100 µs 1.5 2 2.9 V
tlr Latch reset time VIS1 = 5 V, VIS2 < 1 V 10 40 100 µs
V(CL)IS Input clamping voltage II= 1.5 mA 5.5 - 8.5 V
RIG Input series resistance2Tmb = 25˚C- 33 - kΩ
to gate of power MOSFET
SWITCHING CHARACTERISTICS
Tmb = 25˚C; VDD = 13 V; resistive load RL= 4 Ω. Refer to waveform figure and test circuit.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
td on Turn-on delay time VIS = 5 V - 25 50 µs
trRise time - 50 100 µs
td off Turn-off delay time VIS = 0 V - 60 120 µs
tfFall time - 50 100 µs
1 The input voltage below which the overload protection circuits will be reset.
2 Not directly measureable from device terminals.
May 2001 4 Rev 1.000

Philips Semiconductors Product specification
Logic level TOPFET PIP3119-P
MECHANICAL DATA
Fig.2. SOT78B (TO220AB) package1, pin 2 connected to mounting base.
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
SOT78B
D
D1
q
L
123
L1
b1
ee
b(1)
0 5 10 mm
scale
Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-leads SOT78B
DIMENSIONS (mm are the original dimensions)
A
E
A1
c
Notes
1. The positional accuracy of the terminals is controlled within zone L1max.
2. Mounting base configuration is not defined within the dimensions E and D
Q
L2
UNIT A1b1D1e∅ p
mm 2.54
qQ
Ab(1) D
cL2
max.
3.0 3.8
3.6 4.3 4.1
15.0
13.5 3.30 2.79 3.0 2.7 2.6 2.2
w
0.4
0.7
0.4 15.8 15.2
0.85
0.60 1.3 1.0
4.5
4.1 1.39 1.27 6.4 5.9 10.3 9.7
L1p1
EL
01-02-22
mounting
base
(2)
wM
∅p
p1
1 Refer to mounting instructions for SOT78 (TO220) envelopes. Epoxy meets UL94 V0 at 1/8". Net mass: 2 g
May 2001 5 Rev 1.000

Philips Semiconductors Product specification
Logic level TOPFET PIP3119-P
DEFINITIONS
DATA SHEET STATUS
DATA SHEET PRODUCT DEFINITIONS
STATUS1STATUS2
Objective data Development This data sheet contains data from the objective specification for
product development. Philips Semiconductors reserves the right to
change the specification in any manner without notice
Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in ordere to improve the design and supply the best possible
product
Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in
order to improve the design, manufacturing and supply. Changes will
be communicated according to the Customer Product/Process
Change Notification (CPCN) procedure SNW-SQ-650A
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 2001
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
1 Please consult the most recently issued datasheet before initiating or completing a design.
2 The product status of the device(s) described in this datasheet may have changed since this datasheet was published. The latest information is
available on the Internet at URL http://www.semiconductors.philips.com.
May 2001 6 Rev 1.000