Philips TDA8001 User manual

DATA SHEET
Product specification
Supersedes data of 1995 Feb 01
File under Integrated Circuits, IC02
1996 Dec 12
INTEGRATED CIRCUITS
TDA8001
Smart card interface

1996 Dec 12 2
Philips Semiconductors Product specification
Smart card interface TDA8001
FEATURES
•Protected I/O line
•VCC regulation (5 V ±5%, 100 mA max. with controlled
rise and fall times)
•VPP generation (12.5, 15 or 21 V ±2.5%, 50 mA max.,
with controlled rise and fall times) (only at TDA8001 and
TDA8001T)
•Clock generation (up to 10 MHz), with synchronous
frequency doubling
•Overload, thermal and card extraction protections
•Current limitation in case of short-circuit
•Idle mode and special circuitry for spikes killing during
powering on and off
•Two voltage supervisors (digital and analog supplies)
•Automatic activation and deactivation sequences
through an independent internal clock
•Enhanced ESD protections on card side (4 kV min.)
•Easy chaining for multiple card readers
•ISO 7816 compatibility.
APPLICATIONS
•Pay TV (multistandards conditional access system,
videoguard, newscript)
•Multi-application smart card readers (banking, vending
machine, electronic payment identification).
GENERAL DESCRIPTION
The TDA8001 is a complete, low-cost analog interface
which can be positioned between an asynchronous smart
card (ISO 7816) and a microcontroller. It is directly
compatible with the new Datacom chip verifier.
The complete supply, protection and control functions are
realized with only a few external components, making this
product very attractive for consumer applications
(see Chapter “Application information”).
ORDERING INFORMATION
TYPE
NUMBER PACKAGE
NAME DESCRIPTION VERSION
TDA8001;
TDA8001A DIP28 plastic dual in-line package; 28 leads (600 mil) SOT117-1
TDA8001T;
TDA8001AT SO28 plastic small outline package; 28 leads; body width 7.5 mm SOT136-1

1996 Dec 12 3
Philips Semiconductors Product specification
Smart card interface TDA8001
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
VDD supply voltage 6.7 −18 V
IDD supply current idle mode; VDD =12V −32 −mA
active modes; unloaded −45 −mA
Vth2 threshold voltage on VSUP 4.5 −4.72 V
Vth4 threshold voltage on VDD 6−6.5 V
VCC card supply voltage including static and dynamic
loads on 100 nF capacitor 4.75 5.0 5.25 V
ICC card supply current operating −−−100 mA
detection −−150 −mA
limitation −−−200 mA
VHhigh voltage supply for
VPP
−−30 V
VPP card programming
voltage (only at TDA8001
and TDA8001T)
(P = 5, 12.5, 15 and 21 V)
including static and dynamic
loads on 100 nF capacitor P−2.5% −P + 2.5% V
IPP programming current
(read or write mode) operating −−−50 mA
detection −−75 −mA
limitation −−−100 mA
SR slew rate on VCC and VPP
(rise and fall) maximum load capacitor 150 nF −0.38 −V/µs
tde deactivation cycle duration 75 100 125 µs
fclk clock frequency 0 −8 MHz
Ptot continuous total power
dissipation TDA8001; Tamb = +70 °C; see Fig.10 −−0.92 W
TDA8001T; Tamb = +70 °C;
see Fig.11 −−2W
T
amb operating ambient
temperature 0−+70 °C

1996 Dec 12 4
Philips Semiconductors Product specification
Smart card interface TDA8001
BLOCK DIAGRAM
Fig.1 Block diagram.
handbook, full pagewidth
MBH813
PROTECTIONS
AND
ENABLE
MAIN
SUPPLY
VOLTAGE
SUPERVISOR
INTERNAL
CLOCK
LOGIC
VCC
GENERATOR
CLOCK
ENABLE
CLOCK
CIRCUITRY
23
24
2
20
19
26
28
18
17
15 16 13 12
6
7
111
14
8
9
4
22
3
VPP
GENERATOR 10
5
OSCILLATOR
PROTECTIONS
XTAL
I/O
RST
CLK
VPP12.5
VPP15 21
VPP21
PRES
PRES
VPP
VDD
VCC
VH
GND1
I/O(µC)
RSTIN
CMD3.5
GND2
CVNC
27
25
CMDVCC
CLKOUT2
CMD7
DETECT
OFF
ALARM
ALARM
DELAY
VSUP
TDA8001

1996 Dec 12 5
Philips Semiconductors Product specification
Smart card interface TDA8001
PINNING
SYMBOL PIN DESCRIPTION
TDA8001
TDA8001T TDA8001A TDA8001AT
XTAL 1 1 crystal connection
DETECT 2 2 card extraction open collector output (active LOW)
I/O 3 3 data line to/from the card
RST 4 4 card reset output
CLK 5 5 clock output to the card
VPP12.5 6 −control input for applying the 12.5 V programming voltage (active LOW)
n.c. −6 not connected
VPP15 7 −control input for applying the 15 V programming voltage (active LOW)
n.c. −7 not connected
PRES 8 8 card presence contact input (active LOW)
PRES 9 9 card presence contact input (active HIGH)
VPP 10 −card programming voltage output
n.c. −10 not connected
VH11 11 HIGH voltage supply for VPP generation
GND1 12 12 ground 1
VDD 13 13 positive supply voltage
VCC 14 14 card supply output voltage
VSUP 15 15 voltage supervisor input
DELAY 16 16 external capacitor connection for delayed reset timing
ALARM 17 17 open-collector reset output for the microcontroller (active HIGH)
ALARM 18 18 open-collector reset output for the microcontroller (active LOW)
OFF 19 19 open-collector interrupt output to the microcontroller (active LOW)
CMDVCC 20 20 control input for applying supply voltage to the card (active LOW)
VPP21 21 −control input for applying the 21 V programming voltage (active LOW)
n.c. −21 not connected
CVNC 22 22 internally generated 5 V reference, present when VDD is on; to be
decoupled externally (100 nF)
CMD3.5
or CDMTC 23 23 control input for having the crystal frequency divided-by-4 at pin CLK
CLKOUT2 24 24 clock output to the microcontroller, or any other R4590
(crystal frequency divided by two)
GND2 25 25 ground 2
RSTIN 26 26 card reset input from the microcontroller (active HIGH)
CMD7
or CDMS 27 27 control input for having the crystal frequency divided by 2 at pin CLK
I/O(µC) 28 28 data line to/from the microcontroller

1996 Dec 12 6
Philips Semiconductors Product specification
Smart card interface TDA8001
Fig.2 Pin configuration.
handbook, halfpage
TDA8001
TDA8001T
MBH811
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
XTAL
DETECT
I/O
RST
CLK
VPP12.5
VPP15
PRES
PRES
VPP
VDD
VCC
VH
GND1
I/O(µC)
CMD7 or CDMS
RSTIN
GND2
CLKOUT2
CMD3.5 or CDMTC
CVNC
VPP21
CMDVCC
OFF
ALARM
ALARM
DELAY
VSUP
Fig.3 Pin configuration.
handbook, halfpage
TDA8001A
TDA8001AT
MBH812
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
XTAL
DETECT
I/O
RST
CLK
n.c.
n.c.
PRES
PRES
n.c.
VDD
VCC
VH
GND1
I/O(µC)
CMD7 or CDMS
RSTIN
GND2
CLKOUT2
CMD3.5 or CDMTC
CVNC
n.c.
CMDVCC
OFF
ALARM
ALARM
DELAY
VSUP

1996 Dec 12 7
Philips Semiconductors Product specification
Smart card interface TDA8001
FUNCTIONAL DESCRIPTION
Power supply
The circuit operates within a supply voltage range of
6.7 to 18 V. VDD and GND are the supply pins. All card
contacts remain inactive during power up or down.
POWER UP
The logic part is powered first and is in the reset condition
until VDD reaches Vth1. The sequencer is blocked until VDD
reaches Vth4 +V
hys4.
POWER DOWN
When VDD falls below Vth4, an automatic deactivation of
the contacts is performed.
Voltage supervisor
This block surveys the 5 V supply of the microcontroller
(VSUP)inordertodeliveradefinedresetpulseandtoavoid
any transients on card contacts during power up or down
ofVSUP.Thevoltage supervisor remains active evenifVDD
is powered-down.
POWER ON
As long as VSUP is below Vth2 +V
hys2 the capacitor CDEL,
connected to pin DELAY, will be discharged. When VSUP
rises to the threshold level, CDEL will be recharged.
ALARM and ALARM remain active, and the sequencer is
blocked until the voltage on the DELAY line reaches Vth3.
POWER DOWN (see Fig.4)
If VSUP falls below Vth2, CDEL will be discharged, ALARM
andALARMbecomeactive,andanautomaticdeactivation
of the contacts is performed.
Clock circuitry (see Fig.5)
The clock signal (CLK) can be applied to the card in two
different methods:
1. Generation by a crystal oscillator: the crystal, or the
ceramic resonator (4 to 16 MHz) is connected to the
XTAL pin.
2. Use of a signal frequency (up to 20 MHz), already
present in the system and connected to the XTAL pin
via a 10 nF capacitor (see Fig.14). In both cases the
frequency is first divided-by-two.
If CMD7 (respectively CMD3.5) is LOW, the clock signal
(its frequency again divided by two) is enabled and
buffered before being fed to the CLK pin.
CMD3.5 and internal ENRST are sampled in order to give
the first clock pulse the correct width, and to avoid false
pulses during frequency change.
The CLKOUT2 pins may be used to clock a
microcontroller or an other TDA8001. The signal 1⁄2fxtal is
available when the circuit is powered up.
State diagram
Once activated, the circuit has six possible modes of
operation:
•Idle
•Activation
•Read
•Write
•Deactivation
•Fault.
Figure 6 shows the way these modes are accessible.
IDLE MODE
After reset, the circuit enters the IDLE state. A minimum
number of circuits are active while waiting for the
microcontroller to start a session.
•All card contacts are inactive
•I/O(µC) is high impedance
•Voltage generators are stopped
•Oscillator or XTAL input is running, delivering CLKOUT2
•Voltage supervisors are active.
The DETECT line is HIGH if a card is present (PRES and
PRES active) and LOW if a card is not present. The OFF
line is HIGH if no hardware problem is detected.
ACTIVATION SEQUENCE
From the IDLE mode, the circuit enters the ACTIVATION
mode when the microcontroller sets the CMDVCC line
(active LOW). The I/O(µC) signal must not be LOW.
The internal circuitry is activated, the internal clock starts
and the sequence according to ISO7816 is performed:
•VCC rises from 0 to 5 V
•VPP rises from 0 to 5 V and I/O is enabled
•CLK and RST are enabled.
The time interval between steps 1 and 2 is 16 µs, and
64 µs between steps 2 and 3 (see Fig.7).

1996 Dec 12 8
Philips Semiconductors Product specification
Smart card interface TDA8001
READ MODE
When the activation sequence is completed and, after the
card has replied its Answer-to-Reset, the TDA8001 will be
in the READ mode. Data is exchanged between the card
and the microcontroller via the I/O line.
WRITE MODE
Cards with EPROM memory need a programming voltage
(VPP). When it is required to write to the internal memory
of the card, the microcontroller sets one of the VPP12.5,
VPP15 and VPP21 lines LOW, according to the
programming value given in the Answer-to-Reset.
VPP rises from 5 V to the selected value with a typical slew
rate of 0.38 V/µs. In order to respect the ISO 7816 slopes,
the circuit generates VPP by charging and discharging an
internal capacitor. The voltage on this capacitor is then
amplified by a power stage gain of 5, powered via an
external supply pin VH(30 V max).
DEACTIVATION SEQUENCE (see Fig.8)
When the session is completed, the microcontroller sets
the CMDVCC line to its HIGH state. The circuit then
executes an automatic deactivation sequence by counting
the sequencer back:
•RST falls to LOW and CLK is stopped
•I/O(µC) becomes high impedance and VPP falls to 0 V
•VCC falls to 0 V.
The circuit returns to the IDLE mode on the next rising
edge of the clock.
PROTECTIONS
Main fault conditions are monitored by the circuit:
•Short-circuit or overcurrent on VCC
•Short-circuit or overcurrent on VPP
•Card extraction during transaction
•Overheating problem
•VSUP drop-out
•VDD drop-out.
When one of these fault conditions is detected, the circuit
pulls the interrupt line OFF to its active LOW state and
returnstotheFAULT mode. The current on I/O isinternally
limited to 5 mA.
FAULT MODE (see Fig.9)
When a fault condition is written to the microcontroller via
the OFF line, the circuit initiates a deactivation sequence.
After the deactivation sequence has been completed, the
OFF line is reset to its HIGH state after the microcontroller
has reset the CMDVCC line HIGH.
Fig.4 Alarm and delay as a function of VSUP (CDEL fixes the pulse width).
handbook, full pagewidth
MGG818
VSUP
Vth2 +Vhys2
Vth2
Vth3
td
VDELAY
ALARM

1996 Dec 12 9
Philips Semiconductors Product specification
Smart card interface TDA8001
handbook, full pagewidth
MGG827
QB
QC
QD
ENCLK
QF
CLK
D
CK
CMD7 or CDMS = Z Z 1 1 0 0
CMD3.5 or CDMTC = 1 0 1 0 1 0
CLK = 2 4 0 4 24
Q
QCLK
D
CK
Q
Q
D
QI
QH
QD
QG QA
QAA
QF
QB
QBA
QCA
QC
QE
ENCLK
1/2 CLKOUT
XTAL
CK
Q
Q
S
CDMTC S
S
CDMS S
Fig.5 Clock circuitry.

1996 Dec 12 10
Philips Semiconductors Product specification
Smart card interface TDA8001
Fig.6 State diagram.
handbook, full pagewidth
MGG820
FAULT READWRITEPDOWN IDLE
ACTIVATION
DEACTIVATION
Fig.7 Activation sequence.
handbook, full pagewidth
MGG828
t2tact
OFF
01 32
PRES
DETECT
CMDVCC
VEILLE
(INTERNAL)
INTERNAL
CLOCK
VCC
I/O
VPP
CMD3.5
CLK
ENRST
(INTERNAL)
RSTIN
RST

1996 Dec 12 11
Philips Semiconductors Product specification
Smart card interface TDA8001
Fig.8 Deactivation sequence.
handbook, full pagewidth
MGG829
tde
CMDVCC
3012
VEILLE
(INTERNAL)
VCC
I/O
VPP
CMD3.5
CLK
ENRST
(INTERNAL)
RSTIN
RST
INTERNAL
CLOCK
Fig.9 Deactivation after a card extraction during write mode.
handbook, full pagewidth
MGG830
tde
PRES
3012
DETECT
VCC
VPP
I/O
VEILLE
(INTERNAL)
ENRST
(INTERNAL)
CLK
RSTIN
RST
CMD3.5
CMDVCC
INTERNAL
CLOCK

1996 Dec 12 12
Philips Semiconductors Product specification
Smart card interface TDA8001
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
Note
1. Ptot =V
DD ×(IDD(unloaded) +∑Isignals)+I CC ×(VDD −VCC) + max.{(VH−VPP)×IPP(read) +(V H−V PP)×IPP(write)}
+V
H×I H(unloaded) +V SUP ×ISUP +(V DD −CVNC) ×ICVNC, where ‘signals’ means all signal pins, except supply pins.
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VDD supply voltage −0.3 18 V
Vx1 voltage on pins VPP21, VPP15, VPP12.5, PRES,
PRES, CMDVCC, OFF, ALARM, DETECT and RSTIN 0V
DD V
VHvoltage on pin VH030V
V
PP voltage on pin VPP 0V HV
V
SUP voltage on pin VSUP 012V
V
x2 voltage on pins ALARM and DELAY 0 VSUP V
Vx3 voltage on pins XTAL, I/O(µC), CLKOUT2, CMD7,
CMD3.5 and CVNC 0 6.0 V
Vx4 voltage on pins I/O, RST, CLK and VCC duration <1 ms 0 7.0 V
Ptot continuous total power dissipation TDA8001;
Tamb = +70 °C; note 1;
see Fig.10
−2W
TDA8001T;
Tamb = +70 °C; note 1;
see Fig.11
−0.92 W
Tstg storage temperature −55 +150 °C
Ves electrostatic voltage on pins I/O, VCC, VPP, RST, CLK,
PRES and PRES −6+6kV
electrostatic voltage on other pins −2+2kV

1996 Dec 12 13
Philips Semiconductors Product specification
Smart card interface TDA8001
Fig.10 Power derating curve (DIP28).
handbook, halfpage
4
3
1
0
2
MBE256
50 0 50 100 150
Ptot
(W)
T ( C)
amb o
Fig.11 Power derating curve (SO28).
handbook, halfpage
50
3
2
1
00
MBE255
50 100 150
Ptot
(W)
T ( C)
amb
o
HANDLING
Every pin withstands the ESD test according to MIL-STD-883C class 3 for card contacts, class 2 for the remaining.
Method 3015 (HBM 1500 Ω, 100 pF) 3 pulses positive and 3 pulse negative on each pin referenced to ground.
THERMAL CHARACTERISTICS
SYMBOL PARAMETER VALUE UNIT
Rth j-a thermal resistance from junction to ambient in free air
SOT117-1 30 K/W
SOT136-1 70 K/W

1996 Dec 12 14
Philips Semiconductors Product specification
Smart card interface TDA8001
CHARACTERISTICS
VDD =12V;V
H= 25 V; VSUP =5V;T amb =25°C; unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply
VDD supply voltage 6.7 −18 V
IDD supply current idle mode; VDD =8 V 20 30 38 mA
idle mode; VDD =18V223442mA
active mode; unloaded 35 45 55 mA
Vth1 threshold voltage for power-on
reset −3.0 4.0 V
Vth4 threshold voltage on VDD (falling) 6.0 −6.5 V
Vhys4 hysteresis on Vth4 50 −200 mV
Voltage supervisor
VSUP voltage supply for the supervisor −5.0 −V
ISUP input current at VSUP −1.8 2.4 mA
Vth2 threshold voltage on VSUP (falling) 4.5 −4.72 V
Vhys2 hysteresis on Vth2 10 −80 mV
Vth3 threshold voltage on DELAY 2.35 −2.65 V
IDEL output current at DELAY pin grounded (charge) −5−−2µA
V
DEL =4 V (discharge) 6 −− mA
VDEL voltage on pin DELAY −−3.5 V
ALARM, ALARM (open-collector outputs)
IOH HIGH level output current on
pin ALARM VOH =5V −−25 µA
VOL LOW level output voltage on
pin ALARM IOL =2mA −−0.4 V
IOL LOW level output current on
pin ALARM VOL =0V −−−25 µA
VOH HIGH level output voltage on
pin ALARM IOH =−2mA V
SUP −1−− V
t
ddelay between VSUP and ALARM CDEL =47 nF; see Fig.4 −−10 µs
tpulse ALARM pulse width CDEL =47 nF 15 −50 ms
Interrupt lines OFF and DETECT (open-collector)
IOH HIGH level output current VOH =5V −−25 µA
VOL LOW level output voltage IOL =1mA −−0.4 V
Logic inputs (CMDVCC, VPP21, VPP15, VPP12.5, CMD7, CMD3.5, PRES, PRES and RSTIN); note 1
VIL LOW level input voltage −−0.8 V
VIH HIGH level input voltage 1.5 −− V
I
IL LOW level input current VIL =0V −−−10 µA

1996 Dec 12 15
Philips Semiconductors Product specification
Smart card interface TDA8001
IIH HIGH level input current VIH =5V −−10 µA
Reset output to the card (RST)
VIDLE output voltage in IDLE −−0.4 V
VOL LOW level output voltage IOL =200 µA−−0.45 V
VOH HIGH level output voltage IOH =−200 µA 4.3 −VCC V
IOH =−10 µAV
CC −0.7 −VCC V
tRST delay between RSTIN and RST RST enabled; see Fig.7 −−2µs
Clock output to the card (CLK)
VIDLE output voltage in IDLE −−0.4 V
VOL LOW level output voltage IOL =200 µA−−0.4 V
VOH HIGH level output voltage IOH =−200 µA 2.4 −VCC V
IOH =−20 µA 0.7VCC −VCC V
IOH =−10 µAV
CC −0.7 −VCC V
trrise time CL=30 pF; note 2 −−14 ns
tffall time CL=30 pF; note 2 −−14 ns
δduty factor CL=30 pF; note 2 45 −55 %
Card programming voltage (VPP)
VPP output voltage idle mode −−0.4 V
read mode VCC −4% −VCC +4% V
write mode; IPP <50mA P−2.5%(3) −P+2.5%(3) V
∆IPP/∆t < 40 mA/100 ns;
note 4 P−2.5%(3) −P+2.5%(3) V
IPP output current active; from 0 to P (3) −−−50 mA
VPP shorted to GND −−−100 mA
SR slew rate up or down 0.3 0.4 0.5 V/µs
High voltage input (VH)
VHinput voltage −−30 V
IHinput current at VHidle mode; active mode;
unloaded 4−6mA
P=5V 5 −9mA
P = 12.5 V 6.5 −10.5 mA
P=15V 7 −11 mA
P=21V 8 −12 mA
VH−VPP voltage drop −−2.2 V
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

1996 Dec 12 16
Philips Semiconductors Product specification
Smart card interface TDA8001
Card supply voltage (VCC)
VCC output voltage idle mode; active mode −−0.4 V
ICC < 100 mA 4.75 −5.25 V
∆IPP/∆t < 100 mA/100 ns;
note 4 4.75 −5.25 V
ICC output current VCC from 0 to 5 V −−−100 mA
VCC shorted to GND −−−200 mA
SR slew rate up or down 0.3 0.4 0.5 V/µs
5 V reference output voltage (CVNC)
VCVNC output voltage at pin CVNC 4.5 5.0 5.5 V
ICVNC output current at pin CVNC −−−50 mA
Crystal connection (XTAL)
Rxtal(neg) negative resistance at pin XTAL 2 MHz < fi< 16 MHz;
note 5 −−300 Ω
Vxtal DC voltage at pin XTAL 3.0 −4.0 V
fxtal resonant frequency 4 −16 MHz
external frequency 0 −20 MHz
Clock output (CLKOUT2)
fCLKOUT2 frequency on CLKOUT2 1 −8 MHz
VOL LOW level output voltage IOL =2mA −−0.4 V
VOH HIGH level output voltage IOH =−200 µA 3.0 −− V
I
OH =−10 µA 4.0 −− V
t
r
, tfrise and fall times CL=15 pF; note 2 −−25 ns
δduty factor CL=15 pF; note 2 40 −60 %
Data line [I/O, I/O(µC)]
VOH HIGH level output voltage on
pin I/O 4.5V<V
SUP < 5.5 V;
4.5V<V
I/O(µC) < 5.5 V;
IOH =−20 µA
4.0 −VCC + 0.1 V
4.5V<V
SUP < 5.5 V;
4.5V<V
I/O(µC) < 5.5 V;
IOH =−200 µA
2.4 −− V
V
OL LOW level output voltage on
pin I/O II/O = 1 mA; I/O(µC) grounded −−100 mV
IIL LOW level input current on
pin I/O(µC) I/O(µC) grounded −−−500 µA
VOH HIGH level output voltage on
pin I/O(µC) 4.5V<V
I/O < 5.5 V 4.0 −VSUP + 0.2 V
VOL LOW level output voltage on
pin I/O(µC) II/O(µC) = 1 mA; I/O grounded −−70 mV
IIL LOW level input current on pin I/O I/O grounded −−−500 µA
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

1996 Dec 12 17
Philips Semiconductors Product specification
Smart card interface TDA8001
Notes
1. Pins CMDVCC, VPP21, VPP15, VPP12.5, CMD7, CMD3.5 and PRES are active LOW; pins RSTIN and PRES are
active HIGH.
2. The transition time and duty cycle definitions are shown in Fig.12; .
3. P is the card programming voltage set by pin VPP12.5, VPP15 or VPP21.
4. The tests for dynamic response of both VPP and VCC are performed at 1 Hz, 10 kHz, 100 kHz and 1 MHz, with a
capacitive load of 100 nF.
5. This condition ensures proper starting of the oscillator with crystals having a series resistance up to 100 Ω.
VIDLE voltage on pin I/O outside a
session −−0.4 V
ZIDLE impedance on pin I/O(µC)
outside a session 10 −− MΩ
R
pu internal pull-up resistance
between pin I/O and VCC
81012kΩ
t
r
, tfrise and fall times Ci=C
o=30 pF −−0.5 µs
Protections
Tsd shut-down local temperature −135 −°C
I
CC(sd) shut-down current at VCC −−150 −mA
IPP(sd) shut-down current at VPP −−75 −mA
II/O(lim) current limitation on pin I/O from I/O to I/O(µC) 3 −5mA
Timing
tact activation sequence duration see Fig.7 −110 −µs
t
de deactivation sequence duration see Fig.8 −100 −µs
t
3start of the window for sending
CLK to the card −−70 µs
t5end of the window for sending
CLK to the card 80 −− µs
t
st maximum pulse width on
CMDVCC before VCC starts rising −−30 µs
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
δt1
t1t2 +
---------------
=
Fig.12 Definition of transition times.
handbook, full pagewidth
MBH856
10%
90%
10%
VOH
VOL
1.5 V
90%
tf tr
t2
t1

1996 Dec 12 18
Philips Semiconductors Product specification
Smart card interface TDA8001
INTERNAL PIN CONFIGURATION
Fig.13 Internal pin configuration.
handbook, full pagewidth
MBE257
100
µA
20
µA20 µA
5310
Ω
4690
Ω
VSUP
1.25 V
100
µA2.5 V
VSUP
2.5
µADELAY
ALARM
VSUP ALARM
OFF
CMDVCC
VPP21
650
Ω
1350
Ω
DD
V
CMD3.5
CVNC
CLKOUT2
RSTIN
CMD7
GND2
100
µA100
µA
I/O(µC)
VSUP
100
µA
VCC
100
µA
100
µA
VCC
VCC
5 kΩ
100 Ω
VCC
RST
XTAL
I/O
DETECT
VCC
10 kΩ
50 Ω
VCC
CLK
20
µA
1.25 V
VPP12.5
TDA8001
2.5 V
VH
VPP15
PRES
PRES
VPP
VH
GND1
VDD
VCC
5 V
as VPP12.5
as VPP12.5
as VPP12.5
as VPP12.5
as VPP12.5
as VPP12.5
as VPP12.5
as VPP12.5
as VPP12.5

1996 Dec 12 19
Philips Semiconductors Product specification
Smart card interface TDA8001
APPLICATION INFORMATION
Fig.14 Application in a pay TV decoder.
(1) The capacitor should be placed as close as possible to the IC.
(2) If pin VHis not connected to 25 V, it should be connected to VDD.
handbook, full pagewidth
MGG831

10
µF
10
µF
C1
C2
C3
DETECT
RSTIN
I/O(µC)
CMD7
CLKOUT2
GND2
OFF
VDD VDD
VSUP VH
RST CVNC
12 V 25 V
ALARM
TDA8001
ALARM
DELAYGND GND1 XTAL
47 nF
14 MHz
C5
C6
C8
CARD
SOCKET
80C52
MICRO-
CONTROLLER
to 8805
micro-
controller
PORT
1
PORT
2
INT0
100 nF
(1)
XTAL1
I/O
CLK
RST
VCC
PRES
PRES
VPP
XTAL2
25 V
GND
12 V
+5 V
C7
C4
100 nF
100 nF
47 nF
CMD3.5
CMDVCC
VPP15
VPP21
VPP12.5
1 kΩ
(2)

1996 Dec 12 20
Philips Semiconductors Product specification
Smart card interface TDA8001
PACKAGE OUTLINES
UNIT A
max. 1 2 b1(1)
(1) (1)
cD E weM
H
L
REFERENCES
OUTLINE
VERSION EUROPEAN PROJECTION ISSUE DATE
IEC JEDEC EIAJ
mm
inches
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
SOT117-1 92-11-17
95-01-14
A
min. A max. bZ
max.
ME e1
1.7
1.3 0.53 0.38 0.32 0.23 36.0 35.0 14.1 13.7 3.9 3.4 0.252.54 15.24 15.80 15.24 17.15 15.90 1.75.1 0.51 4.0
0.066
0.051 0.020 0.014 0.013
0.009 1.41
1.34 0.56 0.54 0.15 0.13 0.010.10 0.60 0.62 0.60 0.68 0.63 0.0670.20 0.020 0.16
051G05 MO-015AH
MH
c
(e )
1
ME
A
L
seating plane
A1
wM
b1
e
D
A2
Z
28
1
15
14
b
E
pin 1 index
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
handbook, full pagewidth
DIP28: plastic dual in-line package; 28 leads (600 mil) SOT117-1