Quantum Q250 Product manual

Q200 Series™
Intelligent Disk Drives
Technical Reference Manual
For Q250, Q280
Disk Drives

Q200 SERIES
tm
INTELLIGENT DISK DRIVES
Q250jQ280
DISK DRIVES
Technical Reference Manual
Publication No. 81-45528
REV A

PREFACE
This manual contains technical reference information describing
the Q250 and Q280 rigid disk drives. Information is intended for
technicians and engineers evaluating or maintaining the drives, or
integrating them into systems.
Quantum reserves the right to make changes and/or improvements to its
products without incurring any obligation to incorporate such changes
or improvements in units previously sold or shipped.
Additional information on the Q250 and Q280 is given in the
following~manuals:
Publication No.
Quantum 81-45233
Quantum 81-45416
ANSI X3.131-1986
Title
Q250/Q280 Disk Drives. OEM Manual
Q200 Series Programmer's Manual
Small Computer System Interface (SCSI)
Quantum publications may be requested from your Quantum Sales
Representative, or may be ordered from Quantum in the same manner as
spare parts.
Publication No 81-45528 Rev. KL587
UL/CSA/VDE
UL recognition granted under File No. E78016
CSA certification granted under File Nos. LR496896-8 and LR496896-11
VDE certification granted per File No. 11342-3250-1002
WARRANTY
Model Q250 and Q280 disk drives are warranted against defects in
material and workmanship for a period of one year from date of
shipment. The warranty includes parts and labor. This is a limited
~arranty and further details can be obtained from your Quantum sales
representative. All requests for service should be directed to the
Quantum service center in your area.
PATENTS
The product described herein is covered by u.S. Patent No. 4,538,193,
and is the subject of allowed pending patent applications from which
u.S. Patents are expected to issue in 1987.
Copyright 1987 Quantum Corporation. All rights reserved.
Q200 Series and DisCache are trademarks of Quantum Corporation.
AIRLOCK is a registered trademark of Quantum Corporation.
Printed in U.S.A.
ii

TAB L E o F
CON TEN T S
PREFACE . .
ii
SECTION 1.
INTRODUCTION . . . .
1-1
1.1
1.2
Features . . . . . .
Logic Conventions ..
. . . . . . . . 1-1
. . . . . . . . 1-2
SECTION 2.
PRINCIPLES OF OPERATION ..
2-1
2.1 Head Disk Assembly (HDA) . . . . . . .. . ...... 2-1
2.1.1 Base casting Assembly. . . . .. . ...... 2-1
2.1.2 Disk Stack Assembly. . . . . ....... 2-2
2.1.3 Rotary positioner Assembly (Actuator) ....... 2-2
2.1.4 Headstack Assembly. . . . . . . . . . . 2-2
2.1.S Automatic Actuator Lock (AIRLOCK) ......... 2-2
2.1.6 DC Drive Motor. . . . . . ......... 2-2
2.1.7 Air Filtration. ... . . ......... 2-3
2.2 Drive Electronics. . .. . .............. 2-4
2.2. 1 Disk Format . . . . . . . . . .. ....... 2-4
2.2.2 Simplified Explanation--Block Diagram ....... 2-4
2.2.3 SCSI Bus Physical Interface. . ...... 2-8
2.2.4 SCSI Bus Signal Descriptions ............ 2-10
2.2.S SCSI Bus Timing. . .. ...... . . 2-11
2.2.6 Power Requirements. . . . .. ...... . 2-14
2.2.7 Shorting Plug Options. . ........... 2-16
2.2.8 Flex Circuit .................... 2-19
2.3 PCB Functional Elements. . .. . ........... 2-19
2.3.1 Power-On-Reset (POR) and Warm Reset ........ 2-19
2.3.2 Motor Control Circuit ............... 2-20
2.3.3 Electronic Return Spring. . . . .. . ..... 2-21
2.3.4 S080 SCSI Bus Controller. . . . ...... 2-21
2.3.S Servo Control, AMC and Servo AGC. . . . .. .. 2-23
2.3.6 Actuator Positioning circuit. . .. . ..... 2-27
2.3.7 Read/Write Circuit. . . . . . . . . . . . . .. 2-27
2.3.8 FYLO Timing Controller IC, and xtal Oscillators .. 2-29
2.3.9 DICEY Data Controller IC. ........ . 2-30
2.3.10 Microprocessor and EPROM ......... 2-32
2.4 Power-Up Sequence/Recalibration. . .......... 2-32
2.S Read Command Sequence. . . . . . . . . ...... 2-33
2.6 write Command Sequence. . .. . ........... 2-33
SECTION 3.
ENGINEERING DRAWINGS . .
3-1
iii

SECTION 4.
APPLICATIONS . . . . . . . .
4-1
4.1 Special Considerations. . . . . . .... 4-1
4.1.1 -REQ/-ACK Handshake. . ...... 4-1
4.1.2 Hints for Software Driver writers ... .. 4-3
4.2 Errors and Media Defects. . . . . . . . . .. . ... 4-5
4 • 2 • 1 Errors. . . . . . . . . . . . . . . .. .... 4 - 5
4.2.2 Allocating Replacement Sectors. . ....... 4-6
4.2.3 Creating the Defect Lists. . . . . . . 4-8
4.2.4 Updating the Drive Using the Defect Lists ..... 4-9
4.3 Grounding, Electrostatic Discharges, and EMI . . ... 4-10
SECTION 5.
MAINTENANCE. . . . •
5-1
5.1 Maintenance Precautions. . . . . . . . . . .. . ... 5-1
5.2 Level 1 Maintenance. . . . . . . . . . .. . ..... 5-1
5.3 Level 2 Maintenance. . . . ............ 5-2
5.4 Connector Maintenance. . . . . .. . ......... 5-2
5.5 PCB Waveforms and Techniques. . . . . . . . . .. .• 5-2
5.5.1 Special Test Equipment ............... 5-2
5.5.2 Techniques and Waveform Descriptions ........ 5-3
5.5.3 Test Connector J5 Signals. . . . . . . .. .. 5-4
SECTION 6. PARTS LISTS ... .
6.1 Spare Parts List .... .
6.2 Reference Parts List(s) ..
iv
. . 6-1
6-1
6-2

2-1
2-2
2-3
2-4
2-5
2-6
2-7
2-8
2-9
2-10
2-11
2-12
2-13
2-14
2-15
2-16
2-17
3-1
3-2
3-3
3-4
3-5
3-6
3-7
3-8
3-9
3-10
3-11
3-12
4-1
4-2
4-3
4-4
4-5
5-1
5-2
5-3
LIS T o F
FIG U RES
Exploded View . . . . . . .. ...... . . 2-1
Inside View of Drive, Showing Air Filtration. . . . . . . 2-3
Disk Format: Wedges, Sectors, and Tracks. . . . . . . . . 2-5
Electronics Block Diagram .. ............ 2-6
J1 Connector. . . . . . . .. ..... ..... 2-9
SCSI Bus. Typical Circuit of a Signal Line ....... 2-10
SCSI Bus Timing Diagram . . . . • . . . . . . . . . . . . 2-13
Drive Startup Current Profile . . . . .. ...... 2-16
General PCB Layout; Plug, Terminator and ......... 2-17
Connector Locations
· . . . . . . . . 2 -2 2
5080 Conceptual Block Diagram. . . . .
5080 Interface Diagram . . . . . . .
Servo AMC and ADC Circuit Waveforms.
Read Circuit Waveforms . . . . . . . . .
· . . . . . . . 2-22
· . .. .. 2-25
· . . . 2-28
DICEY Block Diagram. . . . . . .. ...
· . . . . . 2-31
Power-Up Sequence. .. .. . . . . . · . . . . .
2-34
Read Command Sequence. . . .. ... . · .
.. . 2-35
write Command Sequence . . . . . .. . · . . . . . .
2-36
Printed
Circuit Board Parts Locations
(PCB-7)
· ·
3-2
Schematic,
PCB-7,
Sheet
1 · · · · · · · ·
3-3
Schematic,
PCB-7, Sheet
2 · · · · · · · · · · · ·
3-4
Schematic,
PCB-7,
Sheet
3 · · · · · · · · · · · · · · · ·
3-5
Printed
Circuit Board Parts Locations
(PCB-8)
· ·
3-6
Schematic,
PCB-8, Sheet
1 · · · · · · · · ·
3-7
Schematic,
PCB-8,
Sheet
2 · · · · · · · · · · · · · · · ·
3-8
Schematic,
PCB-8, Sheet
3 · · · · · · · · · · · · · ·
3-9
Printed
Circuit Board Parts Locations
(PCB-9)
· · · · · ·
3-10
Schematic,
PCB-9, Sheet
1 · · · · · · · · ·
3-11
Schematic,
PCB-9, Sheet
2 · · · · · · · · ·
3-12
Schematic,
PCB-9, Sheet
3 · · · · · · · · · ·
3-13
-REQ/-ACK Handshake. Q250/Q280 Target Sends Data . . 4-2
Buffer Full and Empty Ratios. . . . . . . . . . . . . . . 4-3
In-Line Sparing of Defective Sectors. . . .. . ... 4-7
In-Line Sparing Overflow of Defective Sectors . . . . . . 4-7
Sparing of Field-Found Defective Sectors. . . . . . . . . 4-8
Test Waveforms(1)
Test Waveforms(2)
Test Waveforms(3)
v
· . . . . 5-6
· . 5-7
· . . . . . 5-8

2-1
2-2
2-3
4-1
5-1
LIS T o F TAB L E S
J1 Pin Assignments. . ..... .
DC Power Requirements . . . . .. ...
Microprocessors and Buffer RAM. . . . . .
Available Spare and Defective Sectors .
Test Connector J5 Signals . .
vi
. 2-9
. . . • . • 2-15
· • • 2-32
· . . 4-8
· . • 5-5

1.1 Features
Q250 and Q280 drives feature on-board, ANSI-standard, Small Computer
System Interface (SCSI) controllers, and, with the exception of a
plug-in EPROM IC, both models use the same printed circuit board
(PCB). These drives require no operational adjustments. All
electronics except the spindle motor, headstack, flex circuit, heads,
and actuator rotor are contained on the PCB. A single IC is mounted on
the flex circuit inside the sealed assembly.
The following features of the Q250/Q280 drives enable high data
throughput:
o Seeks are initiated immediately--other commands are
processed simultaneously.
o 14 KByte FIFO data buffer balances the transfer of data to
and from the SCSI bus as well as to and from the drive.
o Optional DisCache increases data buffer size to 60 KBytes.
(See the Q200 Series Programmers Manual for details
concerning this option.)
o Cylinder and head skewing scheme minimizes latency when
accessing data sequentially across cylinder boundaries.
o Defect management scheme minimizes seeks to spare sectors.
o Multiple block transfer of up to 64K-1 blocks, each with up
to 2 Kbytes.
o RLL 1,7 (run-length-Iimited) encoding increases data density
on the disks.
1-1

SCSI commands relieve the host system of many tasks, such as defect
management, error correction, and physical sector addressing.
Programmable options allow users flexible ways to handle defects
initially and throughout the product's life. For example, (1)
defective sectors can be automatically reassigned without the need
to reformat, (2) data can be corrected with a Reed-Solomon error
correcting code (ECC) , or (3) all error detection and correction can
be handled in the host computer. The ECC can correct one burst error
of 17 bits, or detect three burst errors of 17 bits each.
Q200 Series
tm
drives employ a hard-sectored format with servo data
factory-written in wedges between all sectors on all surfaces. Thus,
thermal and mechanical effects which tend to misalign heads on the
headstack assembly are minimized, in comparison with other drives
which use a dedicated servo surface. In addition, conservative linear
bit and track densities ensure high data integrity. Logical block
sizes of 512, 1024, and 2048 bytes are supported.
1.2
Logic Conventions
Signals on the SCSI bus are all true or asserted when they are at low
level, and false or non-asserted when they are at high level. In this
document, the names of such signals are always preceded by a minus, as
"-ACK," and the timing diagrams are drawn to show the signals asserted
when they are low, as they might be observed with an oscilloscope.
other signals, as on the PCB, are indicated as follows:
Signal Type
Asserted when low
Asserted when high
Differential
Analog
Examples
-paR
+POR
Asserted when +READ SIG is more
positive than -READ SIG
WRITE CURRENT, 5 V
Note that the ANSI Standard for SCSI, ANSI X3.131-1986 uses, for
example, "-ACK" when listing connector pin connections, but describes
the signals as "ACK" in the text, and shows positive true signals
"+ACK" on timing diagrams.
1-2

SECTION 2. PRINCIPLES OF OPERATION
2.1
Head Disk Assembly (HDA)
2.1.1 Base Casting Assembly
The single piece, aluminum alloy base casting provides a mounting
surface for the rest of the drive mechanism, PCB, and shock mount
brackets. See Figure 2-1 for relative locations.
yo '\~'ST ~:K ASSEMBLY
r- HEADS
/
ACTUATOR
UPPER AND LOWER
MAGNETS
FACEPLATE
DISK CLAMP
MAGNETIC DISK
! I!
/t:tD
/' '
/' !
MOUNTING HOLES
Figure 2-1: Exploded View
2-1
RECIRCULATION ~
FIL TER ",
,
BASE CASTING
PRINTED CIRCUIT
BOARD
~ MOUNTING
/' BRACKET
/~/