Renesas SmartBond UM-B-041 User manual

User Manual
SmartBond Production Line Tool
UM-B-041
Abstract
This document describes the SmartBond Production Line Tool (PLT) for DA1470x wireless SoC
family of products. The various software applications, as well as the PLT hardware are explained in
detail. The purpose of this document is to guide users on how to use the various PLT components.

UM-B-041
SmartBond Production Line Tool
User Manual
Revision 4.8
02-Nov-2022
CFR0012
2 of 170
© 2022 Renesas Electronics
Contents
Abstract................................................................................................................................................ 1
Contents............................................................................................................................................... 2
Figures.................................................................................................................................................. 4
Tables ................................................................................................................................................... 7
1 Terms and Definitions................................................................................................................... 9
2 References................................................................................................................................... 11
3 New Version Features................................................................................................................. 12
4 Introduction.................................................................................................................................. 14
5 Hardware...................................................................................................................................... 15
5.1 Hardware Block Diagram....................................................................................................15
5.2 Printed Circuit Board Layout............................................................................................... 16
5.3 PLT Power Supply .............................................................................................................. 17
5.4 DUT Connector...................................................................................................................17
5.5 Data Streaming...................................................................................................................18
5.5.1 Normal Operation ................................................................................................18
5.5.2 Crystal Trimming.................................................................................................. 19
5.5.3 Loopback Operation ............................................................................................19
5.6 Golden Unit.........................................................................................................................20
5.6.1 GU Reset............................................................................................................. 20
5.7 Current Measurements .......................................................................................................21
5.8 Jumper Settings.................................................................................................................. 21
5.8.1 J26 - Current Measurements............................................................................... 22
5.8.2 J47, J46 - GU Reset............................................................................................ 22
5.8.3 J37 - GU Programming........................................................................................23
5.9 PLT Functional Blocks ........................................................................................................ 24
6 Software ....................................................................................................................................... 25
6.1 Introduction .........................................................................................................................25
6.2 Software Package Contents ...............................................................................................26
6.3 Prerequisites.......................................................................................................................29
6.4 System Requirements.........................................................................................................30
6.5 Limitations........................................................................................................................... 30
6.6 Building the Code................................................................................................................31
6.7 Executing the Applications.................................................................................................. 33
6.8 Test Sequence....................................................................................................................39
6.8.1 DA1470x Test Sequence..................................................................................... 39
6.9 VBAT/Reset Signals Operation........................................................................................... 43
6.9.1 VBAT Only........................................................................................................... 43
6.9.2 VBAT On with Reset............................................................................................44
6.10 Custom Memory Data......................................................................................................... 44
6.10.1 Custom Data CSV File Format............................................................................ 45
6.11 Golden Unit Scan Test........................................................................................................ 46
6.12 Creating PLT Firmware Files..............................................................................................47

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6.12.1 Golden Unit Firmware..........................................................................................48
6.12.2 DA1470x Firmware.............................................................................................. 48
7 Applications................................................................................................................................. 49
7.1 Introduction .........................................................................................................................49
7.2 CFG PLT Application ..........................................................................................................49
7.2.1 XML and XSD Files ............................................................................................. 51
7.2.2 Hardware Setup...................................................................................................52
7.2.3 General................................................................................................................ 55
7.2.4 BD Addresses......................................................................................................58
7.2.5 DUT Hardware Setup .......................................................................................... 60
7.2.6 Test Settings........................................................................................................ 60
7.2.7 Memory Functions............................................................................................... 78
7.2.8 Memory Header................................................................................................... 81
7.2.9 Debug Settings.................................................................................................... 86
7.2.10 Security................................................................................................................ 87
7.3 GUI PLT Application............................................................................................................88
7.3.1 GUI PLT Settings.................................................................................................91
7.3.2 Running the GUI PLT and Executing Tests ........................................................92
7.3.3 Debug Console.................................................................................................... 95
7.3.4 DUT Log File........................................................................................................ 96
7.3.5 CSV File............................................................................................................... 97
7.4 CLI PLT Application ............................................................................................................ 98
7.4.1 CLI Commands....................................................................................................98
7.4.2 Running the CLI and Executing Tests................................................................. 99
7.4.3 Using CLI Commands with Arguments.............................................................. 103
7.5 GU Upgrade Application ................................................................................................... 104
7.5.1 Introduction Screen............................................................................................104
7.5.2 Hardware Version Screen .................................................................................105
7.5.3 Power Supply Screen........................................................................................ 105
7.5.4 Golden Unit Reset Screen.................................................................................106
7.5.5 GU COM Port Screen........................................................................................ 107
7.5.6 Burn Firmware Screen....................................................................................... 108
8 Example Usage.......................................................................................................................... 110
Appendix A Top View of PLT PCB Version D............................................................................... 115
Appendix B Electrical Schematics ................................................................................................ 116
Appendix C Hardware Modifications PLT Version D................................................................... 120
Appendix D Application Hardware Design Considerations........................................................ 122
Appendix E Suggestions about Hardware and Cabling.............................................................. 123
Appendix F RF Path Losses Calibration....................................................................................... 126
F.1 Prerequisites.....................................................................................................................126
F.2 Setup.................................................................................................................................127
F.3 Procedure.......................................................................................................................... 129
Appendix G Mkimage.exe............................................................................................................... 135

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Appendix H Automatic GU COM Port Find................................................................................... 136
Appendix I Improving Cabling Between PLT and DUTs.............................................................. 138
Appendix J FTDI Driver Removal and Installation....................................................................... 140
Appendix K DA1470x DK Pro Motherboard Connection............................................................. 141
Appendix L Connecting DUT with Battery Supply....................................................................... 142
Appendix M User Interfaces Shortcut Keys.................................................................................. 143
Appendix N DA1470x Supported QSPI Flash Memories............................................................. 144
Appendix O Bluetooth®LE Tester Measurement Results........................................................... 145
O.1 Tx Power........................................................................................................................... 145
O.2 Frequency Offset............................................................................................................... 146
O.3 Modulation Index...............................................................................................................146
O.4 Error Response................................................................................................................. 147
Appendix P CSV Log File Contents............................................................................................... 149
P.1 CSV Log File Example...................................................................................................... 153
Appendix Q DUT Status Codes...................................................................................................... 157
Appendix R Golden Unit Status Codes......................................................................................... 166
Revision History.............................................................................................................................. 169
Figures
Figure 1: Production Line Tool Hardware............................................................................................ 14
Figure 2: Production Line Tool Hardware Board Block Diagram........................................................ 15
Figure 3: Top View of the PLT Hardware Board................................................................................. 16
Figure 4: PLT Hardware Power Connections...................................................................................... 17
Figure 5: Production Line Tool DUT Connections............................................................................... 17
Figure 6: CPLD UART Data Streams.................................................................................................. 18
Figure 7: CPLD XTAL Trim Pulse Data Stream.................................................................................. 19
Figure 8: CPLD UART Loopback Data Stream................................................................................... 19
Figure 9: Golden Unit .......................................................................................................................... 20
Figure 10: GU Reset Circuit ................................................................................................................ 21
Figure 11: VBAT DUT Current Measurement Setup........................................................................... 21
Figure 12: Connections for ‘Floating Current’ Measurements............................................................. 22
Figure 13: Location of J46 Jumper...................................................................................................... 22
Figure 14: Location of J47 Jumper...................................................................................................... 23
Figure 15: J37 - GU Programming Jumper Schematics ..................................................................... 23
Figure 16: Location of J37 Jumper...................................................................................................... 23
Figure 17: PLT Functional Blocks ....................................................................................................... 24
Figure 18: Production Line Tool Software Block Diagram .................................................................. 25
Figure 19: SmartBond PLT Software Package Contents.................................................................... 26
Figure 20: DA1470x Test Sequence................................................................................................... 42
Figure 21: VBAT Only.......................................................................................................................... 43
Figure 22: VBAT On with Reset.......................................................................................................... 44
Figure 23: Custom Memory Data CSV File Example.......................................................................... 45
Figure 24: Golden Unit Scan Test....................................................................................................... 46
Figure 25: Golden Unit Scan Test Example Parameters.................................................................... 46
Figure 26: Firmware Files.................................................................................................................... 47
Figure 27: Folder Contents of ‘fw_files’ ............................................................................................... 47
Figure 28: CFG PLT Startup Screen................................................................................................... 49

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Figure 29: CFG PLT with Erroneous Configuration Parameter........................................................... 50
Figure 30: XSD Schema File Example................................................................................................ 51
Figure 31: Station Identification........................................................................................................... 52
Figure 32: Device IC............................................................................................................................ 52
Figure 33: Active DUTs ....................................................................................................................... 53
Figure 34: DUT COM Ports................................................................................................................. 53
Figure 35: Golden Unit COM Port....................................................................................................... 54
Figure 36: VBAT/Reset Mode Selection.............................................................................................. 55
Figure 37: Statistics............................................................................................................................. 55
Figure 38: Test Options....................................................................................................................... 56
Figure 39: Reset Polarity..................................................................................................................... 56
Figure 39: BD Address Assignment.................................................................................................... 58
Figure 40: Example for Load from File Mode...................................................................................... 59
Figure 41: UART Baud Rate ............................................................................................................... 60
Figure 42: Reset Polarity..................................................................................................................... 60
Figure 43: VBAT Level Log ................................................................................................................. 60
Figure 44: OTP Timestamp Read ....................................................................................................... 61
Figure 45: XTAL Trim.......................................................................................................................... 61
Figure 46: GPIO Watchdog Operation................................................................................................ 61
Figure 47: Scan DUT Advertise Test................................................................................................... 62
Figure 48: Golden Unit RF Tests......................................................................................................... 62
Figure 49: BLE Tester General Settings ............................................................................................. 63
Figure 50: BLE Tester TX Power ........................................................................................................ 64
Figure 51: BLE Tester Frequency Offset............................................................................................. 65
Figure 52: BLE Tester Modulation Index............................................................................................. 66
Figure 53: BLE Tester RX Sensitivity.................................................................................................. 67
Figure 54: Path Losses per DUT......................................................................................................... 68
Figure 55: GPIO/LED Tests................................................................................................................. 68
Figure 56: GPIO Connection Test....................................................................................................... 69
Figure 57: Sensor Test (SPI)............................................................................................................... 70
Figure 58: Sensor Test (I2C)............................................................................................................... 71
Figure 59: Custom Test....................................................................................................................... 72
Figure 60: External 32 kHz Test.......................................................................................................... 72
Figure 61: Current Measurement Tests .............................................................................................. 73
Figure 62: Temperature Measurement Test........................................................................................ 76
Figure 63: Scan Test........................................................................................................................... 77
Figure 64: OTP Memory...................................................................................................................... 78
Figure 65: Flash Memory..................................................................................................................... 79
Figure 66: Memory Read Test............................................................................................................. 80
Figure 67: Memory Read Test Example Log File................................................................................ 80
Figure 68: Custom Memory Data........................................................................................................ 81
Figure 69: OTP Configuration Script................................................................................................... 83
Figure 70: Debug Settings................................................................................................................... 86
Figure 71: Security .............................................................................................................................. 87
Figure 72: GUI PLT Main Screen........................................................................................................ 88
Figure 73: GUI PLT Settings ............................................................................................................... 91
Figure 74: GUI PLT - Erroneous Messages in “Run Scripts Before Testing Starts”........................... 92
Figure 75: GUI PLT OTP Burn Warning Message.............................................................................. 92
Figure 76: GUI PLT Testing (1 of 2).................................................................................................... 93
Figure 77: GUI PLT Testing (2 of 2).................................................................................................... 94
Figure 78: GUI PLT Tests Finished..................................................................................................... 94
Figure 79: GUI PLT Retry Failed DUTs Message............................................................................... 95
Figure 80: Debug Console................................................................................................................... 95
Figure 81: DUT Log File...................................................................................................................... 96
Figure 82: CSV File............................................................................................................................. 97
Figure 83: CLI Software Start Screen ................................................................................................. 98
Figure 84: CLI PLT Print Settings (x Command)............................................................................... 100

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Figure 85: CLI PLT DUT COM Port Enumeration ('p' Command)..................................................... 101
Figure 86: CLI PLT Testing ............................................................................................................... 101
Figure 87: CLI PLT Testing Finished.................................................................................................101
Figure 88: CLI with Commands as Arguments..................................................................................103
Figure 89: GU Upgrade - Introduction Page......................................................................................104
Figure 90: GU FW Upgrade - Exit Message......................................................................................105
Figure 91: GU FW Upgrade - Hardware Version..............................................................................105
Figure 92: GU FW Upgrade - Hardware Version Compatibility.........................................................105
Figure 93: GU FW Upgrade - Power Supply..................................................................................... 106
Figure 94: GU FW Upgrade - Power Supply Pop-Up........................................................................ 106
Figure 95: GU FW Upgrade - Golden Unit Reset.............................................................................. 107
Figure 96: GU FW Upgrade - Golden Unit Reset Message for Manual Mode..................................107
Figure 97: GU FW Upgrade - GU COM Port.....................................................................................108
Figure 98: GU FW Upgrade - Burn Firmware....................................................................................108
Figure 99: GU Upgrade - Burn Firmware Pop-Up Message............................................................. 109
Figure 100: GU FW Upgrade - Burn Firmware Success...................................................................109
Figure 101: Top View of PLT PCB Version D ................................................................................... 115
Figure 102: VBAT and VPP Control from CPLD............................................................................... 116
Figure 103: CPLD DUT UART Connections ..................................................................................... 116
Figure 104: CPLD FTDI and GU Control Connections .....................................................................117
Figure 105: FTDI Chip for USB UART to DUTs 1, 2, 3 and 4........................................................... 117
Figure 106: Quad USB HUB..............................................................................................................118
Figure 107: Golden Unit - Dedicated USB Port and FTDI Chip........................................................ 118
Figure 108: Golden Unit - GU LED and SPI Flash Memory..............................................................119
Figure 109: VBAT_DUT and VDDIO Supplies..................................................................................119
Figure 110: GU Supply and VPP Generation.................................................................................... 119
Figure 111: DA14580_RD_tester Version D..................................................................................... 120
Figure 112: Jumper J47 Added Next to Golden Unit Socket ............................................................ 120
Figure 113: R365 (10 k) Added Next to Reset Button.................................................................... 120
Figure 114: R365, J47 and RESET Shown in Electrical Schematic ................................................. 121
Figure 115: Possible Solution of Antenna on Cable and Fixed Radius of DUTs to Antenna............ 123
Figure 116: Possible Solution of Antenna on Cable and DUTs Put in Line......................................124
Figure 117: Example Locations and RSSI Readouts of Horizontal Antenna....................................124
Figure 118: Setup Diagram...............................................................................................................127
Figure 119: mkimage.exe Example Directory with Files...................................................................135
Figure 120: mkimage.exe Example Usage .......................................................................................135
Figure 121: Build pxp_reporter Using SmartSnippetsTM Studio........................................................ 135
Figure 122: Example of Twisted Pair Cable with 4 Pairs and Ferrite................................................138
Figure 123: Location of Pull-Down Resistors.................................................................................... 138
Figure 124: Anti-Ringing Solution......................................................................................................139
Figure 125: DA1470x Pro Motherboard DK Wiring........................................................................... 141
Figure 127: Example CSV Log File................................................................................................... 153

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Tables
Table 1: SmartBond_PLT_v5.0 Added Features................................................................................ 12
Table 2: Power Supply Requirements................................................................................................. 17
Table 3: PLT Connections to Applications .......................................................................................... 18
Table 4: Jumpers................................................................................................................................. 22
Table 5: PLT User Interface Application Executables......................................................................... 26
Table 6: Executables Folder Description............................................................................................. 26
Table 7: Production Line Tool Prerequisites ....................................................................................... 29
Table 8: Minimum System Requirements ........................................................................................... 30
Table 9: Opening the PLT Visual Studio 2017 Express Source Code Solution.................................. 31
Table 10: SmartBond_PLT_CFG.exe Application Execution.............................................................. 33
Table 11: SmartBond_PLT_GUI.exe Application Execution............................................................... 35
Table 12: SmartBond_PLT_CLI.exe Application Execution................................................................ 37
Table 13: GU_fw_upgrade.exe Application Execution........................................................................ 37
Table 14: DA1470x Test Sequence .................................................................................................... 39
Table 15: Custom Memory Data Input Modes..................................................................................... 44
Table 16: CFG PLT Main Menu Options............................................................................................. 50
Table 17: CFG PLT Bottom Strip Options........................................................................................... 50
Table 18: Station Identification............................................................................................................ 52
Table 19: Device IC............................................................................................................................. 53
Table 20: Active DUTs......................................................................................................................... 53
Table 21: DUT COM Ports.................................................................................................................. 53
Table 22: Set the GU COM Port.......................................................................................................... 54
Table 23: Golden Unit Firmware Version Upgrade............................................................................. 54
Table 24: VBAT/Reset Mode............................................................................................................... 55
Table 25: Statistics.............................................................................................................................. 55
Table 26: Test Options........................................................................................................................ 57
Table 27: BD Address Assignment - Standard Mode ......................................................................... 58
Table 28: BD Address Assignment Options - Range Mode................................................................ 59
Table 29: BD Address Assignment Options - Load from File Mode ................................................... 59
Table 30: UART Baud Rate................................................................................................................. 60
Table 31: XTAL Trim ........................................................................................................................... 61
Table 32: GPIO Watchdog Operation ................................................................................................. 61
Table 33: Scan DUT Advertise Test.................................................................................................... 62
Table 34: Golden Unit RF Tests.......................................................................................................... 63
Table 35: BLE Tester General Settings............................................................................................... 63
Table 36: BLE Tester TX Power.......................................................................................................... 64
Table 37: BLE Tester Frequency Offset.............................................................................................. 65
Table 38: BLE Tester Modulation Index.............................................................................................. 66
Table 39: BLE Tester RX Sensitivity................................................................................................... 67
Table 40: Path Losses per DUT from RF Tests Options..................................................................... 68
Table 41: GPIO/LED Tests.................................................................................................................. 69
Table 42: GPIO Connection Test........................................................................................................ 69
Table 43: Sensor Tests ....................................................................................................................... 71
Table 44: Custom Tests Options......................................................................................................... 72
Table 45: External 32 kHz Tests Options............................................................................................ 72
Table 46: Current Measurement Tests................................................................................................ 74
Table 47: Current Measurement Test –Peripheral Current Measurement......................................... 74
Table 48: Current Measurement Test - Sleep Current Measurement................................................. 75
Table 49: Temperature Measurement Test......................................................................................... 76
Table 50: Scan Test Options............................................................................................................... 77
Table 51: OTP Memory....................................................................................................................... 78
Table 52: QSPI Flash Erase................................................................................................................ 79
Table 53: Flash Image Write ............................................................................................................... 80
Table 54: Memory Read Test.............................................................................................................. 80
Table 55: Custom Memory Data ......................................................................................................... 81

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Table 56: OTP Configuration Script Commands................................................................................. 84
Table 57: OTP Configuration Script .................................................................................................... 84
Table 58: Debug Settings.................................................................................................................... 86
Table 59: Security Options.................................................................................................................. 87
Table 60: GUI PLT Main Screen Description...................................................................................... 88
Table 61: GUI PLT Settings................................................................................................................. 91
Table 62: CLI Commands.................................................................................................................... 98
Table 63: PLT Example Usage .........................................................................................................110
Table 64: RF Test RSSI Results.......................................................................................................124
Table 65: Prerequisites...................................................................................................................... 126
Table 66: RF Path Losses Calibration Setup.................................................................................... 127
Table 67: Procedure Steps................................................................................................................ 129
Table 68: FTDI "DialogSemi" Serial Number ....................................................................................136
Table 69: DA1470x Pro DK to PLT connections............................................................................... 141
Table 70: User Interface Shortcut Keys ............................................................................................ 143
Table 71: DA1470x Supported QSPI/OQSPI Flash Memories......................................................... 144
Table 72: MT8852B Supported Command Codes............................................................................ 145
Table 73: MT8852B –Bluetooth®LE TX Output Power Test Results...............................................145
Table 74: MT8852B –Bluetooth®LE Carrier Frequency Offset and Drift Test Results.................... 146
Table 75: MT8852B –Bluetooth®LE Modulation Characteristics Test Results................................ 146
Table 76: MT8852B –Error List........................................................................................................147
Table 77: CSV File Contents............................................................................................................. 149
Table 79: Example CSV Log File Content Analysis.......................................................................... 153
Table 81: DUT Status Codes ............................................................................................................ 157
Table 82: Golden Unit Status Codes................................................................................................. 166

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User Manual
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1 Terms and Definitions
API Application Programming Interface
BD Bluetooth Device
.bin Firmware files in binary format
Bluetooth®LE Bluetooth®Low Energy
CFG Configuration
CLI Command Line Interface
COM Communication Port
CPLD Complex Programmable Logic Device
CRC Cyclic Redundancy Check
CS Configuration Script
CSV Comma Separated Values
DLL Dynamic Link Library
DMA Direct Memory Access
DMM Digital Multi-Meter
DTM Direct Test Mode (as specified by the Bluetooth®LE Core standard)
DUT Device Under Test
DVM Digital Voltage Meter
EEPROM Electrically Erasable Programmable Read-Only Memory
.exe Executable file
FTDI Future Technology Devices International Ltd.
GPIO General Purpose Input-Output
GU Golden Unit
GUI Graphical User Interface
Hex Firmware file in ASCII format
HW Hardware
IC Integrated Circuit
IDE Integrated Development Environment
I2C Inter-Integrated Circuit
JTAG Joint Test Action Group
OQSPI Octal/Quad SPI Flash
OS Operating System
OTP One-Time Programmable (memory)
PC Personal Computer
PCB Printed Circuit Board
PER Packet Error Rate
PLT Production Line Tool
PLTD Production Line Tool DLL
POR Power-On Reset
RAM Random-Access Memory
RCX Resistor Crystal Oscillator
RF Radio Frequency
RX Receive
SCPI Standard Commands for Programmable Instruments
SoC System-on-Chip

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SDK Software Development Kit
SPI Serial Peripheral Interface
SW Software
TCS Trim and Calibration Section
TX Transmit
UART Universal Asynchronous Receiver/Transmitter
UI User Interface
USB Universal Serial Bus
VISA Virtual Instrument Software Architecture
VPP Programming Supply Voltage (pin)
XML Extensible Markup Language
XTAL Crystal
XSD XML Schema Definition

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User Manual
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2 References
[1] UM-B-040, DA1458x/DA1468x Production Line Tool Libraries v4.2, User manual, Renesas
[2] UM-B-014, DA1458x Bluetooth Smart Development Kit - Expert, User Manual, Renesas
[3] FT4232H –Hi-Speed Quad USB UART IC, FTDI Chip
[4] FT232 –USB UART IC, FTDI Chip
[5] Anritsu MT8852B, https://www.anritsu.com/en-US/test-measurement/products/mt8852b
[6] Keysight 34401A, http://www.keysight.com/en/pd-1000001295%3Aepsg%3Apro-pn-
34401A/digital-multimeter-6-digit?cc=US&lc=eng
[7] Keithley 2000, http://www.tek.com/tektronix-and-keithley-digital-multimeter/keithley-2000-series-
6%C2%BD-digit-multimeter-scanning
[8] Papouch TMU USB thermometer, https://www.papouch.com/en/shop/product/tmu-usb-
thermometer/
[9] NI USB TC-01, http://sine.ni.com/nips/cds/view/p/lang/en/nid/208177
[10] LitePoint IQxel-M, http://www.litepoint.com/test-solutions-for-manufacturing/iqxel-m/
[11] Keysight 34461A, http://www.keysight.com/en/pd-2270273-pn-34461A/digital-multimeter-6-digit-
34401a-replacement-truevolt-dmm?cc=GR&lc=eng

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3 New Version Features
This manual explains the usage of the 16 channels SmartBondTM Production Line Tool (PLT). It
refers to the SmartBond_PLT_v5.0 software release, which compared to SmartBond_PLT_v_4.5 has
the differences shown in Table 1.
Table 1: SmartBond_PLT_v5.0 Added Features
#
Features
Description
1
DA1470x family support
Supports only DA1470x family. The older SmartBond family of
products are supported in previous PLT versions.
2
PCB panel serial number
Before each test a screen prompts user to enter the panel serial
number. PLT will add number 1-16 to the end of the serial number
and append it to each DUT log as shown below for DUTs 10, 11,
12 and 13.
3
OTP configuration script
The OTP CS programming parameters are specific to the DA1470x
product family.
4
OTP configuration script check
empty
Updated operation of OTP CS check empty algorithm.
●No check: Check disabled.
●Error if command exists: Returns error if the command is
already written in the DUT, even if the data are the same.
●Skip if entry exist: Skip writing an entry without error if the
command and the data are already written in the DUT. If same
command is found with different data an error will be returned.
●Skip if command exists: Skip writing without returning error if
the command in the DUT OTP CS is already written, no matter
what the data are (same or different).
5
XTAL 32 MHz settle time
calibration.
XTAL 32 MHz. calibration is extended to support settle time
calibration, with values found programed in OTP CS and applied in
XTAL32M_TRIM_REG (0x50050408) DA1470x register. Operation
adds less than 1sec extra delay but has great benefits in overall
product sleep and thus power performance.

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#
Features
Description
6
Added support for Octal SPI flash
interface.
DA1470x supports Octal SPI flash. User has the option to choose
which interface to use for flash erase, programming or read. An
example of flash erase choosing the OQSPI interface is shown
next.
6
Reset polarity selection
DUT reset polarity is now configurable.
7
2Mbaud UART baud rate
Support of 2Mbaud UART baud rate.
8
Removed barcode scanner
support
The feature of scanning BD addresses using a barcode scanner
was removed.
9
Removed feature VBAT as Reset
Power cycle and DUT reset can only be done using VBAT Only
and VBAT On with Reset.
10
Removed support for using
DA1468x DK as current
measurement instrument.
Using DA1468x DK as current measurement instrument was
removed because it requires extra calibration steps that makes it
difficult to safely be used in production.
11
Low level debug log files flush
Low level debug logs are flushed continuously. No need to close
the application executable anymore for the log files to be updated.

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4 Introduction
By using the PLT, it is possible to test, calibrate and load firmware for 16 different devices under test
(DUTs) in parallel.
The following are a list of parts delivered with the tool:
●Hardware
○Main board (Figure 1) together with a DA14580-QFN48 Golden Unit (GU)
○Electrical schematics
○Gerber files
○Bill of Materials
●Software
○Source code files organized in a Microsoft®Visual Studio Express 2017 solution
○Application executables and required DLLs
●Documents
An example of a sequence of actions the tool performs is given below. All actions are performed in
parallel for up to 16 devices.
1. Download the production test firmware.
2. Perform automatic crystal (XTAL) trimming.
3. Perform RF RSSI test.
4. Download and burn the customer firmware (into OTP, QSPI flash).
5. Burn the OTP header.
6. Perform Scan test. Reset the DUTs and set the GU to scan for the DUT Bluetooth®LE
advertisements.
Figure 1: Production Line Tool Hardware

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5 Hardware
5.1 Hardware Block Diagram
The Production Line Tool hardware consists of various blocks, as illustrated in Figure 2. These
blocks are explained below.
●Blue blocks: USB-to-UART interfaces
○Four FT4232 FTDI QUAD USB-to-UART interfaces are used for a 16-channel USB-to-UART
conversion
○The GU is connected to the PC via an FT232 FTDI USB-to-UART interface
●Red block: A CPLD that has the following purpose
○Switch UART signals between the PC USB-UART and DUTs
○Switch DUTs VBAT signal
○Switch DUTs VPP signal (only when VBAT is enabled)
○Produce Reset signal to the DUTs
○Produce very accurate 300 ms or 500 ms XTAL calibration pulse
●Orange block: A Golden Unit (GU) is mounted, which has the following functionality:
○CPLD control using custom commands
○Transceiver for Bluetooth RF signals to and from the DUTs
○Produce an audio tone using PWM, used for audio testing
○Scan for device Bluetooth®LE advertisements, after the customer firmware has been
programmed
●Purple blocks: Sixteen (16) device connectors
Figure 2: Production Line Tool Hardware Board Block Diagram
USB HUB
FT4232
FT4232
FT4232
FT4232
CPLD
Golden Unit
USB Cable 2
FT232
USB Cable 1
Production Line Tool Hardware
URX/UTX
URX/UTX
URX/UTX
URX/UTX
4x URX/UTX
4x URX/UTX
4x URX/UTX
4x URX/UTX
Control &
Commands
URX/UTX
DUT1 DUT2 DUT3 DUT16
VPP Enable
VBAT Enable
XTAL trim pulse

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5.2 Printed Circuit Board Layout
In Figure 3, the top view of the PLT board is illustrated. The important parts are pointed by the
orange boxes. The VPP jumper and the Current jumper are colored in blue.
The Golden Unit has a DA14580 QFN48-die soldered. Most of the 48 pins are used to connect to the
CPLD. The CPLD is programmed during the production of the PLT board via the CPLD socket. No
need for the users to use the CPLD socket.
The black banana sockets are all connected to the same ground (GND) plane.
Figure 3: Top View of the PLT Hardware Board
USB/UART
for DUTs
4xFTDI
USB/UART
VBAT
VDDIO
5V
USB/UART
for GU
GU JTAG
Golden
Unit
Antenna or
SMA cable
CPLD
GU reset
VPP
adjust
VPP
jumper
Current
jumper
16x DUTs
CPLD prog.
socket

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5.3 PLT Power Supply
External power supply is needed for the PLT to run. This should be connected to the banana sockets
shown in Figure 4.
Table 2 shows the voltage and current requirements for each power supply. The blue banana
sockets can be used for device current measurements.
Figure 4: PLT Hardware Power Connections
Table 2: Power Supply Requirements
Power Supply
Voltage (V)
Current (mA)
Buck Mode
Boost Mode
VBAT (Buck mode)
2.4 … 3.3
16 x 20
VBAT (Boost mode)
1.5 … 3.3
16 x 20
VDDIO
2.4 … 3.3
70
70
VDD 5V
4.75 … 5.25
~335
~335
VPP
6.6 … 6.8
16 x 2
16 x 2
5.4 DUT Connector
The Bluetooth®LE devices are connected to the PLT using the DUT1-16 connectors at the edge of
the PLT board. Figure 5 shows the pin-header connections from the Production Line Tool hardware
board to the DUTs. Table 3 describes the purpose of each pin.
Figure 5: Production Line Tool DUT Connections
Production Line Tool
1 2
3 4
5 6
7 8
9 10
XTAL Calibration
Pulse
not used
GND
VPP
RST
VBAT
not used
not used
DUT TX
DUT RX
(pinning 100 mil)
VBAT
DUT TX
DUT RX
VPP
GND
DUT
Only DA14580/1/2/3
RST
CURRENT
CURRENT
GND
VBAT
GND
VDDIO
GND
VDD 5V

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Table 3: PLT Connections to Applications
Header Pin
Name
Description
1
VBAT
Depending on the VBAT/Reset Signals Operation mode (Section 6.9)this can be
used as Voltage supply for the DUT. Due to this connection, no external power
supply is needed for the DUTs. This pin must be connected if there is no other
power supply (e.g., battery).
2
XTAL
Calibration
Pulse
This pin can be used as a reference pulse during the automatic crystal
calibration. More details are given in Section 7.2.6.3. The crystal trim pulse can
also be supplied in the UART RX device pin. This is the recommended scenario.
However, there may be hardware limitations where the UART RX pin cannot be
used. In such cases, the particular PLT header pin should be used.
6
GND
Ground pin. This pin must be connected.
7
DUT TX
This is connected to the device UART TX pin. This pin must be connected.
8
VPP
Not used for DA1470x
9
DUT RX
This is connected to the device UART RX pin. This pin can also provide the
crystal calibration reference pulse for the automatic crystal (XTAL) trim
procedure, as described in Section 7.2.6.3. This pin must be connected.
10
RST
The reset signal must be connected mostly if battery powered devices are used.
A power cycle of VBAT will produce a Power on Reset (POR) in which case the
RST-wire is not needed. However, using the RST signal is faster, whereas VBAT
POR needs time to discharge.
5.5 Data Streaming
Figure 6, Figure 7 and Figure 8 illustrate the three possible data streams through the CPLD. The
CPLD switches S1, S2, S3 and S4 are controlled by the software via the Golden Unit.
5.5.1 Normal Operation
●UART-RxD data is transported via the RED arrows (AA):
PC ➔USB ➔USB HUB ➔Quad UART ➔CPLD signal ‘AA’ ➔DUT RxD (programmed as
RxD).
●UART-TxD data is transported via the BLUE arrows (BB):
PC USB USB HUB Quad UART CPLD signal ‘BB’ DUT TxD.
Figure 6: CPLD UART Data Streams
`
Golden
Unit
Quad
UART
Quad
USB
HUB
PC USB
1
3
5
7
9
2
4
6
8
10
g
r
u(x)
Tg
Tr
CPLD
1
2
3
4
PC USB
l(x) x(x)
VDDIO Vbat
v(x)
&
Vpp
gnd
DUT Connection Port
1
0
1
0
‘0’0
1
‘1’
0
1
u(x)
p(0/1)
t(0...3)
Vbat
DUT-
Tx
Reset
Vpp
Pulse
DUT-
Rx
UART-Tx UART-Rx
S1 S2
S3 S4
AA
BB
r(xx)
16 * Virtual COM-PORT
1 * Virtual COM-PORT
16 * DUT Interface Switches + Connection Ports

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5.5.2 Crystal Trimming
●The XTAL calibration pulse (300 ms or 500 ms) is transported via the PURPLE arrows
(CC):
CPLD TIMER Tg ➔CPLD S4 ➔DUT RxD (programmed as GPIO).
●UART-TxD data is transported via the BLUE arrows (BB):
PC USB USB HUB Quad UART CPLD signal ‘BB’ DUT TxD.
Figure 7: CPLD XTAL Trim Pulse Data Stream
5.5.3 Loopback Operation
Loopback operation is used during the start of the tests. The PLT software uses this feature to
automatically find the numbers of the Virtual COM ports in the Windows PC.
●The UART loopback data is transported via the GREEN arrows (DD):
PC ➔USB ➔USB HUB ➔Quad UART ➔CPLD signal ‘DD’ SW1 ➔Quad UART ➔USB
HUB ➔USB ➔PC.
Figure 8: CPLD UART Loopback Data Stream
Note: The CPLD is also used to switch the UART signals between the QUAD FTDIs and the DUTs.
When the VBAT is switched off and the UART wires are not disconnected, a ‘rest voltage’ may be
`
Golden
Unit
Quad
UART
Quad
USB
HUB
PC USB
1
3
5
7
9
2
4
6
8
10
g
r
u(x)
Tg
Tr
CPLD
1
2
3
4
PC USB
l(x) x(x)
VDDIO Vbat
v(x)
&
Vpp
gnd
DUT Connection Port
1
0
1
0
‘0’0
1
‘1’
0
1
u(x)
p(0/1)
t(0...3)
Vbat
DUT-
Tx
Reset
Vpp
Pulse
DUT-
Rx
UART-Tx UART-Rx
S1 S2
S3 S4
BB
CC
r(xx)
16 * Virtual COM-PORT
1 * Virtual COM-PORT
16 * DUT Interface Switches + Connection Ports
`
Golden
Unit
Quad
UART
Quad
USB
HUB
PC USB
1
3
5
7
9
2
4
6
8
10
g
r
u(x)
Tg
Tr
CPLD
1
2
3
4
PC USB
l(x) x(x)
VDDIO Vbat
v(x)
&
Vpp
gnd
DUT Connection Port
1
0
1
0
‘0’0
1
‘1’
0
1
u(x)
p(0/1)
t(0...3)
Vbat
DUT-
Tx
Reset
Vpp
Pulse
DUT-
Rx
UART-Tx UART-Rx
S1 S2
S3 S4
DD
r(xx)
16 * Virtual COM-PORT
1 * Virtual COM-PORT
16 * DUT Interface Switches + Connection Ports

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present on the product. This could cause problems with the power-on reset (POR) and the product
might not boot correctly. The CPLD will switch off the UART signals when the VBAT is not present.
5.6 Golden Unit
Figure 9: Golden Unit
The Golden Unit (GU) is a 'daughter' board mainly used in the DA1458x Expert Development Kit
Ref [2]. In the PLT, the GU is used for various purposes:
●RF transmitter for the RF RSSI DUT test
●RF receiver for the device Bluetooth®LE advertisement scan test
●Audio tone generator for the audio test (not supported in DA1470x family of products)
●Controlling the CPLD
The GU uses an SPI Flash memory mounted on the PLT board. The SPI Flash is pre-programmed
with a specific production test firmware. If required, there are several ways to upgrade the GU
firmware, either via the PLT’s GU JTAG connector, via the UART or using the GUI application
executable (GU_fw_upgrade.exe) as explained in Section 7.5. The latest GU firmware can be found
inside the latest PLT software release, under the executables\binaries\GU folder.
Note: PLT v4.3 and onwards requires the latest firmware version of the Golden Unit. If the Golden
Unit firmware is not updated, then the PLT applications will not run.
Note: The Golden Unit is calibrated during PLT production. It is delivered with a calibration
characterization document.
5.6.1 GU Reset
The Golden Unit includes a hardware reset circuit. The GU reset signal is connected to an FTDI
FT232 GPIO pin.
Figure 10 illustrates the electrical schematics of the GU reset circuit. Section 5.8.2 illustrates the
jumper positions on the PLT PCB.
The red line is the connection between the FTDI IC GPIO pin (DTR) and the GU reset signal on the
PLT GU connector header. The PLT software controls this pin via the FTDI DLL driver ftd2xx.dll.
Making pin DTR low for a short period of time will reset the GU. Every time the PLT tests start, a
hardware reset is issued to the Golden Unit. Jumper J47 should be ON and J46 OFF for this reset
method to operate.