Renesas CCE4510 User manual

User Manual
CCE4510 Evaluation Board
Feb 28, 2022
Page 1
© 2022 Renesas Electronics
1. ABSTACT
The CCE4510 evaluation board is designed to evaluate and demonstrate the CCE4510 IO-Link Master IC with
integrated frame handler.
Contents
1. ABSTACT........................................................................................................................................................ 1
2. INTRODUCTION ............................................................................................................................................. 2
3. SYSTEM REQUIREMENTS............................................................................................................................ 2
4. FEATURE OVERVIEW ................................................................................................................................... 3
5. GETTING STARTED....................................................................................................................................... 3
6. POWER SUPPLY............................................................................................................................................ 3
7. SECTIONS OF THE CCE4510 EVALUATION BOARD................................................................................. 4
IO-Link Section ................................................................................................................................................4
MCU Section....................................................................................................................................................4
8. SCHEMATIC AND LAYOUT........................................................................................................................... 5
Connectors....................................................................................................................................................... 5
Schematic........................................................................................................................................................ 6
Layout.............................................................................................................................................................. 8
9. BILL OF MATERIALS................................................................................................................................... 11
10. REVISION HISTORY..................................................................................................................................... 12
11. REFERENCES ..............................................................................................................................................12
12. STATUS DEFINITIONS................................................................................................................................. 12
Corporate Headquarters ..................................................................................................................................... 12
Contact information............................................................................................................................................. 12
Trademarks .......................................................................................................................................................... 12

CCE4510 Evaluation Board User Manual
Feb 28, 2022
Page 2
2. INTRODUCTION
The board is divided into two sections:
●IO-Link Section
The IO-Link section contains two CCE4510 including all necessary periphery to use the two CCE4510 for
IO-Link communication.
●MCU Section
The MCU section contains a LPC1549 32-bit ARM Cortex-M3 microcontroller from NXP to control the
CCE4510 Master ICs. The MCU is powered by an LDO with 3.3 V output voltage.
For maximum flexibility, the sections can be used separately and independently from each other. This allows to
evaluate the CCE4510 Master IC with every suitable MCU.
The evaluation board is compliant to IO-Link Interface and System Specification V1.1.2
Figure 1: System Diagram
3. SYSTEM REQUIREMENTS
The CCE4510 evaluation board is ready to use with a preinstalled IO-Link master stack.
To get started, the following tools are required:
●Power Supply 24V
●USB Cable (Micro USB type B)
●Debug probe (for programming via SWD)

CCE4510 Evaluation Board User Manual
Feb 28, 2022
Page 3
4. FEATURE OVERVIEW
■ARM Cortex-M3 Microcontroller
■On-Board 3.3 V LDO
■16 kB EEPROM
■Programmable via USB or Serial Wire Debug
(SWD)
■Status LED indicator
■External NMOS gate drivers
■24 V supply voltage
■Two CCE4510 IO-Link Master Transceiver ICs
■4 IO-Link channels
■4 Status LED indicators for IO-Link channels
■Additional on-board protection circuitry
■All pins accessible via pin-headers
□For microcontroller and IO-Link Master ICs
■Independent use of sections
5. GETTING STARTED
There are two different possibilities to program the CCE4510 evaluation board:
●Programming via USB
●Programming via SWD
To program via USB:
1. Connect pin MAS_INT (JP1 pin 5) to GND
2. Connect USB to PC
3. Power on the Evaluation Board (24V)
4. The microcontroller will now be recognized as USB mass storage
5. Copy any program on the microcontroller
To program via SWD
1. Connect debug probe to SWD connector
2. Connect USB to PC (USB 5V supply is needed) OR Connect USB_VBUS (JP1 pin 3) to +3.3V
3. Power on the Evaluation Board (24V)
4. Start programming with your preferred SDK
6. POWER SUPPLY
The CCE4510 Evaluation Board needs a 24 V power supply connected to JP2 pins 23 / 24. An on-board 3.3 V
LDO (placed on the MCU section) supplies the microcontroller as well as the CCE4510 ICs.
When using the IO-Link section independently from the MCU section it must be ensured that both voltages
(3.3 V and 24 V) are present at the IO-Link section.

CCE4510 Evaluation Board User Manual
Feb 28, 2022
Page 4
7. SECTIONS OF THE CCE4510 EVALUATION BOARD
The CCE4510 Evaluation Board is divided into two sections.
Both sections can be used in combination with an IO-Link Master software stack to evaluate a fully functional,
ready-to-use IO-Link Master.
If required, both sections can also be used independently of each other. The connection between the sections
can be disconnected by cutting them open between the cutting marks (see Figure 2). Make sure not to break the
evaluation board in this process.
To reestablish the connections, pin-headers with 2.54 mm pitch can be used.
Figure 2: Cutting Marks
IO-Link Section
The IO-Link section contains two CCE4510 IO-Link master ICs, external NMOS gate drivers (U4, U6), four LED
indicators for channel activities and protection circuitry. Each IO-Link channel (L+, CQ, L-) can be accessed via
a terminal block (X2, X3, X4, X5). For maximum accessibility to the CCE4510 IO-Link Master ICs, all relevant
pins of the CCE4510 ICs are connected to pin-headers JP3 and JP4.
MCU Section
The MCU section contains an ARM Cortex-M3 processor from NXP (LPC1549), a 3.3 V LDO (U2) for power
supply, a 16 kB EEPROM (U7) and a status LED (LED5). The microcontroller can be programmed via USB
(mass storage device) or via SWD. For maximum accessibility of the LPC1549, all relevant pins are connected
to pin-headers JP1 and JP2.

CCE4510 Evaluation Board User Manual
Feb 28, 2022
Page 5
8. SCHEMATIC AND LAYOUT
Connectors
Figure 3 shows all connectors of the CCE4510 Evaluation Board. It is possible to access all pins of the MCU and
the CCE4510 master ICs through these connectors.
Figure 3: Connectors

CCE4510 Evaluation Board User Manual
Feb 28, 2022
Page 6
Schematic
Figure 4: Schematic 1

CCE4510 Evaluation Board User Manual
Feb 28, 2022
Page 7
Figure 5: Schematic 2

CCE4510 Evaluation Board User Manual
Feb 28, 2022
Page 8
Layout
Figure 6: Layout TOP
Figure 7: Layout MID1 (Supply)

CCE4510 Evaluation Board User Manual
Feb 28, 2022
Page 9
Figure 8: Layout MID2 (GND)
Figure 9: Layout BOTTOM

CCE4510 Evaluation Board User Manual
Feb 28, 2022
Page 10
Figure 10: Layout Assembly