Renesas RZ/N1D Series User manual

Quick Start Guide
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RZ/N1D Group
CONNECT IT! ETHERNET RZ/N1D-DB
Introduction
RZ/N1 is a family of scalable ARM® based industrial Ethernet switches. Due to the integrated performant
ARM® Cortex®-A7 CPU, they are ideal choice for building products such as Programmable Logic Controllers
(PLC), complex remote-IO slaves, industrial switches, gateways or operator terminals.
RZ/N1 Family consists of three devices, out of which the RZ/N1D, is an industrial ethernet communication
System on Chip with 5-ports, in a 400BGA package.
This guide shall assist you to quickly start with your evaluation of the RZ/N1D device on the related Solution
Kit board(s) and the Solution Kit software and documentation. It represents a short guide for the first time users
with the instructions for the first startup of the board.
In addition to this document, please be aware of the extensive documentation on RZ/N1 devices, evaluation
boards and software that you may find in the Solution Kit Documentation directory.
The Solution Kit boards can solely be used for evaluation purposes. It is not allowed to use the boards for
commercial purposes.
List of reference documents
Document name
User’s Manual: System Introduction, Multiplexing, Electrical and Mechanical Information
User’s Manual: System Control and Peripheral
User’s Manual: Peripherals
User’s Manual: R-IN Engine and Ethernet Peripherals
User’s Manual: Generic Open Abstraction Layer
RZ/N1D Development Board Schematic
RZ/N1D Development Board Setup Notes
RZ/N1 U-Boot User Manual
RZ/N1 Linux User Manual

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List of Abbreviations and Acronyms
Abbreviation
Full Form
API
Application Programming Interface
BSP
Board Support Package
CO
CANopen Bus Protocol
DLR
Device Level Ring Protocol
EtherCAT / ECAT
EtherCAT Network Protocol
EtherNet/IP / EIP
EtherNet/IP Network Protocol
EPL
Ethernet POWERLINK Network Protocol
PNIO
PROFINET IO Protocol
PROFINET
Process Field Network Protocol
lwIP
Lightweight IP Protocol
GOAL
Generic OS Abstraction Layer, Communication Framework on RZ/N1x
LLDP
Link Layer Discovery Protocol
NVM
Non-volatile memory
OS
Operating System
RT
Real-Time
API
Application Programming Interface
HW
Hardware
SW
Software
HSR
High-Availability Seamless Redundancy Protocol
PRP
Parallel Redundancy Protocol
IBIS
I/O Buffer Information Specification for pin signal simulation
EtherCAT is registered trademark and patented technology, licensed by Beckhoff Automation GmbH, Germany.
Sercos is a registered trademark of Sercos International e.V.
Ethernet POWERLINK is the registered trademark of Ethernet POWERLINK Standardization Group (EPSG).
CAN(Controller Area Network)：An automotive network specification developed by Robert Bosch GmbH of Germany
ARM is a registered trademark of ARM Limited (or its subsidiaries) in the EU and/or elsewhere. All rights reserved.
All registered trademarks or trademarks are the property of their respective owners.

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1. Overview
The following chapters will help you setup the hardware and software environment and run a sample
application on your RZ/N1L evaluation board.
•The Solution Kit is being actively updated and new versions of it are iteratively released
•Current version of Solution Kit is providing a snapshot of the latest software and documentation
versions at the release time
The CONNECT IT! ETHERNET RZ/N1D Solution Kit is based on the RZ/N1D, a 5-port, industrial Ethernet
communication SoC in a 400BGA package. The device features two independent blocks integrated in a single
package –a communication block based on the proven multi-protocol R-IN Engine, as well as an application
block with a dual ARM® Cortex®-A7 and a variety of peripherals, including a DDR memory interface required
for rich operating systems like Linux. Along this external memory the RZ/N1D additionally includes 2 MB
internal SRAM. The RZ/N1D Solution Kit contains everything you need for fast evaluation and rapid prototyping
of multiple industrial Ethernet protocols.
The RZ/N1D Solution Kit contains
•RZ/N1D CPU Development Board
•IAR I-jet Lite debugger (incl. 20pin flat ribbon and USB-micro/A cable)
•USB Cable Micro / Type-A
•DVD RZ/N1x-DB Solution Kit for all RZ/N1x devices / boards
Additionally, one can order the RZ/N1-EB Expansion Board separately, that provides the user with the
possibility to use an expanded range of functionalities and RZ/N1D interfaces. RZ/N1-EB kit contains:
•RZ/N1-EB Expansion Board
•Power Supply 24V/750mA
•Power Supply Primary Adapters Euro/UK/JPN-US
The expansion board has no stand-alone capability and requires an RZ/N1D or RZ/N1S CPU board.
Figure 1-1: RZ/N1D Functional and HW overview

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2. Hardware Setup
2.1 CPU Demo Board Setup
To get started quickly with the board, please identify the connectors on the RZ/N1D-DB CPU Board.
Figure 2-1: Board connectors overview

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1. Switches and Jumpers
Please take care that the following switches are set according to the tables below.
Table 1: RZ/N1D GPIO Multiplexer DIP-Switch SW2
Number
SW ON (low)
SW OFF (high)
Setting
1
RMII/MII
LCD
OFF
2
CAT/S3
PMOD
ON
3
MSEBI
Mixed
OFF
4
RMII2
SPI5
OFF
5
USB 1x Host 1x Device
USB 2 x Host
ON
6
ARM Debug
FTDI Debug
ON
7
Segger Debugger
No connection
OFF
8
I-Jet Debugger
No connection
OFF
Table 2: RZ/N1D Config DIP-Switch
Switch
SW ON (white bar)
SW OFF
Setting
W1
JTAG Mode
ARM Coresight Mode
OFF
W2
RXCLK4 from PHY
RXCLK4 from GPIO61
ON
W3
Boot Mode NAND
Boot Mode QSPI/USB
OFF
W4
RXCLK5 from PHY
RXCLK5 from GPIO61
ON
W5
LCD pull up
LCD pull down
ON
W6
LCD pull up
LCD pull down
ON
Table 3: Jumper Settings RZ/N1D-DB
USB Power
Jumper
On Setting (default)
Off Setting
CN6
Power from USB
Power from ext. Supply
SRESET from Debugger to RZ/N1D
Jumper
On Setting (default)
Off Setting
CN7
RZ/N1D is connected with the
SRESET from the Debugger
Debugger cannot reset the CPU
MRESETout
Jumper
On Setting
Off Setting (default)
CN8
MRESETOUT is connected to
the Debugger
Debugger cannot detect any
internal CPU reset
USB Host/Device Mode
Jumper
On Setting
Off Setting (default)
CN2
OTG mode ID
Device Mode ID

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Table 4: Boot config dip switches
The single dip switches are used to select the power on setup.
Boot Mode
Switch
On Setting (white bar) (default)
Off Setting
W3
Boot Mode NAND
Boot Mode QSPI / USB
Debug Mode
Switch
On Setting (white bar)
Off Setting (default)
W1
JTAG Mode
ARM Coresight Mode

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GPIO Pull up
Switch
On Setting (white bar) (default)
Off Setting
W5
LCD [145:127,73:62] pull up
LCD [145:127,73:62] pull down
GPIO Pull up
Switch
On Setting (white bar) (default)
Off Setting
W6
LCD [111:105,59:36] pull up
LCD [111:105,59:36] pull down
Table 5: Ethernet RX Clock
ETH4: RX_CLK
Switch
On Setting (white bar) (default)
Off Setting
W2
RXCLK4 from Phy
RXCLK4 from GPIO61
ETH5: RX_CLK
Switch
On Setting (white bar) (default)
Off Setting
W4
RXCLK5 from Phy
RXCLK5 from GPIO61
Instead of QSPI it is possible to boot from USB, if SW5 is pressed down during the RESET.
Table 6: Push buttons
SW5:
Boot Mode Select
Switch
On Setting
Off Setting
SW5
Boot from USB
Boot from QSPI
Table 7: Reset and NMI switches
SW3:
Power On Clear
Switch
On Setting
Off Setting
SW3
POR Reset
Release POR Reset
SW4:
Soft Reset
Switch
On Setting
Off Setting
SW4
Soft Reset
Release Soft Reset
SW6:
NMI
Switch
On Setting
Off Setting
SW6
Generate CM3 NMI
Release CM3 NMI

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If you are using the expansion board together with RZ/N1D CPU Board, please remove the jumper
CN6.
1. JTAG Debug Connector
This connection is required for software development purposes, to be able to run and debug the
software on the target. The IAR Debugger cable has one unused key pin, therefore pin 7 of the J2
connector should be cut or bent, as shown below. After this step, you can attach your I-jet debugger
to the board via JTAG cable to the PC via USB.
Figure 2-2: Connector J2 with removed pin 7
Figure 2-3: I-Jet Debugger Connector
2. Power connector and serial-over-USB
The board is powered via USB connector CN10, if not attached to the expansion board. If you use
the CPU board standalone, please make sure that the jumper CN6 is ON, otherwise OFF. Please
connect the board to your PC via USB cable to the connector CN10. The same interface is used for
serial UART communication with the board, so if you have a windows PC, after connecting the

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board via USB, you should be able to see a new device registered 4 new USB Serial COM ports.
You may use any of the terminal emulator on your PC to open a serial port connection to the board.
The board uses the 3rd port for UART output at 115200,8,n,1. On Linux PCs, if you have no other
serial-over-USB devices attached, this is accessed using /dev/ttyUSB2, provided you do not have
any other USB devices attached.
Figure 2-4: Power connector and serial over USB
If the board is not recognized by Windows, please install the FTDI driver that you may find under
…\YCONNECT-IT-RZN_V1.x\Tools\FTDI.
You can perform a soft-reset of the board by pressing SW4.
3. Ethernet Interface
The Ethernet connection to the PC or a PLC can be prepared using one of the two RJ-45 connectors
CN4 or CN1 (for an overview of connectors please check Figure 2-1). For running any Ethernet
fieldbus sample program, you can use any of the two connectors. There are two PHY Micrel chips
connected to these RJ-45 connectors.
If you are using the expansion board, Ports J23 and J24 can be used of real-time Ethernet and port
J22 is reserved for Linux. You can connect J22 to a dedicated Network Interface Card (NIC) on your
PC to open a secure shell to Linux. Linux accesses GMAC1 on the RZ/N1 device.

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2.2 Expansion Board Setup
If you are using the expansion board together with your RZ/N1D CPU Board, here you may find some setup
notes for it. The expansion board comes with an external power supply to drive the expansion board and the
RZ/N1x CPU board plugged onto the connectors J1 and J2. Please note the position of the power supply
selection jumper below and ensure that the 12…24V position is chosen. This board expands the RZ/N1D or
RZ/N1S CPU boards with 3 Gbit PHY ports, an SD-Card slot, a USB Host as well as CAN, RS232, RS485,
PMODs, LCD display interface with integrated touch screen, etc.
Figure 2-5: RZ/N1-EB Expansion Board Overview

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If using the RZ/N1-EB expansion board, please ensure the following jumper and switch settings.
Table 8: Expansion Board switch settings
CN10
CAN Rx
Connect pins 1 and 2 (CAN2)
CN11
CAN Tx
Connect pins 1 and 2 (CAN2)
CN15
PHY2/PHY3 MDC
Connect pins 2 and 3 (MDIO2)
CN16
PHY2/PHY3 MDIO
Connect pins 2 and 3 (MDIO2)
CN17
PHY1 MDC
Connect pins 1 and 2 (MDIO1)
CN18
PHY1 MDIO
Connect pins 1 and 2 (MDIO1)
J18
I2C SDA
Connect pins 1 and 2
J18
I2C SCL
Connect pins 3 and 4
W6
CAN Isolation
NO_ISO
W7
CAN Power
NO_ISO
IMPORTANT INFORMATION: Please take care about using the right 5V power supply when modifiying the
power scheme with CN14 from 12-24V to 5V! A wrong power supply can destroy the Expansion board and the
CPU board powered via the circular power supply connector J4!

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3. Software Setup
RZ/N1D Solution Kit contains a software package on a DVD (also downloadable on Renesas’ official website)
that enables the user to evaluate various functionalities of our industrial automation multi-core chip.
The software for RZ/N1D comes as either IAR compilable code for Cortex A7 and Cortex M3, or as Linux and
U-boot that run on Cortex A7. ThreadX and the software running on Cortex M3 are compiled with IAR compiler.
Linux and U-Boot are provided as ready binaries to run on the board. If you have the desire to compile the
Linux kernel or U-boot, you need GNU environment and you can refer to the documentation in YCONNECT-
IT-RZN_V1.X\Software\U-Boot-and-Linux\Documentation.
Since the protocol stacks are running on the Cortex-M3 part, you need to install IAR Embedded Workbench
for ARM (EWARM) for compiling and running the software on Cortex M3.
Table 9 gives an overview of development environments and available operating systems for both cores.
Table 9: Development Environment for RZ/N1D
Device
RZ/N1D
CPU
Cortex-A7
Cortex-M3
(R-IN engine)
OS
Linux or ThreadX
uITRON
(HWRTOS)
IDE
Linux
ThreadX
IAR EWARM
Bootloader
U-Boot*
*U-Boot is used as bootloader, it runs on Cortex A7, but it can boot Images to be executed on
both cores.
Please follow the below steps to setup the software environment for RZ/N1D.
1. Install IAR EWARM
As the first step in software setup, please install the IAR EWARM -> installation file for IAR EWARM
8.30.2 can be found under YCONNECT-IT-RZN_V1.x\Tools\IAREWARM.
Please note that the current RZ/N1D software from the Solution Kit was tested only with IAR EWARM
v8.30.2. During the installation process, you will be prompted to select your license type. For evaluation
purposes, you can first choose the 30-day license, if you need the license for a longer period, please
contact RZ/N1 support team - [email protected]esas.com.

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During the installation process, you can continue with the steps below.
2. Locate the RZ/N1D IAR software projects in the Solution Kit
The software is stored in the folder YCONNECT-IT-RZN_V1.x\Software in the Solution Kit. This folder
consists of software packages for all RZ/N1 platforms, not only for RZ/N1D. It is therefore important to
mention which projects are meant for being executed on RZ/N1D and how to differentiate between
projects running on Cortex A7 and on Cortex M3. Table 10 gives an overview about that.
More detailed software documentation can be found under YCONNECT-IT-
RZN_V1.x\Documents\RZN.Software. The IAR projects represent a collection of required source
files to build an executable and run it on the target.
Table 10: Overview of IAR Projects for RZ/N1D
IAR Project
Description
CPU
Path to the workspace file in the Sol. Kit
YCONNECT-IT-RZN_V1.x\Software\...
x-ware*
Set of projects
running on the
Cortex A7
including ThreadX,
NetX Duo and
GUIx sample
applications
Cortex A7
\ThreadX\rzn1\iar\x-ware_platform.eww
ThreadX\rzn1_smp\iar\x-ware_platform.eww
GOAL
Projects**
Several example
projects showing
the different
functionalities for
the switch
management and
GOAL
Cortex M3
\GOAL\goal\projects\00410_goal\
Protocol
Stack
Projects***
Several Protocol
Stack slave
application
examples, which
are running I/O
communication
between a PLC
and RZ/N1D
Cortex M3
\GOAL\goal\projects\goal_co_lib\
\GOAL\goal\projects\goal_ecat\
\GOAL\goal\projects\goal_eip_lib\
\GOAL\goal\projects\goal_epl_lib\
\GOAL\goal\projects\goal_mbs\
\GOAL\goal\projects\goal_pnio_lib\
* x-ware User Guide:
\YCONNECT-IT-RZN_V1.X\Documents\RZN.Software\ThreadX\X-Ware_Platform_RZ_N1_User_Guide.pdf
Please be aware the projects ending with _smp in their names are meant to be executed on RZ/N1D only
(Symmetric Multi-Processing).
** GOAL application notes document:
\YCONNECT-IT-RZN_V1.X\Software\GOAL\doc\r11qs0008ed0131-rzn1-goal-quick-startguide-management.pdf
*** Protocol Stack quick start guides:
\YCONNECT-IT-RZN_V1.X\Documents\RZN.Software\GOAL\
r01an4239ej0110_rzn1_EtherCAT.pdf

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r11qs0012ed0131-rzn1-goal-quick-startguide-canopen.pdf
r11qs0007ed0131-rzn1-goal-quick-startguide-eip.pdf
r11qs0010ed0131-rzn1-goal-quick-startguide-profinet.pdf
r01an4412ej0120-rzn1_Modbus.pdf
r11qs0009ed0131-rzn1-goal-quick-startguide-powerlink.pdf
Please note that there are multiple variants of IAR GOAL projects, one for each board configuration:
…\rzn1d_demo_board\rzn1d_demo_board.eww –RZ/N1D CPU Board
…\rzn1d_demo_board_eb\rzn1d_demo_board_eb.eww –RZ/N1D CPU Board + Expansion B.
…\rzn1l_demo_board\rzn1l_demo_board.eww –RZ/N1L CPU Board
…\rzn1s_demo_board\rzn1s_demo_board.eww –RZ/N1S CPU Board
…\rzn1s_demo_board_eb\rzn1s_demo_board_eb.eww –RZ/N1S CPU Board + Expansion B.
Please also note that ThreadX IAR workspace from the table above consists of IAR projects for both
RZ/N1S and for RZ/N1D. RZ/N1S can run only non “_smp” applications.
3. Locate Linux, DTB and U-Boot binaries
Linux and U-Boot binaries are to be found in the solution kit under:
U-Boot for RZ/N1D
YCONNECT-IT-RZN_V1.X\Software\U-Boot-
and-Linux\u-boot\binaries\u-boot-rzn1d400-
db.bin.spkg
Linux Kernel
YCONNECT-IT-RZN_V1.X\Software\U-Boot-
and-Linux\kernel\binaries\uImage
Device Tree Blob
YCONNECT-IT-RZN_V1.X\Software\U-Boot-
and-Linux\kernel\binaries\uImage-rzn1d400-
db.dtb
Linux on RZ/N1 runs on Cortex A7 core and cannot be used parallely with x-ware applications, since
both are running on Cortex A7.
4. Write U-Boot to QSPI flash on the board with DFU utility
As you can see in Table 9, U-Boot is chosen as the bootloader for RZ/N1D. It runs on the Cortex A7,
initializes some of the required interfaces and peripherals and it can be used to load software images for
both cores, by setting the corresponding parameters in the U-boot user console. Without U-Boot, you
cannot initiate the load of your application via IAR I-Jet Debugger to SRAM for executing on the target.
Figure 3-1 provides an overview of execution stages during programming U-Boot in Flash and later when
U-Boot is configured to load Cortex M3 and Cortex A7 Images from Flash to SRAM (ThreadX, R-IN Engine)
or DDR (Linux) and execute them.
After hardware reset, BootROM will start looking for the U-Boot package in QSPI flash. Therefore, you
need to write U-Boot in QSPI flash. This is done via USB DFU (Device Firmware Update). SW5 button
pressed together SW4 signals to BootROM, to switch the boot mode from QSPI to USB DFU. This is
required only once, to load U-Boot to SRAM. In the next step, you will write the U-Boot in flash. Please
make sure to connect CN9 on the board to a USB Host connector on your PC. This provides USB
DFU.

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a. Find the Windows version of dfu-util in the solution kit under YCONNECT-IT-RZN_V1.X \Tools\dfu-
util. Alternatively you can download this dfu-util command line version on
https://sourceforge.net/projects/dfu-util/files and unpack the zip file. No installation is required, where
this document tells you to run dfu-util, simply run the dfu-util-static.exe –the Windows executable from
a Windows command prompt. If you are running Linux on your PC, install the “dfu-util” package: sudo
apt-get install dfu-util.
b. Start the DFU target
Connect your RZ/N1 board to your Windows PC using the USB cable, and reset your board in “Boot
from USB” mode (i.e. using DFU) -> press SW5 and SW4 together.
c. Register the USB device (should be done only once)
You must register the USB Download Gadget device with the libusbk driver, you only need to do this
once. On your Windows PC:
oDownload Zadig from http://zadig.akeo.ie/downloads/zadig-2.3.exe
oLaunch Zadig, select "List All Devices" from the Options menu.
oSelect "RZN1 DFU" from the pull-down list. Please note that the device might appear as “USB
Download Gadget”
oSelect "libusbK" from the Target Driver list (to the right of the green arrow).
oClick the "Install Driver" button, this will take some time.
oQuit Zadig
d. Connect CN10 on the board to a USB Host connector on your PC. This provides Serial-over-USB
and JTAG-over-USB services. Open a terminal emulator client like TeraTerm or putty, choose the
corresponding serial port, where you board is registered to and set the following serial port settings.
On Linux PCs, if you have no other serial-over-USB devices attached, this is accessed using
/dev/ttyUSB2.
Executes in SRAM
Executes in ROM
Programming
Boot from
USB DFU
BootROM
read: USB DFU
write: SRAM
U-Boot
read: USB DFU
write: QSPI
Development
Boot from
SPI Flash BootROM
read: QSPI
write: SRAM
U-Boot
read: QSPI
write: SRAM, DDR
R-IN Engine (CM3)
ThreadX
Executes in DDR
Linux Kernel
Figure 3-1: Flash and Boot Sequence

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e. On the board, hold down switch SW5 (to select DFU boot mode instead of QSPI) and press switch
SW4 (soft reset). The RZ/N1 serial port should output:
** BOOTLOADER STAGE0 for RZN1 **
Boot source: USB
Download U-Boot to SRAM. On your host PC run:
dfu-util.exe -D "u-boot-rzn1d400-db.bin.spkg" in Windows from a Windows
command prompt
sudo dfu-util -D u-boot-rzn1d400-db.bin.spkg in Linux from a terminal
U-Boot should now run in SRAM and the RZ/N1 serial port presents you a console, like this:
Model: RZ/N1D Demo Board
DRAM: 256 MiB
MMC: sdhci@0x40100000: 0
SF: Detected mx25l25635f with page size 256 Bytes, erase size 64 KiB,
total 32 MiB, mapped at 10000000
In: serial@0x40060000
Out: serial@0x40060000
Err: serial@0x40060000
Net: , dwmac.44002000
Hit any key to stop autoboot: 1
Note: If your board has previously been used and already has U-Boot environment variables
programmed into QSPI flash, U-Boot may attempt to start running the commands specified by the
bootcmd env variable. Interrupt this by pressing any key.
In addition to the above DFU command line tool, RZ/N1 Solution Kit provides a graphical dfu_prog
tool. You may find it under YCONNECT-IT-RZN_V1.X\Tools\dfu-util.exe and YCONNECT-
ITRZN_V1.X \Tools\dfu-util\dfu_prog\dfu_prog.exe
dfu_prog.exe opens a window, that allows the user to select the file, that he wants to flash, so in a
way it abstracts the command line tool by providing the graphical user interface to select the files that
user wants to flash. The program generates a Windows command for dfu-util.exe and executes this

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command in a terminal. This way the user does not need to open the command prompt and type the
dfu commands on his own, since they are automatically generated and executed by the program on
user’s host PC.
This tool is for Windows users only and is not compatible with Linux OS.
Prior to executing the command, the user needs to take care that the correct boot mode pins are set
and that the USB connector on the board (CN9 for RZ/N1D and CN3 for RZ/N1S) are connected to
the USB Host on his PC and that U-Boot or BootROM are set in a DFU (USB) mode.
To use this tool, please make sure that the solution kit folder structure is maintained and double click
on YCONNECT-IT-RZN_V1.X\Tools\dfu-util\dfu_prog\dfu_prog.exe.
You may find some brief tool user guidelines about this graphical tool in …\YCONNECT-IT-
RZN_V1.X\Tools\dfu-util\dfu_prog\r30uz0135ed0002-rzn1-dfu-prog-guideline.pdf
f. If your board has been programmed with an older version of U-Boot, the dfu_ext_info environment
variable may be incompatible. If so, at the U-Boot console please run:
env default -f dfu_ext_info
saveenv
g. Ensure the U-Boot/SPL region of QSPI Flash is erased, run:
sf probe
sf erase 0 10000
h. On the U-Boot console, run:
dfu
i. Write U-Boot to QSPI. On your host PC run:

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dfu-util.exe -a "sf_uboot" -D "u-boot-rzn1d400-db.bin.spkg" in Windows
sudo dfu-util -a "sf_uboot" -D u-boot-rzn1s324-db.bin.spkg in Linux
Wait until it completes, the U-Boot console will prompt you to press Ctrl-C when done.
Note: The "sf_uboot" DFU target corresponds to the second region of the QSPI Flash. If there is a
valid SPKG written into the first region ("sf_spl"), the BootROM will load this instead of U-Boot.
Otherwise the BootROM will output messages whilst it looks for the first valid SPKG, like:
STATUS: Valid SPKG header not found (100 QSPI Flash 256-byte blocks read)
j. Press switch SW4 to reset the board, the BootROM will load and run U-Boot showing the following
output on the terminal:
** BOOTLOADER STAGE0 for RZN1 **
Boot source: QSPI
00 BOOTLOADER STAGE0 Success
*** Bootloader stage0 END ***
*** Execute 2nd Stage Bootloader which has been loaded and verified ***
U-Boot 2017.01
Model: RZ/N1D Demo Board
DRAM: 256 MiB
MMC: sdhci@0x40100000: 0
SF: Detected mx25l25635f with page size 256 Bytes, erase size 64 KiB,
total 32 MiB, mapped at 10000000
In: serial@0x40060000
Out: serial@0x40060000
Err: serial@0x40060000
Net: dwmac.44000000, dwmac.44002000
Hit any key to stop autoboot: 0
k. Setup U-Boot environment variables
This sets up the U-Boot environment variables for your board. From U-Boot, set the MAC addresses
corresponding to the MAC address sticker on the board, for example:
setenv -f ethaddr 74:90:50:02:00:FD
setenv -f eth1addr 74:90:50:02:00:FE
Save the environment variables:
saveenv
3.1 Bring up the board with Linux and U-Boot
5. Write Linux to QSPI flash on the board
The following instructions use the U-Boot dfu command to write the kernel dtb, kernel image, and
JFFS2 rootfs into QSPI.
1. On the board, press switch SW4 (soft reset). U-Boot should run and the RZ/N1 serial presents you
with a console.

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2. From U-Boot, run dfu:
dfu
3. Write the dtb to QSPI. On your host PC run:
dfu-util.exe -a "sf_dtb" -D "uImage-rzn1d400-db.dtb" in Windows
sudo dfu-util -a "sf_dtb" -D uImage-rzn1d400-db.dtb in Linux
4. Write the kernel to QSPI. On your host PC run:
dfu-util.exe -a "sf_kernel" -D "uImage"
sudo dfu-util -a "sf_kernel" -D uImage
5. Write the rootfs to QSPI. On your host PC run:
dfu-util.exe -a "sf_data" -D "core-image-minimal-rzn1.squashfs"
sudo dfu-util -a "sf_data" -D core-image-minimal-rzn1.squashfs
6. Wait until it completes, the U-Boot console will prompt you to press Ctrl-C when done
6. Setup U-Boot environment variables
This section sets up the U-Boot environment variables so that it automatically reads the Linux kernel
and DTB from QSPI, then starts Linux.
From U-Boot, set the MAC addresses corresponding to the MAC address sticker on the board, for
example:
setenv -f ethaddr 74:90:50:02:00:FD
setenv -f eth1addr 74:90:50:02:00:FE
The following Linux bootargs setting specifies a read-only rootfs in the QSPI, a read-write JFFS2 file
system in QSPI, and a static IP address for GMAC1 in Linux. The clk_ignore_unused option
ensures Linux does not turn off any clocks to IP blocks that are used by the software running on the
Cortex M3.
setenv bootargs "console=ttyS0,115200 root=/dev/mtdblock7 init=/init
rootwait ip=192.168.1.50:::::eth0 earlyprintk clk_ignore_unused"
The following bootcmd setting makes U-Boot load a 128KB DTB and a 6MB kernel from QSPI, and
start Linux automatically on start up. The offsets into the SPI flash correspond to the DFU sf_dtb
and sf_kernel targets.
setenv bootcmd "sf probe && sf read 0x8ffe0000 b0000 20000 && sf read
0x80008000 1d0000 600000 && bootm 0x80008000 - 0x8ffe0000"
Save the environment variables:
saveenv
7. Run Linux

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Reset the board, you will see the boot messages followed by a log on prompt. This can take quite a
while.
rzn1d400-db login:
Log on with username root.
Now you have Linux running, you can ping your PC’s NIC.
ping 192.168.1.30
You have now successfully started U-Boot and Linux on the Cortex A7. To run software on Cortex M3, you
need to use IAR Embedded Workbench, that you hopefully installed already.
If you wish to use Ethernet within Linux, but do not have an Extension Board, you should use a special
Device Tree file that allows Linux to use GMAC2 via the 5-Port Switch on the RZ/N1 device. Where this
document tells you to use uImage-rzn1d400-db.dtb, instead use uImage-rzn1d400-db-no-cm3.dtb. Note
that the Linux driver for the 5-Port Switch simply configures it as an unmanaged switch. When using this
DTB, connect CN1 on the board to a dedicated Network Interface Card (NIC) on your PC.
NOTE: this setup does not correspond to the default use case of RZ/N1 in industrial switch applications and
with the *-no_cm3.dtb, Cortex M3 (communication core) cannot use industrial ethernet interfaces.
•If you wish to use Ethernet, and are using the Extension Board, you can connect J22 of the
Extension Board to a dedicated Network Interface Card (NIC) on your PC. This is used to access
GMAC1 on the RZ/N1 device.
By default, the board uses static IP addresses, so please ensure your host’s NIC is set up with a static IP
address of 192.168.1.30. This address is set by default in the U-Boot serverip environment variable.
3.2 Running a sample application with IAR EWARM
In the previous section we saw how you can run Linux on Cortex A7. We can now proceed with running a
sample application on the Cortex M3. You need to follow the steps below to load Cortex M3 image in SRAM
and execute it from there. Additionally, you can write the images in flash and load them to SRAM after reset,
by setting the corresponding U-Boot parameters, as described in chapter 3.3.
3.2.1 Run and debug Cortex M3 software from RAM with IAR Debugger
1. Power the board and open a serial terminal to U-Boot as explained in the previous chapters and
reset the board - SW4
2. Open the IAR EWARM 8.30.2 that you previously installed
3. Click on File -> Open Workspace as depicted below