
SAMSUNG Proprietary-Contents may change without notice
ThisDocumentcan notbe used withoutSamsung'sauthorization
SGH-X600 CircuitDescription
2-4
Since theplay dataofYMU762Careinterpretedatanytimethrough FIFO,thelength ofthedata(playing period)isnot
limited,sothedevice canflexiblysupportapplication suchasincoming call melody musicdistribution service.
Thehardwaresequencerbuilt inthisdevice allowsplaying ofthe complexmusicwithoutgiving excessiveloadtothe
CPUoftheportabletelephones.Moreover,theregistersoftheFM synthesizercan beoperated directlyfor real time
sound generation,allowing,forexample,utilization ofvarious sound effectswhen using thegamesoftwareinstalledinthe
portabletelephone.
YMU762Cincludesaspeakeramplifierwith high rippleremovalratewhosemaximumoutput is550mW(SPVDD=3.6V).
Thedevice isalsoequippedwithconventionalfunction including avibratorand a circuit forcontrolling LEDs
synchronouswithmusic.
Fortheheadphone,it isprovidedwithastereophonicoutput terminal.
Forthepurposeofenabling YMU762Cto demonstrateitsfull capabilities,Yamahapurposeto use"SMAF:Syntheticmusic
MobileApplication Format"asadatadistribution format that iscompatiblewithmultimedia.Since theSMAFtakesa
structurethatsetsimportance on thesynchronization betweensound and images,variouscontentscan bewrittenintoit
including incoming call melody withwordsthatcan beusedfortraining karaoke,and commercialchannel thatcombines
texts,imagesand sounds,and others.ThehardwaresequencerofYMU762Cdirectlyinterpretsand playsblocksrelevant
tosynthesis(playing music and reproducing ADPCMwithFM synthesizer) thatareincludedin datadistributedinSMAF.
5.Memory
signalsintheOM6357 enabletwomemories.They useonly onevolt supply voltage,VDD3inthePCF50601.This
systemusesSamsung'smemory,KBB06A300M-T402.It isconsisted of128MbitsflashNORmemoryand 128Mbits
flashNAND memoryand 32MbitsUtRAM.Ithas16 bit dataline,HD[0~15]whichisconnectedtoOM6357 and
MV317SA.Ithas23 bit address lines,HA[1~23].CS_NAND and NCSRAM signalsischipselect.Writing process,
HWR_Nislowand it enableswriting process toflashmemoryand SRAM.During reading process,HRD_Nislowand
it enablesreading process toflashmemoryand SRAM.EachchipselectsignalsintheOM6357 select memoryamong 2
flashmemoryand UtRAM.Reading orwriting procedureisprocessedafterHWR_NorHRD_Nisenabled.Memoriesuse
reset,whichisVDD3 delayfromPCF50601.HA[22]signalenableslowerbyteofSRAMand HA[23]signalenables
higherbyteofSRAM.
6.OM6357
OM6357 isconsisted ofARMcore and DSP core.Ithas8x1Kwordon-chip program/dataRAM,55Kwords
on-chip programROMintheDSP.Ithas4K*32bitsROMand 2K*32bitsRAMintheARMcore.DSP isconsisted
ofKBS,JTAG,EMIand UART.ARMcoreisconsisted ofEMI,PIC(ProgrammableInterruptController),
reset/power/clock unit,DMAcontroller,TIC(TestInterface Controller),PPI,SSI(SynchronousSerialInterface),
ACC(Asynchronouscommunicationscontrollers),timer,ADC,RTC(Real-TimeClock)and keyboardinterface.
KBIO(0:7),address linesofDSP core and HD[0~15].HA[1~23],address linesofARMcore and HD[0~15],datalinesof
ARMcore are connectedtomemory,YMU762C.MV317SA(CameraDSP Chip)controlsthe communication between
ARMcore and DSP core.
CS_NAND,NCSRAM,NCSFLASHintheARMcore are connectedtoeachmemory.HWR_Nand HRD_Ncontrol the
process ofmemory.ExternalIRQ(InterruptReQuest)signalsfromeach units,suchas,PMUneedthe compatibleprocess.
KBIO[0~7] receivethestatusfromkeyand RXD0/TXD0/irDA_DOWNareusedforthe communicationsusing IRDA and
datalink cable(DEBUG_DTR/RTS/TXD/RXD/CTS/DSR).
Ithas JTAG controlpins(TDI/TDO/TCK) forARMcore and DSP core.Itreceives13MHz clockinCKIpinfrom
externalTCXO.ADC(Analog toDigitalConvertor) partreceivesthestatusoftemperature,batterytype and battery voltage.