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User'sManual08.95
MicrocomputerComponents
SAB80515/SAB80C515
8-BitSingle-ChipMicrocontrollerFamily
*
Edition 08.95
Published by Siemens AG,
Bereich Halbleiter, Marketing-
Kommunikation, Balanstraße 73,
81541 München
©
Siemens AG 1995.
All Rights Reserved.
Attention please!
As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes
and circuits implemented within components or assemblies.
The information describes the type of component and shall not be considered as assured characteristics.
Terms of delivery and rights to change design reserved.
For questions on technology, delivery and prices please contact the Semiconductor Group Offices in Germany or the Siemens Companies
and Representatives worldwide (see address list).
Due to technical requirements components may contain dangerous substances. For information on the types in question please contact
your nearest Siemens Office, Semiconductor Group.
Siemens AG is an approved CECC manufacturer.
Packing
Please use the recycling operators known to you. We can also help you – get in touch with your nearest sales office. By agreement we will
take packing material back, if it is sorted. You must bear the costs of transport.
For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs in-
curred.
Components used in life-support devices or systems must be expressly authorized for such purpose!
Critical components
1
of the Semiconductor Group of Siemens AG, may only be used in life-support devices or systems
2
with the express
written approval of the Semiconductor Group of Siemens AG.
1 A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the
failure of that life-support device or system, or to affect its safety or effectiveness of that device or system.
2 Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain hu-
man life. If they fail, it is reasonable to assume that the health of the user may be endangered.
SAB 80515 / SAB 80C515 Family
Revision History: 8.95
Previous Releases: 12.90/10.92
Page Subjects (changes since last revision)
30
39
80
105
106
109
137
152
243
301
Modified timing diagram (PSEN rising edge)
More detailed description of ACMOS port structure
Differential output impedance of analog reference supply voltage now: 1 kΩ
Second paragraph: additional description; WDT reset information added
SWDT reset information added
Figure 7-51 corrected
Encoding of ADD A, direct corrected
Encoding of CPL bit corrected
New release of SAB 80C515 / SAB 80C535 data sheet inserted
New release of SAB 80515 / SAB 80535 data sheet inserted
*
Contents
Contents Page
Semiconductor Group 3
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
2 Fundamental Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
2.1 Differences between MYMOS (SAB 80515/80535) and
ACMOS (SAB 80C515/80C535) Versions . . . . . . . . . . . . . . . . . . . . . . . . . . .13
2.1.1 Power Saving Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
2.1.2 Special Function Register PCON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
2.1.3 Port Driver Circuitries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
2.1.4 The A/D Converter Input Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
2.1.5 A/D Converter Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
2.1.6 The Oscillator and Clock Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
2.1.7 The VBB Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
3 Central Processing Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
3.1 General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
3.2 CPU Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
4 Memory Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
4.1 Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
4.2 Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
4.3 General Purpose Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
4.4 Special Function Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
5 External Bus Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
5.1 Accessing External Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
5.2 PSEN, Program Store Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
5.3 ALE, Address Latch Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29
5.4 Overlapping External Data and Program Memory Spaces . . . . . . . . . . . . . .29
6 System Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
6.1 Hardware Reset and Power-Up Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
6.1.1 Reset Function and Circuitries . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31
6.1.2 Hardware Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
7 On-Chip Peripheral Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
7.1 Parallel I/O . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
7.1.1 Port Structures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35
7.1.1.1 Digital I/O Port Circuitry (MYMOS/ACMOS) . . . . . . . . . . . . . . . . . . . . . . . . .36
7.1.1.2 MYMOS Port Driver Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
7.1.1.3 ACMOS Port Driver Circuitry . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39
7.1.2 Port 0 and Port 2 Used as Address/Data Bus . . . . . . . . . . . . . . . . . . . . . . . .41
7.1.3 Alternate Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42
7.1.4 Port Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44
7.1.4.1 Port Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44
*
Contents
Contents Page
Semiconductor Group 4
7.1.4.2 Port Loading and Interfacing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45
7.1.4.3 Read-Modify-Write Feature of Ports 0 through 5 . . . . . . . . . . . . . . . . . . . . . .45
7.2 Serial Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
7.2.1 Operating Modes of Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47
7.2.2 Multiprocessor Communication Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
7.2.3 Baud Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50
7.2.4 Detailed Description of the Operating Modes . . . . . . . . . . . . . . . . . . . . . . . .54
7.2.4.1 Mode 0, Synchronous Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54
7.2.4.2 Mode 1, 8-Bit UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55
7.2.4.3 Mode 2, 9-Bit UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57
7.2.4.4 Mode 3, 9-Bit UART . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57
7.3 Timer 0 and Timer 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65
7.3.1 Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68
7.3.2 Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69
7.3.3 Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .70
7.3.4 Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71
7.4 A/D Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72
7.4.1 Function and Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74
7.4.1.1 lnitialization and Input Channel Selection . . . . . . . . . . . . . . . . . . . . . . . . . . .74
7.4.1.2 Start of Conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75
7.4.2 Reference Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76
7.4.3 A/D Converter Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80
7.5 Timer 2 with Additional Compare/Capture/Reload . . . . . . . . . . . . . . . . . . . . .82
7.5.1 Timer 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .85
7.5.2 Compare Function of Registers CRC, CC1 to CC3 . . . . . . . . . . . . . . . . . . . .88
7.5.2.1 Compare Mode 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .88
7.5.2.2 Compare Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .92
7.5.2.3 Using Interrupts in Combination with the Compare Function . . . . . . . . . . . . .94
7.5.3 Capture Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .96
7.6 Power Saving Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .98
7.6.1 Power Saving Modes of the SAB 80515/80535 . . . . . . . . . . . . . . . . . . . . . . .99
7.6.1.1 Power-Down Mode of the SAB 80515/80535 . . . . . . . . . . . . . . . . . . . . . . . .99
7.6.2 Power Saving Modes of the SAB 80515/80535 . . . . . . . . . . . . . . . . . . . . . .100
7.6.2.1 Power-Down Mode of the SAB 80C515/80C535 . . . . . . . . . . . . . . . . . . . . .101
7.6.2.2 Idle Mode of the SAB 80C515/80C535 . . . . . . . . . . . . . . . . . . . . . . . . . . . .102
7.7 Watchdog Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .105
*
Contents
Contents Page
Semiconductor Group 5
7.8 Oscillator and Clock Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .107
7.8.1 Crystal Oscillator Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .107
7.8.2 Driving for External Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .107
7.8.2.1 Driving the SAB 80515/80535 from External Source . . . . . . . . . . . . . . . . . .108
7.8.2.2 Driving the SAB 80C515/80C535 from External Source . . . . . . . . . . . . . . .109
7.9 System Clock Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .110
8 Interrupt System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112
8.1 Interrupt Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .112
8.2 Priority Level Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .120
8.3 How Interrupts are Handled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .122
8.4 External Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125
8.5 Response Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .126
9 Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127
9.1 Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .127
9.2 Introduction to the Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .129
9.2.1 Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .129
9.2.2 Arithmetic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .130
9.2.3 Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132
9.2.4 Control Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .132
9.3 Instruction Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .134
10 Device Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .214
*
Semiconductor Group 6
Introduction
1 Introduction
The SAB 80C515/80C535 is a new, powerful member of the Siemens SAB 8051 family of 8-bit
microcontrollers. lt is designed in Siemens ACMOS technology and is functionally compatible with
the SAB 80515/80535 devices designed in MYMOS technology.
The ACMOS and the MYMOS versions 1) 2) are stand-alone, high-performance single-chip
microcontrollers based on the SAB 8051/80C51 architecture. While maintaining all the
SAB 80(C)51 operating characteristics, the SAB 80(C)515/80(C)5353) incorporate several
enhancements which significantly increase design flexibility and overall system performance.
The low-power properties of Siemens ACMOS technology allow applications where power
consumption and dissipation are critical. Furthermore, the SAB 80C515/80C535 has two software-
selectable modes of reduced activity for further power reduction: idle and power-down mode.
The SAB 80(C)535 is identical to the SAB 80(C)515 except that it lacks the on-chip program
memory. The SAB 80(C)515/80(C)535 is supplied in a 68-pin plastic leaded chip carrier package
(P-LCC-68). In addition to the standard temperature range version (0 °to + 70 °C) there are also
versions for extended temperature ranges available (see data sheets).
Functional Description
The members of the SAB 80515 family of microcontrollers are:
– SAB 80C515: Microcontroller, designed in Siemens ACMOS technology, with 8-Kbyte
factory mask-programmable ROM
– SAB 80C535: ROM-less version, identical to the SAB 80C515
– SAB 80515: Microcontroller, designed in Siemens MYMOS technology, with 8-Kbyte
factory mask-programmable ROM
– SAB 80535: ROM-less version, identical to the SAB 80515
– SAB 80515K: Special ROM-less version of the SAB 80515 with an additional interface for
program memory accesses. An external ROM that is accessed via the
interface substitutes the SAB 80515’s internal ROM.
1In this User’s Manual the term "ACMOS versions" is used to refer to both the SAB 80C515 and
SAB 80C535.
2The term "MYMOS versions" stands for SAB 80535 and SAB 80515.
3The term "SAB 80(C)515" refers to the SAB 80515 and the SAB 80C515, unless otherwise
noted.
*
Semiconductor Group 7
Introduction
The SAB 80(C)515 features are:
– 8 Kbyte on-chip program memory
– 256 byte on-chip RAM
– Six 8-bit parallel I/O ports
– One input port for digital input 1)
– Full-duplex serial port, 4 modes of operation, fixed or variabie baud rates
– Three 16-bit timer/counters
– 16-bit reload, compare, capture capability
– A/D converter, 8 multiplexed analog inputs, programmable reference voltages
– 16-bit watchdog timer
– Power-down supply for 40 byte of RAM
– Boolean processor
– 256 directly addressable bits
– 12 interrupt sources (7 external, 5 internal), 4 priority levels
– Stack depth up to 256 byte
–1µs instruction cycle at 12-MHz operation
–4µs multiply and divide
– External program and data memory expandable up to 64 Kbyte each
– Compatible with standard SAB 8080/8085 peripherals and memories
– Space-saving P-LCC-68 package
For small-quantity applications and system development the SAB 80535 can be employed being
the equivalent of an SAB 80515 without on-chip ROM.
1Additional feature of the ACMOS versions
*
Semiconductor Group 8
Introduction
Figure 1-1 shows the logic symbol, figure 1-2 the block diagram of the SAB 80(C)515:
Figure 1-1
Logic Symbol
*
Semiconductor Group 9
Introduction
Figure 1-2
Block Diagram
*
Semiconductor Group 10
Fundamental Structure
2 Fundamental Structure
The SAB 80(C)515/80(C)535 is a totally 8051-compatible microcontroller while its peripheral
performance has been increased significantly.
Some of the various peripherals have been added to support the 8-bit core in case of stringent
embedded control requirements without loosing compatibility to the 8051 architecture.
Furthermore, the SAB 80(C)515/80(C)535 contains e. g. an additional 8-bit A/D converter, two
times as much ROM and RAM as the 80(C)51 and an additional timer with compare/capture/reload
facilities for all kinds of digital signal processing.
Figure 2.1 shows a block diagram of the SAB 80(C)515/80(C)535.
The SAB 80C515/80C535 combines the powerful architecture of the industry standard controller
SAB 80515/80535 with the advantages of the ACMOS technology (e. g. power-saving modes). The
differences between MYMOS and ACMOS components are explained in section 2.1.
Readers who are familiar with the SAB 8051 may concentrate on chapters 2.1, 6, 7 and 8 where
the differences between MYMOS and ACMOS components, the reset conditions, the peripherals
and the interrupt system are described.
For newcomers to the 8051 family of microcontrollers, the following section gives a general view of
the basic characteristics of the SAB 80515/80535. The details of operation are described later in
chapters 3 and 4.
*