Silicon Laboratories Si3452MS8 User manual

Rev. 0.6 5/12 Copyright © 2012 by Silicon Laboratories Si3452MS8-EVB
Si3452MS8-KIT
Si3452MS8 EVALUATION BOARD USER’SGUIDE
1. Introduction
The Si3452MS8 8-port evaluation kit (Si3452MS8-KIT) is intended for Power over Ethernet (PoE) Power Sourcing
Equipment (PSE) system designers interested in evaluating the Quad-port Si3452 PSE controller. While evaluation
kits are normally shipped with Si3452 devices that use Silicon Laboratories’ proprietary dV/dt™ disconnect, they
can also be used for evaluation of the pin-compatible Si3453, which uses dc disconnect. In this case, the Si3452
devices must be replaced with the appropriate Si3453 device. Please refer to "8. Ordering Guide" on page 35 for
more information.
The Si3452 is controlled through an I2C (or SMBus) interface. For convenience in evaluation, a graphical user
interface (GUI) is provided, giving an easy-to-use visual display and control of the Si3452 I2C registers. The
evaluation kit assumes the user has access to a PC to control the evaluation board with the provided GUI.
The user is also responsible for providing an appropriate high-voltage power supply. The power supply should be
45 to 57 V for normal PoE or 51 to 57 V for PoE+. The Si3452 can supply over 30 W to each port. Thus, the two
Si3452 controllers for the eight port demo system can provide over 240 W of total power. Normally, a 50 to 100 W
power supply is used. While the classification and actual current consumption of each port is available, the demo
GUI does not implement system-level power management. Contact Silicon Laboratories for more information about
system-level power management options.
The Si3452MS8 kit has been thoroughly tested for standards compliance and interoperability. Contact Silicon
Laboratories for test reports using Sifos PoE test equipment and University of New Hampshire PoE standards
compliance and interoperability reports.

Si3452MS8-KIT
2 Rev. 0.6
2. Kit Contents
This user’s guide includes instructions on the use of the Si3452 register control GUI. An optional Power Manager
GUI is described in the SI3452 Power Manager GUI user’s guide on the CD-ROM. The installation instructions for
the hardware and USB to I2C driver in this user’s guide must be followed before installing and using the Si3452
Power Manager GUI.
Table 1. Evaluation Kit Contents
Kit Contents
Si3452MS8-EB r1.1 The Si3452 8-port evaluation board with connector for an external 50 V power supply. The
power supply must be capable of supplying the required amount of power for all PoE loads
being connected. Standard boards are populated with Si3452-B01-GM parts.
Si3452CB-EB r1.1 An RJ-45 connector board configured as power over Ethernet Gigabit mid-span injector.
A 24-wire cable to connect the Si3452 evaluation board to the mid-span injector board
PoE USB v1.3 A USB to I2C (or SMBus) evaluation board. This board is preconfigured with updated firm-
ware to support I2C transactions.
A USB cable to connect to a host PC
Si3402ISO-EB A PD evaluation board configured to provide a Class 3 signature.
Si3402ISO-C4-EB A PD evaluation board configured to provide a Class 4 signature.
10 loads for the evaluation boards. Each load will consume 2.5 W, which is about 3 W
referred to the PSE side.
Two Ethernet cables to connect the Si3400 and Si3401 evaluation boards to the connector
board.
CD-ROM Software drivers for the USB to SMBus adapter and a GUI for the Si3452 registers on a
CD-ROM. Applicable applications notes and data sheets are also included.

Si3452MS8-KIT
Rev. 0.6 3
3. Installation
Before you can use the Si3452 Monitor, you must first install the PoEUSB device driver associated with the
PoEUSB adapter card, as well as install the Si3452 Monitor.
3.1. Installing the PoEUSB Device
If you have previously installed the PoEUSB device, uninstall the previous driver version before installing the new
version. To uninstall the previous version, select “Programs and Features” or “Add or Remove Programs” from the
Control Panel, and then uninstall “Windows Driver Package - Silicon Labs…”.
Figure 1. Uninstall Previous Rev Windows Driver Package
To install the PoEUSB device driver, run PoEUSBSetup_v1.1.exe.
Figure 2. PoE USB Device Installer Screen
After the PoEUSB device driver is installed, then complete the installation by connecting the PoEUSB adapter card
to the PC with a USB cable.

Si3452MS8-KIT
4 Rev. 0.6
3.2. Installing the Si3452 Monitor
If you have previously installed the Si3452 Monitor, uninstall the previous version before installing the new version.
To uninstall the previous version, select “Programs and Features” or “Add or Remove Programs” from the Control
Panel, and then uninstall "Si3452 Monitor".
Figure 3. Uninstall Previous Rev Si3452 Monitor
To install the Si3452 Monitor, run Si3452MonitorSetup_v2.0.exe.
Figure 4. Monitor Setup Wizard

Si3452MS8-KIT
Rev. 0.6 5
4. Hardware Installation
Figure 5 shows how all the hardware pieces of the Si3452 evaluation board fit together.
Figure 5. Evaluation Board Hardware

Si3452MS8-KIT
6 Rev. 0.6
Perform the following steps:
1. Connect the Si3452 evaluation card (Si3452MB8-EVB) to the RJ45 (Si3452C3-EVB) card using the 24-pin
ribbon cable.
2. Plug J104 of the PoEUSB adapter into J104 of the Si3452 evaluation card.
3. The high-voltage power supply should be connected to the evaluation system before it is plugged into the ac
mains. Hot insertion of the high voltage is not recommended. Be careful about the polarity of the high-voltage
power supply. After the high voltage supply is turned on, the power LED D101 will glow, indicating that the 3.3 V
supply is active.
Figure 6. Location of D101 which Indicated Power Has Been Properly Applied
4. Plug the PoEUSB adapter into the computer USB cable if this was not already done during the software
installation step. Connect the USB side before connecting the PoEUSB side. If the drivers were installed
properly, the PC should recognize the adapter.
5. Plug in powered devices. The evaluation board is configured as a midspan power injector. The data input lines
are on the top row, and the power plus data output lines are on the bottom row.
Figure 7. Connector Board Configuration
6. Start the Si3452 Monitor.
Port 1
Data in
Port 1
PoE and
Data out
Port 8
Data in
Port 8
PoE and Data out

Si3452MS8-KIT
Rev. 0.6 7
5. Using the Si3452 Monitor
To run the Si3452 Monitor, double click on the "Si3452 Monitor" desktop icon. You may also run the Si3452 Monitor
from the Start menu, by selecting: Start All Programs Silicon Laboratories Si3452 Monitor.
The Si3452 Monitor initially displays the basic graphical user interface (GUI), but it can be switched to the
advanced GUI by clicking on the “Advanced GUI” button.
5.1. Basic GUI
The basic GUI provides high level status, configuration, and control of Si3452 port controllers.
Figure 8. Basic GUI
The basic GUI contains the following:
Monitor Control
Interface Selector
Device Information
Device Status
Port Boxes

Si3452MS8-KIT
8 Rev. 0.6
5.1.1. Monitor Control
The primary purpose of the Monitor Control area is to configure and control the operation of the GUI itself.
Figure 9. Monitor Control Area
The user may manually update the GUI by clicking the “Refresh” button. The GUI reads the Si3452 registers and
updates the displayed information.
The user may cause the GUI to automatically update itself at regular intervals by clicking on the “Start polling”
button. The green LED flashes red each time an update occurs. The “Poll delay” text box allows the user to specify
the time between updates. The user may stop automatic updates by clicking on the “Stop polling” button.
The user selects which Si3452 controller to use with the “Slave addr” box. Several Si3452 controllers may be
connected to the I2C bus, and each controller has a unique I2C slave address. The “Slave addr” box specifies
which of the Si3452 controllers to communicate with. The GUI works with only one Si3452 at a time, but the user
may dynamically switch the GUI between several Si3452s with the “Slave addr” box.
If the user checks the “CoR” (Clear on Read) check box, then the GUI reads the Si3452's CoR registers when
updating. If the CoR check box is not checked, then the GUI does not read the CoR registers when updating. The
CoR registers are the Port Event registers and the Device Status register. Reading a CoR register has side effects.
Reading a Port Event register clears that register and clears a port event bit in the interrupt register. Reading the
Device Status register clears a device event bit in the interrupt register. Consequently, if the CoR check box is
checked while the GUI is polling, then events could come and go without being noticed by the user.
If the user checks the “RoM” (Read on Modify) check box, then the GUI automatically updates itself after the user
modifies the GUI. The GUI automatically shows the effect of any change within a time delay, specified by the “RoM
delay” text box. The RoM behavior is only useful if polling is stopped.
The Monitor Control area has three buttons. The “Reset Device” button resets the Si3452 by writing the “reset chip”
command to the command register. The “Shutdown low priority ports” button turns off all low priority ports by writing
the “shutdown all low priority ports” command to the command register. The “Advanced GUI” button displays the
advanced GUI controls.
5.1.2. Interface Selector
The Interface Selector specifies which USB-to-I2C device to use for communicating with the Si3452 port
controllers.
Figure 10. Interface Selector

Si3452MS8-KIT
Rev. 0.6 9
The Si3452 Monitor supports several different USB-to-I2C devices. If more than one of these devices is connected
to the PC at the same time, then the user can select which one to use with the Interface drop-down box.
The “Dummy” device is a substitute device that does not actually perform I2C communications. The Dummy device
allows the Si3452 Monitor to open even if there are no USB-to-I2C devices connected to the PC.
The version of the Si3452 Monitor is displayed at the bottom of the window.
5.1.3. Device Information
The Device Information box displays high level information about the Si3452 device.
Figure 11. Device Information Box
This box displays the hardware revision of the silicon, the firmware version, and the measured Vee voltage. The
user can update the Vee voltage by clicking on the “Vee” button.
5.1.4. Device Status
The Device Status box displays the high level status of the Si3452 device.
Figure 12. Device Status Box
This box displays the contents of the Device Status register. If the temperature of the Si3452 controller is too high,
then the “Over temp” LED bar is bright red instead of dark red. If the Vee voltage is too low, then the “Vee UVLO”
LED bar is bright red instead of dark red. This box also displays the setting of the detection back-off timing
(Alternative A or Alternative B).
The user may manually update this box by clicking on the “R” (read) button. The GUI reads the Device Status
register and updates the status information displayed in this box. This box is not updated by polling or by the
“Refresh” button unless the CoR check box is checked.
If a device event bit is set in the interrupt register, then the “R” button is red. This indicates that the displayed device
status is stale and that the Device Status register should be read. Reading the Device Status register has the side
effect of clearing the device event bits in the interrupt register, consequently making the “R” button no longer red.
The “Toggle detection back-off timing” button switches the detection back-off timing between Alternative A and
Alternative B. This change may not automatically be displayed in this box. The user may have to click on the “R”
button to see the new timing setting. If the Device Status register has never been read, then this box displays
“Alternative?” because the timing is not known.

Si3452MS8-KIT
10 Rev. 0.6
5.1.5. Port Boxes
The port boxes display port status and have controls for configuring and controlling the ports.
Figure 13. Port Box
5.1.5.1. Port Status
A port box displays the results of the last detection and last classification in the middle of the right pane. The
PwrEnable LED (bottom left) is bright red if the port is turned on. The PwrGood LED is bright red if the measured
port voltage is good.
The amount of current drawn from the port is displayed at the bottom right corner of the port box. The user may
manually update the port current reading by clicking on the “R” (read) button.
5.1.5.2. Port Configuration
A port box contains four radio buttons to configure the mode of the port. The port mode may be Shutdown, Manual,
Semi-auto, or Auto.
The port features can be configured with the four checkboxes on the right pane. If “Disconnect enable” is checked,
the port removes power if the powered device is unplugged. If “PoE+” is checked, then the port supplies high
power to a powered device that follows to the PoE+ protocol. If “Low priority” is checked, the port immediately
removes power if the “Shutdown low priority ports” button is clicked. If “Legacy enable” is checked, then the port
supplies power to a legacy powered device even though the powered device does not provide a valid detection
resistance. The “Legacy enable” check box is disabled if the Si3452 controller does not support this feature.
The user may configure a port's Icut level with the “Icut (mA)” drop-down box. The port automatically removes
power if the port current is greater than the Icut level for more than 60 milliseconds.
5.1.5.3. Port Control
A port box contains three buttons for controlling a port. The “On” button forces a port to supply power; the “Off”
button forces a port to remove power, and the “Reset” button resets a port.

Si3452MS8-KIT
Rev. 0.6 11
5.2. Advanced GUI
The advanced GUI adds additional controls to the basic GUI for low level status, configuration, and control of
Si3452 controllers.
Figure 14. Advanced GUI
The advanced GUI consists of the following sections:
Interrupt Enable
Events
Register List

Si3452MS8-KIT
12 Rev. 0.6
5.2.1. Interrupt Enable
The Interrupt Enable box specifies which events cause the Si3452 to generate an interrupt.
Figure 15. Interrupt Enable Box
5.2.2. Events
The Events box displays the status of the interrupt line and the port events.
Figure 16. Events Box
If the interrupt line is active, then the LED bar at the top of the Events box is bright red instead of dark red. Note
that if there are multiple Si3452 controllers in the system, one or more of these controllers may be pulling the
interrupt line low. It may not be the currently-selected Si3452 that is making the interrupt line active.
The Port Events registers can be read using the port event buttons under the Interrupt line active LED bar. Further
below the port event, LEDs display the status of each event for each port. If a port event is active, then the
corresponding LED is bright red.
The user may manually update a port's event LEDs by clicking on the port's event button (P1, P2, P3, P4). The GUI
reads the corresponding Port Events register and updates the port's event LEDs. Port event LEDs are not updated
by polling or by the “Refresh” button unless the CoR check box is checked.
If a port event bit is set in the interrupt register, then the corresponding port event button (P1, P2, P3, P4) is red.
This indicates that the port's event LEDs are stale and that the Port Events register should to be read. Reading a
Port Events register has the side effect of clearing that Port Events register and clearing the port event bit in the
interrupt register, consequently making the port event button no longer red.

Si3452MS8-KIT
Rev. 0.6 13
5.2.3. Register List
The Register List displays the contents of the Si3452 registers and allows the user to change the register contents.
Figure 17. Register List
The Register List displays all of the Si3452's registers grouped by category. Each category of registers can be
expanded and collapsed by clicking on the plus and minus signs at the left edge of the Register List.
The Register List displays the type of each register. Each register is either RW (read/write), RO (read only), WO
(write only) or CR (Clear on Read). WO registers reflect the value applied by the user.
The user may specify which registers to read (when the GUI is updated) by checking a box at the left of each
register name. Refreshing, polling, and RoM, all depend on these settings. Clear on Read registers are read only if
both the CoR check box is checked and the check box for the individual CR register is checked.
The user may read and write individual registers by using the “R” (read) and “W” (write) buttons at the right edge of
each register. The “R” and “W” buttons are disabled if the operation is not allowed for the type of register. The
whole register file can be updated at once by clicking on the “Refresh” button.
The Register List displays the value of each register in binary and hexadecimal form. If a register has not yet been
read, then its binary value is displayed as all Xs, and its hexadecimal value is blank.
A register's hexadecimal value is displayed in a text box. If a register is not writable (RO or CR), then its text box is
gray and its hexadecimal value cannot be changed by the user. If a register is writable (RW), then its text box is
white and its hexadecimal value can be changed by the user. The accepted format in text boxes are: octal (0 nnn).
After changing a register's value, the user clicks on the register's “W” button to write the new value to the register.

Si3452MS8-KIT
14 Rev. 0.6
6. Operating the System
The RJ45 connector board has eight LEDs for the eight ports. The LEDs are driven by a comparator circuit with a
threshold of about 2 V. When the ports are in auto mode, the LEDs in the RJ45 connector board flash, indicating
the detection cycle until a valid PD is connected. Once a valid PD is connected and the port is turned on, the LEDs
will glow steadily until the PD is disconnected. Once the PD is connected, the port current will be displayed on the
GUI.
The easiest way to get started is to put all of the ports in Auto mode. In Auto mode, detection, classification, power
management based on classification (Icut setting), disconnect (when enabled by “Dis Enable”), fault protection,
fault recovery, and port monitoring all happen without user intervention.
If the GUI is left in polling mode, the port status, port current, Vee voltage are all automatically updated by polling
the appropriate registers of the Si3452.
The Si3452 itself normally powers up as Alternative A, which means there is no detection back-off. This is the most
common usage for the Si3452. The RJ-45 connector board for the evaluation kit is configured to inject the power
on the “spare pairs” of the Ethernet cable, which is the Alternative B or “Midspan” connection. Detection back-off is
helpful for insuring that a midspan and an endpoint do not compete with each other and result in a failure to provide
power. With detection back-off, the time between detection pulses is increased to just over two seconds so as not
to compete with the normal (approximately three times per second) detection of an endpoint. If detection back-off is
required, click the “Midspan” button to toggle this mode. You will see that the LEDs on the connector board now
flash at the slower detection speed. To toggle the mode back to standard detection timing, click the button again.
The Si3452 in auto mode is fully-compliant with the 802.3at standard (often called PoE+), which allows up to 30 W
to be delivered over the Ethernet cable. To enable the higher power support for a given port, click the “PoE+” check
box for that port.
In PoE+ power mode, the Si3452 automatically performs the two-event classification and increases the cut-off
current if a class 4 PD is detected. The Si3401 evaluation board provided with the kit is configured to provide the
Class 4 signature; so, if the PoE+ mode is enabled and the Si3401 PD is plugged in, the cut-off current is
automatically set to 643.2 mA. The screen shot in Figure 18 shows the result of plugging in a class 4 PD (into
Port1) with PoE+ power enabled.
Figure 18. Result of Putting Port 1 into Auto and POE+ Mode
and Plugging in the Si3401 Class 4 PD with a 5 Load

Si3452MS8-KIT
Rev. 0.6 15
7. Board Schematics, BOM, and Layout
The following are general PCB layout considerations. Detailed schematics, BOM, and layout can also be found in
the following sections. Visit the Silicon Labs Technical Support web page and register to submit a technical support
request, particularly if you are not closely following the recommended reference design.
7.1. Design and Layout Considerations
Due to the high current of up to 800 mA per port, the following board layout guidelines apply.
The VEE1, VEE2, VEE3, and VEE4 pins can carry up to 800 mA and are connected to a VEE bus. The VEE bus
for a 4-port PCB layout can thus carry as much as 3.2 A current. The best practice is to devote an entire inner layer
for VEE power routing.
Similarly, GND1/2 and GND3/4 pins can carry up to 1.6 A per pin, and the GND return bus should be at least as
wide as the VEE bus. The best practice is to devote an entire inner layer for ground power routing.
The ground power plane does not generally have a high frequency content (other than external faults); so, it is
generally acceptable to use the ground power plane as a ground signal plane and tie AGND and GND12 and
GND34 to this plane as well.
The VOUTn pins carry up to 800 mA dc and up to 5 A in faults; so, a 20 mil trace with wide or multiple vias is also
recommended. The VDETn pins also carry fault current; so, this pin connection to VOUTn needs to use 20 mil
traces and wide or multiple vias where needed.
The VDD currents are not large; so, it is acceptable to route the VDD nodes on one of the outer layers. If care is
taken to avoid disruption of the high-current paths, VDD can be globally routed on one of the power planes and
then locally routed on an inner or outer layer.
To avoid coupling between surge events and logic signals, it is recommended that VOUTn traces be routed on the
side opposite the I2C interface pins.
The thermal pad of the Si3452/3 is connected to VEE. At full IEEE 802.3at and a current of 600 mA on each port,
the dissipation of the Si3452/3 is up to 1.2 W; so, multiple vias are required to conduct the heat from the thermal
pad to the VEE plane. As many as 36 small vias provide the best thermal conduction. Heat is dissipated through
the Si3452 by vias to a large Vee plane on the back of the board. Chip-to-chip spacing should be kept to greater
than one inch to reduce peak temperatures associated with the Si3452 chips from heating each other.
The I2C bus runs at a modest speed of 400 kHz maximum. The I2C bus lines should be routed away from analog
lines like Rbias or Vref but can otherwise be routed with ordinary care.
For the Si3452 itself, there are no EMI considerations. The Si3500 dc-to-dc converter in the reference design is a
potential EMI source; so, care must be used in routing the FET output (SWO). The lead lengths should be kept
short, and SWO should be kept away from the analog nodes. Also, the area enclosed by the paths between the
input filter caps to the inductor and returning to SWO and Vss and also from the output filter caps to the inductor
and returning through the diode should be minimized. Following the reference design closely in this area will insure
success.

Si3452MS8-KIT
16 Rev. 0.6
7.2. Si3452 Schematics
VOUT0 VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6
+1V1REG
+1.24REG
+1V1REG VOUT7
RST
SCL SDA
INT
SDA SCL
+3V3
-52V
+3V3
+3V3
-52V
-52V
+3V3
-52V
+3V3
+3V3LV
+3V3
+3V3+3V3LV
+3V3LV
+3V3LV
PWR Status LED
+1V1 Reg
INPUT POWER
UNISOLATED
BULK DECOUPLING
Connect to EGND at Mount Holes
<50Isolation bypass
PoE magnetics and LEDs
*Note: For most designs, the Si8405 isolator "A" side should face the
system host. If the Si8405 isolator A side faces the Si3452, please use a 3k pull-up resistor for robust low-temperature operation.
See *Note
J4
HEADER 12x2
J4
HEADER 12x2
12 34 56 78 910 1112 1314 1516 1718 1920 2122 2324
R105 330 R105 330
C102 680pF C102 680pF
R100
10K
R100
10K
TPV3 TPV TPV3 TPV
+3V3
NI
+3V3
NI
C103 0.1uF C103 0.1uF
R106
267
R106
267
D101 GREEN
3.3V PWR
D101 GREEN
3.3V PWR
R107 267 R107 267
SW1
SW PUSHBUTTON
SW1
SW PUSHBUTTON
-52V
NI
-52V
NI TP103
GND TP103 GND
TPV2 TPV TPV2 TPV
+
C104 33uF
+
C104 33uF
J104 HEADER 5x2 J104 HEADER 5x2
1
122
3
344
5
566
7
788
9
910 10
TP104 GND TP104 GND
R104 44.2K R104 44.2K
R102 1K R102 1K
VREG
-52V->+3.3V Converter
+3V3
+3V3_RTN-52V
-52V_RTN
C100
1uF
C100
1uF
TP102 GND TP102 GND
R101 1K R101 1K
J100
CONN SOCKET 3x2 RA
J100
CONN SOCKET 3x2 RA
1
122
3
344
5
566
R108 2.1K R108 2.1K
C107 1uF C107 1uF
U100 TLV431 U100 TLV431
TPV4 TPV TPV4 TPV
R103 10K R103 10K
C101 680pF C101 680pF
ISOLATION
U101 Si8405
ISOLATION
U101 Si8405
VDD1 1
VDD2 16 GND2
9
GND1
8
NC 2
NC
15
A1 3 A2 4
B3
12
B4
11
A3 5 A4 6
B1
14
B2
13
NC 7
NC
10
TPV1 TPV TPV1 TPV
C106 10uF C106 10uF
D100 MBRS3100T3 D100 MBRS3100T3
J101 CONN TRBLK 2 J101 CONN TRBLK 2
1 2
C108 1uF C108 1uF
+
C105 33uF
+
C105 33uF
HV Port Controllers
+3V3
+3V3_RTN
-52V
VREF_IN RESET_L
VOUT1 VOUT2 VOUT3 VOUT4 VOUT5 VOUT6 VOUT7 VOUT0
SDA SCL INT
-52V_RTN
Figure 19. Top Level

Si3452MS8-KIT
Rev. 0.6 17
+3V3
+3V3_RTN
-52V
-52V_RTN
+3V3
+3V3
-52V
+3V3
Vssa
Vssa
-52->+3.3V Converter
Optional short circuit protection.
See Note 1
See Note 2
Note 1: It has been found that this capacitor is not required for most applications. Note 2: This circuit has been optimized for the very low current consumption of the Si3452 devices and Si8405 isolator. If your application draws additional current from the 3.3 V supply or you deviate from the BOM, please visit the Silicon Labs technical support web page to get support for your design.
FB151
30 Ohm
FB151
30 Ohm
R157 10K R157 10K
Q1
MMBT3904
Q1
MMBT3904
+
C155
560uF
+
C155
560uF
R155 2.87K R155 2.87K
R151 25.5K R151 25.5K
R150 5.6 R150 5.6
L151 33uH L151 33uH
C150 0.1uF C150 0.1uF
C158 0.1uF C158 0.1uF
C152 1uF C152 1uF
R156
4.87K
R156
4.87K
VnegVneg
C156 22uF C156 22uF
C153 1uF C153 1uF
R153 1KR153 1K
D301
ES2B
D301
ES2B
U152
Si3500
U152
Si3500
EROUT 1
SSFT 2
Vdd 3
ISOSSFT 4
NC
5
RDET
6
HSO
7
NC
8
Vneg
9
NC
10
NC
11
Vposf
12
NC
13
NC
14
Vssa 15
Vposs 16
VSS1 17
SWO 18
VSS2 19
FB 20
EPAD 21
+
C151 12uF
+
C151 12uF
C159
1uF
C159
1uF
Figure 20. DC-DC Converter

Si3452MS8-KIT
18 Rev. 0.6
SCL
VREF_IN
INT
RESET
SDA SCL
VREF_IN
INT
RESET
SDA
VREF_IN SCL SDA
VOUT0 VOUT1 VOUT2 VOUT3
INT
VREF_IN
VOUT4 VOUT5 VOUT6 VOUT7
INT
+3V3
+3V3_RTN
-52V
RESET_L
-52V_RTN
-52V
+3V3
-52V
-52V
-52V
+3V3
-52V
+3V3
-52V
C3 0.1uF C3 0.1uF
R4 10KR4 10K
C17 0.1uF C17 0.1uF C16 0.1uF C16 0.1uF
R7 10KR7 10K
C5 0.1uF C5 0.1uF
C18 0.1uF C18 0.1uF
R1 10KR1 10K
C13 0.1uF C13 0.1uF
C8 0.1uF C8 0.1uF
R8 10KR8 10K
C7 0.1uF C7 0.1uF
C10
0.1uF
C10
0.1uF
-52V-52V
C4 0.1uF C4 0.1uF
C9 0.1uF C9 0.1uF
R3 10KR3 10K
C15 0.1uF C15 0.1uF
R10 44.2K R10 44.2K
C14 0.1uF C14 0.1uF
C1
0.1uF
C1
0.1uF
-52V-52V
SI3452
Si3452
U2
SI3452
Si3452
U2
VEE1
1
IC 11
VEE
2
VREF_IN
3
AOUT
5AGND 6
RBIAS
7
AGND
8
OSC
9
VEE4
10
VOUT4 12
DET4 13
GND34
15
DET3 18
VOUT3 20
VEE3
22
RST
23
AD3
24
AD1
27 AD2 25
AD0
28
DGND
29
VDD 19
VEE2
31
VOUT2 32
DET2 33
GND12
35
DET1 37
VOUT1 39
VEE
EPAD
AIN
4
AD0/SDA
14
AD2
26 AD1/SCL 16
AD3
21
NC 17
VDD 30
TX/AD0
34 RX/AD1 36
RST
38
INT
40
C11 0.1uF C11 0.1uF
C6 0.1uF C6 0.1uF
C12 0.1uF C12 0.1uF
R5 10KR5 10K
SI3452
Si3452
U1
SI3452
Si3452
U1
VEE1
1
IC 11
VEE
2
VREF_IN
3
AOUT
5AGND 6
RBIAS
7
AGND
8
OSC
9
VEE4
10
VOUT4 12
DET4 13
GND34
15
DET3 18
VOUT3 20
VEE3
22
RST
23
AD3
24
AD1
27 AD2 25
AD0
28
DGND
29
VDD 19
VEE2
31
VOUT2 32
DET2 33
GND12
35
DET1 37
VOUT1 39
VEE
EPAD
AIN
4
AD0/SDA
14
AD2
26 AD1/SCL 16
AD3
21
NC 17
VDD 30
TX/AD0
34 RX/AD1 36
RST
38
INT
40
R9 44.2K R9 44.2K
C2 0.1uF C2 0.1uF
R2 10KR2 10K
R6 10KR6 10K
Figure 21. Si3452 Controllers

Si3452MS8-KIT
Rev. 0.6 19
7.3. Si3452 Layout
Figure 22. Si3452 Top Silkscreen

Si3452MS8-KIT
20 Rev. 0.6
Figure 23. Si3452 Primary Side